Lines Matching refs:pcr
62 static int rtsx_comm_set_ltr_latency(struct rtsx_pcr *pcr, u32 latency) in rtsx_comm_set_ltr_latency() argument
64 rtsx_pci_write_register(pcr, MSGTXDATA0, in rtsx_comm_set_ltr_latency()
66 rtsx_pci_write_register(pcr, MSGTXDATA1, in rtsx_comm_set_ltr_latency()
68 rtsx_pci_write_register(pcr, MSGTXDATA2, in rtsx_comm_set_ltr_latency()
70 rtsx_pci_write_register(pcr, MSGTXDATA3, in rtsx_comm_set_ltr_latency()
72 rtsx_pci_write_register(pcr, LTR_CTL, LTR_TX_EN_MASK | in rtsx_comm_set_ltr_latency()
78 int rtsx_set_ltr_latency(struct rtsx_pcr *pcr, u32 latency) in rtsx_set_ltr_latency() argument
80 return rtsx_comm_set_ltr_latency(pcr, latency); in rtsx_set_ltr_latency()
83 static void rtsx_comm_set_aspm(struct rtsx_pcr *pcr, bool enable) in rtsx_comm_set_aspm() argument
85 if (pcr->aspm_enabled == enable) in rtsx_comm_set_aspm()
88 if (pcr->aspm_mode == ASPM_MODE_CFG) { in rtsx_comm_set_aspm()
89 pcie_capability_clear_and_set_word(pcr->pci, PCI_EXP_LNKCTL, in rtsx_comm_set_aspm()
91 enable ? pcr->aspm_en : 0); in rtsx_comm_set_aspm()
92 } else if (pcr->aspm_mode == ASPM_MODE_REG) { in rtsx_comm_set_aspm()
93 if (pcr->aspm_en & 0x02) in rtsx_comm_set_aspm()
94 rtsx_pci_write_register(pcr, ASPM_FORCE_CTL, FORCE_ASPM_CTL0 | in rtsx_comm_set_aspm()
97 rtsx_pci_write_register(pcr, ASPM_FORCE_CTL, FORCE_ASPM_CTL0 | in rtsx_comm_set_aspm()
101 if (!enable && (pcr->aspm_en & 0x02)) in rtsx_comm_set_aspm()
104 pcr->aspm_enabled = enable; in rtsx_comm_set_aspm()
107 static void rtsx_disable_aspm(struct rtsx_pcr *pcr) in rtsx_disable_aspm() argument
109 if (pcr->ops->set_aspm) in rtsx_disable_aspm()
110 pcr->ops->set_aspm(pcr, false); in rtsx_disable_aspm()
112 rtsx_comm_set_aspm(pcr, false); in rtsx_disable_aspm()
115 int rtsx_set_l1off_sub(struct rtsx_pcr *pcr, u8 val) in rtsx_set_l1off_sub() argument
117 rtsx_pci_write_register(pcr, L1SUB_CONFIG3, 0xFF, val); in rtsx_set_l1off_sub()
122 static void rtsx_set_l1off_sub_cfg_d0(struct rtsx_pcr *pcr, int active) in rtsx_set_l1off_sub_cfg_d0() argument
124 if (pcr->ops->set_l1off_cfg_sub_d0) in rtsx_set_l1off_sub_cfg_d0()
125 pcr->ops->set_l1off_cfg_sub_d0(pcr, active); in rtsx_set_l1off_sub_cfg_d0()
128 static void rtsx_comm_pm_full_on(struct rtsx_pcr *pcr) in rtsx_comm_pm_full_on() argument
130 struct rtsx_cr_option *option = &pcr->option; in rtsx_comm_pm_full_on()
132 rtsx_disable_aspm(pcr); in rtsx_comm_pm_full_on()
138 rtsx_set_ltr_latency(pcr, option->ltr_active_latency); in rtsx_comm_pm_full_on()
140 if (rtsx_check_dev_flag(pcr, LTR_L1SS_PWR_GATE_EN)) in rtsx_comm_pm_full_on()
141 rtsx_set_l1off_sub_cfg_d0(pcr, 1); in rtsx_comm_pm_full_on()
144 static void rtsx_pm_full_on(struct rtsx_pcr *pcr) in rtsx_pm_full_on() argument
146 rtsx_comm_pm_full_on(pcr); in rtsx_pm_full_on()
149 void rtsx_pci_start_run(struct rtsx_pcr *pcr) in rtsx_pci_start_run() argument
152 if (pcr->remove_pci) in rtsx_pci_start_run()
155 if (pcr->rtd3_en) in rtsx_pci_start_run()
156 if (pcr->is_runtime_suspended) { in rtsx_pci_start_run()
157 pm_runtime_get(&(pcr->pci->dev)); in rtsx_pci_start_run()
158 pcr->is_runtime_suspended = false; in rtsx_pci_start_run()
161 if (pcr->state != PDEV_STAT_RUN) { in rtsx_pci_start_run()
162 pcr->state = PDEV_STAT_RUN; in rtsx_pci_start_run()
163 if (pcr->ops->enable_auto_blink) in rtsx_pci_start_run()
164 pcr->ops->enable_auto_blink(pcr); in rtsx_pci_start_run()
165 rtsx_pm_full_on(pcr); in rtsx_pci_start_run()
168 mod_delayed_work(system_wq, &pcr->idle_work, msecs_to_jiffies(200)); in rtsx_pci_start_run()
172 int rtsx_pci_write_register(struct rtsx_pcr *pcr, u16 addr, u8 mask, u8 data) in rtsx_pci_write_register() argument
181 rtsx_pci_writel(pcr, RTSX_HAIMR, val); in rtsx_pci_write_register()
184 val = rtsx_pci_readl(pcr, RTSX_HAIMR); in rtsx_pci_write_register()
196 int rtsx_pci_read_register(struct rtsx_pcr *pcr, u16 addr, u8 *data) in rtsx_pci_read_register() argument
202 rtsx_pci_writel(pcr, RTSX_HAIMR, val); in rtsx_pci_read_register()
205 val = rtsx_pci_readl(pcr, RTSX_HAIMR); in rtsx_pci_read_register()
220 int __rtsx_pci_write_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 val) in __rtsx_pci_write_phy_register() argument
225 rtsx_pci_write_register(pcr, PHYDATA0, 0xFF, (u8)val); in __rtsx_pci_write_phy_register()
226 rtsx_pci_write_register(pcr, PHYDATA1, 0xFF, (u8)(val >> 8)); in __rtsx_pci_write_phy_register()
227 rtsx_pci_write_register(pcr, PHYADDR, 0xFF, addr); in __rtsx_pci_write_phy_register()
228 rtsx_pci_write_register(pcr, PHYRWCTL, 0xFF, 0x81); in __rtsx_pci_write_phy_register()
231 err = rtsx_pci_read_register(pcr, PHYRWCTL, &tmp); in __rtsx_pci_write_phy_register()
247 int rtsx_pci_write_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 val) in rtsx_pci_write_phy_register() argument
249 if (pcr->ops->write_phy) in rtsx_pci_write_phy_register()
250 return pcr->ops->write_phy(pcr, addr, val); in rtsx_pci_write_phy_register()
252 return __rtsx_pci_write_phy_register(pcr, addr, val); in rtsx_pci_write_phy_register()
256 int __rtsx_pci_read_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 *val) in __rtsx_pci_read_phy_register() argument
262 rtsx_pci_write_register(pcr, PHYADDR, 0xFF, addr); in __rtsx_pci_read_phy_register()
263 rtsx_pci_write_register(pcr, PHYRWCTL, 0xFF, 0x80); in __rtsx_pci_read_phy_register()
266 err = rtsx_pci_read_register(pcr, PHYRWCTL, &tmp); in __rtsx_pci_read_phy_register()
279 rtsx_pci_read_register(pcr, PHYDATA0, &val1); in __rtsx_pci_read_phy_register()
280 rtsx_pci_read_register(pcr, PHYDATA1, &val2); in __rtsx_pci_read_phy_register()
289 int rtsx_pci_read_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 *val) in rtsx_pci_read_phy_register() argument
291 if (pcr->ops->read_phy) in rtsx_pci_read_phy_register()
292 return pcr->ops->read_phy(pcr, addr, val); in rtsx_pci_read_phy_register()
294 return __rtsx_pci_read_phy_register(pcr, addr, val); in rtsx_pci_read_phy_register()
298 void rtsx_pci_stop_cmd(struct rtsx_pcr *pcr) in rtsx_pci_stop_cmd() argument
300 if (pcr->ops->stop_cmd) in rtsx_pci_stop_cmd()
301 return pcr->ops->stop_cmd(pcr); in rtsx_pci_stop_cmd()
303 rtsx_pci_writel(pcr, RTSX_HCBCTLR, STOP_CMD); in rtsx_pci_stop_cmd()
304 rtsx_pci_writel(pcr, RTSX_HDBCTLR, STOP_DMA); in rtsx_pci_stop_cmd()
306 rtsx_pci_write_register(pcr, DMACTL, 0x80, 0x80); in rtsx_pci_stop_cmd()
307 rtsx_pci_write_register(pcr, RBCTL, 0x80, 0x80); in rtsx_pci_stop_cmd()
311 void rtsx_pci_add_cmd(struct rtsx_pcr *pcr, in rtsx_pci_add_cmd() argument
316 u32 *ptr = (u32 *)(pcr->host_cmds_ptr); in rtsx_pci_add_cmd()
323 spin_lock_irqsave(&pcr->lock, flags); in rtsx_pci_add_cmd()
324 ptr += pcr->ci; in rtsx_pci_add_cmd()
325 if (pcr->ci < (HOST_CMDS_BUF_LEN / 4)) { in rtsx_pci_add_cmd()
328 pcr->ci++; in rtsx_pci_add_cmd()
330 spin_unlock_irqrestore(&pcr->lock, flags); in rtsx_pci_add_cmd()
334 void rtsx_pci_send_cmd_no_wait(struct rtsx_pcr *pcr) in rtsx_pci_send_cmd_no_wait() argument
338 rtsx_pci_writel(pcr, RTSX_HCBAR, pcr->host_cmds_addr); in rtsx_pci_send_cmd_no_wait()
340 val |= (u32)(pcr->ci * 4) & 0x00FFFFFF; in rtsx_pci_send_cmd_no_wait()
343 rtsx_pci_writel(pcr, RTSX_HCBCTLR, val); in rtsx_pci_send_cmd_no_wait()
347 int rtsx_pci_send_cmd(struct rtsx_pcr *pcr, int timeout) in rtsx_pci_send_cmd() argument
355 spin_lock_irqsave(&pcr->lock, flags); in rtsx_pci_send_cmd()
358 pcr->done = &trans_done; in rtsx_pci_send_cmd()
359 pcr->trans_result = TRANS_NOT_READY; in rtsx_pci_send_cmd()
362 rtsx_pci_writel(pcr, RTSX_HCBAR, pcr->host_cmds_addr); in rtsx_pci_send_cmd()
364 val |= (u32)(pcr->ci * 4) & 0x00FFFFFF; in rtsx_pci_send_cmd()
367 rtsx_pci_writel(pcr, RTSX_HCBCTLR, val); in rtsx_pci_send_cmd()
369 spin_unlock_irqrestore(&pcr->lock, flags); in rtsx_pci_send_cmd()
375 pcr_dbg(pcr, "Timeout (%s %d)\n", __func__, __LINE__); in rtsx_pci_send_cmd()
380 spin_lock_irqsave(&pcr->lock, flags); in rtsx_pci_send_cmd()
381 if (pcr->trans_result == TRANS_RESULT_FAIL) in rtsx_pci_send_cmd()
383 else if (pcr->trans_result == TRANS_RESULT_OK) in rtsx_pci_send_cmd()
385 else if (pcr->trans_result == TRANS_NO_DEVICE) in rtsx_pci_send_cmd()
387 spin_unlock_irqrestore(&pcr->lock, flags); in rtsx_pci_send_cmd()
390 spin_lock_irqsave(&pcr->lock, flags); in rtsx_pci_send_cmd()
391 pcr->done = NULL; in rtsx_pci_send_cmd()
392 spin_unlock_irqrestore(&pcr->lock, flags); in rtsx_pci_send_cmd()
395 rtsx_pci_stop_cmd(pcr); in rtsx_pci_send_cmd()
397 if (pcr->finish_me) in rtsx_pci_send_cmd()
398 complete(pcr->finish_me); in rtsx_pci_send_cmd()
404 static void rtsx_pci_add_sg_tbl(struct rtsx_pcr *pcr, in rtsx_pci_add_sg_tbl() argument
407 u64 *ptr = (u64 *)(pcr->host_sg_tbl_ptr) + pcr->sgi; in rtsx_pci_add_sg_tbl()
411 pcr_dbg(pcr, "DMA addr: 0x%x, Len: 0x%x\n", (unsigned int)addr, len); in rtsx_pci_add_sg_tbl()
416 if ((PCI_PID(pcr) == PID_5261) || (PCI_PID(pcr) == PID_5228)) { in rtsx_pci_add_sg_tbl()
426 pcr->sgi++; in rtsx_pci_add_sg_tbl()
429 int rtsx_pci_transfer_data(struct rtsx_pcr *pcr, struct scatterlist *sglist, in rtsx_pci_transfer_data() argument
434 pcr_dbg(pcr, "--> %s: num_sg = %d\n", __func__, num_sg); in rtsx_pci_transfer_data()
435 count = rtsx_pci_dma_map_sg(pcr, sglist, num_sg, read); in rtsx_pci_transfer_data()
438 pcr_dbg(pcr, "DMA mapping count: %d\n", count); in rtsx_pci_transfer_data()
440 err = rtsx_pci_dma_transfer(pcr, sglist, count, read, timeout); in rtsx_pci_transfer_data()
442 rtsx_pci_dma_unmap_sg(pcr, sglist, num_sg, read); in rtsx_pci_transfer_data()
448 int rtsx_pci_dma_map_sg(struct rtsx_pcr *pcr, struct scatterlist *sglist, in rtsx_pci_dma_map_sg() argument
453 if (pcr->remove_pci) in rtsx_pci_dma_map_sg()
459 return dma_map_sg(&(pcr->pci->dev), sglist, num_sg, dir); in rtsx_pci_dma_map_sg()
463 void rtsx_pci_dma_unmap_sg(struct rtsx_pcr *pcr, struct scatterlist *sglist, in rtsx_pci_dma_unmap_sg() argument
468 dma_unmap_sg(&(pcr->pci->dev), sglist, num_sg, dir); in rtsx_pci_dma_unmap_sg()
472 int rtsx_pci_dma_transfer(struct rtsx_pcr *pcr, struct scatterlist *sglist, in rtsx_pci_dma_transfer() argument
485 if (pcr->remove_pci) in rtsx_pci_dma_transfer()
492 pcr->sgi = 0; in rtsx_pci_dma_transfer()
496 rtsx_pci_add_sg_tbl(pcr, addr, len, i == count - 1); in rtsx_pci_dma_transfer()
499 spin_lock_irqsave(&pcr->lock, flags); in rtsx_pci_dma_transfer()
501 pcr->done = &trans_done; in rtsx_pci_dma_transfer()
502 pcr->trans_result = TRANS_NOT_READY; in rtsx_pci_dma_transfer()
504 rtsx_pci_writel(pcr, RTSX_HDBAR, pcr->host_sg_tbl_addr); in rtsx_pci_dma_transfer()
505 rtsx_pci_writel(pcr, RTSX_HDBCTLR, val); in rtsx_pci_dma_transfer()
507 spin_unlock_irqrestore(&pcr->lock, flags); in rtsx_pci_dma_transfer()
512 pcr_dbg(pcr, "Timeout (%s %d)\n", __func__, __LINE__); in rtsx_pci_dma_transfer()
517 spin_lock_irqsave(&pcr->lock, flags); in rtsx_pci_dma_transfer()
518 if (pcr->trans_result == TRANS_RESULT_FAIL) { in rtsx_pci_dma_transfer()
520 if (pcr->dma_error_count < RTS_MAX_TIMES_FREQ_REDUCTION) in rtsx_pci_dma_transfer()
521 pcr->dma_error_count++; in rtsx_pci_dma_transfer()
524 else if (pcr->trans_result == TRANS_NO_DEVICE) in rtsx_pci_dma_transfer()
526 spin_unlock_irqrestore(&pcr->lock, flags); in rtsx_pci_dma_transfer()
529 spin_lock_irqsave(&pcr->lock, flags); in rtsx_pci_dma_transfer()
530 pcr->done = NULL; in rtsx_pci_dma_transfer()
531 spin_unlock_irqrestore(&pcr->lock, flags); in rtsx_pci_dma_transfer()
534 rtsx_pci_stop_cmd(pcr); in rtsx_pci_dma_transfer()
536 if (pcr->finish_me) in rtsx_pci_dma_transfer()
537 complete(pcr->finish_me); in rtsx_pci_dma_transfer()
543 int rtsx_pci_read_ppbuf(struct rtsx_pcr *pcr, u8 *buf, int buf_len) in rtsx_pci_read_ppbuf() argument
556 rtsx_pci_init_cmd(pcr); in rtsx_pci_read_ppbuf()
559 rtsx_pci_add_cmd(pcr, READ_REG_CMD, reg++, 0, 0); in rtsx_pci_read_ppbuf()
561 err = rtsx_pci_send_cmd(pcr, 250); in rtsx_pci_read_ppbuf()
565 memcpy(ptr, rtsx_pci_get_cmd_data(pcr), 256); in rtsx_pci_read_ppbuf()
570 rtsx_pci_init_cmd(pcr); in rtsx_pci_read_ppbuf()
573 rtsx_pci_add_cmd(pcr, READ_REG_CMD, reg++, 0, 0); in rtsx_pci_read_ppbuf()
575 err = rtsx_pci_send_cmd(pcr, 250); in rtsx_pci_read_ppbuf()
580 memcpy(ptr, rtsx_pci_get_cmd_data(pcr), buf_len % 256); in rtsx_pci_read_ppbuf()
586 int rtsx_pci_write_ppbuf(struct rtsx_pcr *pcr, u8 *buf, int buf_len) in rtsx_pci_write_ppbuf() argument
599 rtsx_pci_init_cmd(pcr); in rtsx_pci_write_ppbuf()
602 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, in rtsx_pci_write_ppbuf()
607 err = rtsx_pci_send_cmd(pcr, 250); in rtsx_pci_write_ppbuf()
613 rtsx_pci_init_cmd(pcr); in rtsx_pci_write_ppbuf()
616 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, in rtsx_pci_write_ppbuf()
621 err = rtsx_pci_send_cmd(pcr, 250); in rtsx_pci_write_ppbuf()
630 static int rtsx_pci_set_pull_ctl(struct rtsx_pcr *pcr, const u32 *tbl) in rtsx_pci_set_pull_ctl() argument
632 rtsx_pci_init_cmd(pcr); in rtsx_pci_set_pull_ctl()
635 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, in rtsx_pci_set_pull_ctl()
640 return rtsx_pci_send_cmd(pcr, 100); in rtsx_pci_set_pull_ctl()
643 int rtsx_pci_card_pull_ctl_enable(struct rtsx_pcr *pcr, int card) in rtsx_pci_card_pull_ctl_enable() argument
648 tbl = pcr->sd_pull_ctl_enable_tbl; in rtsx_pci_card_pull_ctl_enable()
650 tbl = pcr->ms_pull_ctl_enable_tbl; in rtsx_pci_card_pull_ctl_enable()
654 return rtsx_pci_set_pull_ctl(pcr, tbl); in rtsx_pci_card_pull_ctl_enable()
658 int rtsx_pci_card_pull_ctl_disable(struct rtsx_pcr *pcr, int card) in rtsx_pci_card_pull_ctl_disable() argument
663 tbl = pcr->sd_pull_ctl_disable_tbl; in rtsx_pci_card_pull_ctl_disable()
665 tbl = pcr->ms_pull_ctl_disable_tbl; in rtsx_pci_card_pull_ctl_disable()
669 return rtsx_pci_set_pull_ctl(pcr, tbl); in rtsx_pci_card_pull_ctl_disable()
673 static void rtsx_pci_enable_bus_int(struct rtsx_pcr *pcr) in rtsx_pci_enable_bus_int() argument
675 struct rtsx_hw_param *hw_param = &pcr->hw_param; in rtsx_pci_enable_bus_int()
677 pcr->bier = TRANS_OK_INT_EN | TRANS_FAIL_INT_EN | SD_INT_EN in rtsx_pci_enable_bus_int()
680 if (pcr->num_slots > 1) in rtsx_pci_enable_bus_int()
681 pcr->bier |= MS_INT_EN; in rtsx_pci_enable_bus_int()
684 rtsx_pci_writel(pcr, RTSX_BIER, pcr->bier); in rtsx_pci_enable_bus_int()
686 pcr_dbg(pcr, "RTSX_BIER: 0x%08x\n", pcr->bier); in rtsx_pci_enable_bus_int()
706 int rtsx_pci_switch_clock(struct rtsx_pcr *pcr, unsigned int card_clock, in rtsx_pci_switch_clock() argument
719 if (PCI_PID(pcr) == PID_5261) in rtsx_pci_switch_clock()
720 return rts5261_pci_switch_clock(pcr, card_clock, in rtsx_pci_switch_clock()
722 if (PCI_PID(pcr) == PID_5228) in rtsx_pci_switch_clock()
723 return rts5228_pci_switch_clock(pcr, card_clock, in rtsx_pci_switch_clock()
733 err = rtsx_pci_write_register(pcr, SD_CFG1, in rtsx_pci_switch_clock()
740 pcr->dma_error_count && in rtsx_pci_switch_clock()
741 PCI_PID(pcr) == RTS5227_DEVICE_ID) in rtsx_pci_switch_clock()
743 (pcr->dma_error_count * 20000000); in rtsx_pci_switch_clock()
746 pcr_dbg(pcr, "Switch card clock to %dMHz\n", card_clock); in rtsx_pci_switch_clock()
751 pcr_dbg(pcr, "Internal SSC clock: %dMHz (cur_clock = %d)\n", in rtsx_pci_switch_clock()
752 clk, pcr->cur_clock); in rtsx_pci_switch_clock()
754 if (clk == pcr->cur_clock) in rtsx_pci_switch_clock()
757 if (pcr->ops->conv_clk_and_div_n) in rtsx_pci_switch_clock()
758 n = (u8)pcr->ops->conv_clk_and_div_n(clk, CLK_TO_DIV_N); in rtsx_pci_switch_clock()
771 if (pcr->ops->conv_clk_and_div_n) { in rtsx_pci_switch_clock()
772 int dbl_clk = pcr->ops->conv_clk_and_div_n(n, in rtsx_pci_switch_clock()
774 n = (u8)pcr->ops->conv_clk_and_div_n(dbl_clk, in rtsx_pci_switch_clock()
781 pcr_dbg(pcr, "n = %d, div = %d\n", n, div); in rtsx_pci_switch_clock()
788 pcr_dbg(pcr, "ssc_depth = %d\n", ssc_depth); in rtsx_pci_switch_clock()
790 rtsx_pci_init_cmd(pcr); in rtsx_pci_switch_clock()
791 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, in rtsx_pci_switch_clock()
793 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_DIV, in rtsx_pci_switch_clock()
795 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL1, SSC_RSTB, 0); in rtsx_pci_switch_clock()
796 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL2, in rtsx_pci_switch_clock()
798 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_DIV_N_0, 0xFF, n); in rtsx_pci_switch_clock()
799 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL1, SSC_RSTB, SSC_RSTB); in rtsx_pci_switch_clock()
801 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_VPCLK0_CTL, in rtsx_pci_switch_clock()
803 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_VPCLK0_CTL, in rtsx_pci_switch_clock()
807 err = rtsx_pci_send_cmd(pcr, 2000); in rtsx_pci_switch_clock()
813 err = rtsx_pci_write_register(pcr, CLK_CTL, CLK_LOW_FREQ, 0); in rtsx_pci_switch_clock()
817 pcr->cur_clock = clk; in rtsx_pci_switch_clock()
822 int rtsx_pci_card_power_on(struct rtsx_pcr *pcr, int card) in rtsx_pci_card_power_on() argument
824 if (pcr->ops->card_power_on) in rtsx_pci_card_power_on()
825 return pcr->ops->card_power_on(pcr, card); in rtsx_pci_card_power_on()
831 int rtsx_pci_card_power_off(struct rtsx_pcr *pcr, int card) in rtsx_pci_card_power_off() argument
833 if (pcr->ops->card_power_off) in rtsx_pci_card_power_off()
834 return pcr->ops->card_power_off(pcr, card); in rtsx_pci_card_power_off()
840 int rtsx_pci_card_exclusive_check(struct rtsx_pcr *pcr, int card) in rtsx_pci_card_exclusive_check() argument
847 if (!(pcr->flags & PCR_MS_PMOS)) { in rtsx_pci_card_exclusive_check()
851 if (pcr->card_exist & (~cd_mask[card])) in rtsx_pci_card_exclusive_check()
859 int rtsx_pci_switch_output_voltage(struct rtsx_pcr *pcr, u8 voltage) in rtsx_pci_switch_output_voltage() argument
861 if (pcr->ops->switch_output_voltage) in rtsx_pci_switch_output_voltage()
862 return pcr->ops->switch_output_voltage(pcr, voltage); in rtsx_pci_switch_output_voltage()
868 unsigned int rtsx_pci_card_exist(struct rtsx_pcr *pcr) in rtsx_pci_card_exist() argument
872 val = rtsx_pci_readl(pcr, RTSX_BIPR); in rtsx_pci_card_exist()
873 if (pcr->ops->cd_deglitch) in rtsx_pci_card_exist()
874 val = pcr->ops->cd_deglitch(pcr); in rtsx_pci_card_exist()
880 void rtsx_pci_complete_unfinished_transfer(struct rtsx_pcr *pcr) in rtsx_pci_complete_unfinished_transfer() argument
884 pcr->finish_me = &finish; in rtsx_pci_complete_unfinished_transfer()
887 if (pcr->done) in rtsx_pci_complete_unfinished_transfer()
888 complete(pcr->done); in rtsx_pci_complete_unfinished_transfer()
890 if (!pcr->remove_pci) in rtsx_pci_complete_unfinished_transfer()
891 rtsx_pci_stop_cmd(pcr); in rtsx_pci_complete_unfinished_transfer()
895 pcr->finish_me = NULL; in rtsx_pci_complete_unfinished_transfer()
902 struct rtsx_pcr *pcr; in rtsx_pci_card_detect() local
908 pcr = container_of(dwork, struct rtsx_pcr, carddet_work); in rtsx_pci_card_detect()
910 pcr_dbg(pcr, "--> %s\n", __func__); in rtsx_pci_card_detect()
912 mutex_lock(&pcr->pcr_mutex); in rtsx_pci_card_detect()
913 spin_lock_irqsave(&pcr->lock, flags); in rtsx_pci_card_detect()
915 irq_status = rtsx_pci_readl(pcr, RTSX_BIPR); in rtsx_pci_card_detect()
916 pcr_dbg(pcr, "irq_status: 0x%08x\n", irq_status); in rtsx_pci_card_detect()
919 card_inserted = pcr->card_inserted & irq_status; in rtsx_pci_card_detect()
920 card_removed = pcr->card_removed; in rtsx_pci_card_detect()
921 pcr->card_inserted = 0; in rtsx_pci_card_detect()
922 pcr->card_removed = 0; in rtsx_pci_card_detect()
924 spin_unlock_irqrestore(&pcr->lock, flags); in rtsx_pci_card_detect()
927 pcr_dbg(pcr, "card_inserted: 0x%x, card_removed: 0x%x\n", in rtsx_pci_card_detect()
930 if (pcr->ops->cd_deglitch) in rtsx_pci_card_detect()
931 card_inserted = pcr->ops->cd_deglitch(pcr); in rtsx_pci_card_detect()
935 pcr->card_exist |= card_inserted; in rtsx_pci_card_detect()
936 pcr->card_exist &= ~card_removed; in rtsx_pci_card_detect()
939 mutex_unlock(&pcr->pcr_mutex); in rtsx_pci_card_detect()
941 if ((card_detect & SD_EXIST) && pcr->slots[RTSX_SD_CARD].card_event) in rtsx_pci_card_detect()
942 pcr->slots[RTSX_SD_CARD].card_event( in rtsx_pci_card_detect()
943 pcr->slots[RTSX_SD_CARD].p_dev); in rtsx_pci_card_detect()
944 if ((card_detect & MS_EXIST) && pcr->slots[RTSX_MS_CARD].card_event) in rtsx_pci_card_detect()
945 pcr->slots[RTSX_MS_CARD].card_event( in rtsx_pci_card_detect()
946 pcr->slots[RTSX_MS_CARD].p_dev); in rtsx_pci_card_detect()
949 static void rtsx_pci_process_ocp(struct rtsx_pcr *pcr) in rtsx_pci_process_ocp() argument
951 if (pcr->ops->process_ocp) { in rtsx_pci_process_ocp()
952 pcr->ops->process_ocp(pcr); in rtsx_pci_process_ocp()
954 if (!pcr->option.ocp_en) in rtsx_pci_process_ocp()
956 rtsx_pci_get_ocpstat(pcr, &pcr->ocp_stat); in rtsx_pci_process_ocp()
957 if (pcr->ocp_stat & (SD_OC_NOW | SD_OC_EVER)) { in rtsx_pci_process_ocp()
958 rtsx_pci_card_power_off(pcr, RTSX_SD_CARD); in rtsx_pci_process_ocp()
959 rtsx_pci_write_register(pcr, CARD_OE, SD_OUTPUT_EN, 0); in rtsx_pci_process_ocp()
960 rtsx_pci_clear_ocpstat(pcr); in rtsx_pci_process_ocp()
961 pcr->ocp_stat = 0; in rtsx_pci_process_ocp()
966 static int rtsx_pci_process_ocp_interrupt(struct rtsx_pcr *pcr) in rtsx_pci_process_ocp_interrupt() argument
968 if (pcr->option.ocp_en) in rtsx_pci_process_ocp_interrupt()
969 rtsx_pci_process_ocp(pcr); in rtsx_pci_process_ocp_interrupt()
976 struct rtsx_pcr *pcr = dev_id; in rtsx_pci_isr() local
979 if (!pcr) in rtsx_pci_isr()
982 spin_lock(&pcr->lock); in rtsx_pci_isr()
984 int_reg = rtsx_pci_readl(pcr, RTSX_BIPR); in rtsx_pci_isr()
986 rtsx_pci_writel(pcr, RTSX_BIPR, int_reg); in rtsx_pci_isr()
987 if ((int_reg & pcr->bier) == 0) { in rtsx_pci_isr()
988 spin_unlock(&pcr->lock); in rtsx_pci_isr()
992 spin_unlock(&pcr->lock); in rtsx_pci_isr()
996 int_reg &= (pcr->bier | 0x7FFFFF); in rtsx_pci_isr()
999 rtsx_pci_process_ocp_interrupt(pcr); in rtsx_pci_isr()
1003 pcr->card_inserted |= SD_EXIST; in rtsx_pci_isr()
1005 pcr->card_removed |= SD_EXIST; in rtsx_pci_isr()
1006 pcr->card_inserted &= ~SD_EXIST; in rtsx_pci_isr()
1007 if (PCI_PID(pcr) == PID_5261) { in rtsx_pci_isr()
1008 rtsx_pci_write_register(pcr, RTS5261_FW_STATUS, in rtsx_pci_isr()
1010 pcr->extra_caps |= EXTRA_CAPS_SD_EXPRESS; in rtsx_pci_isr()
1013 pcr->dma_error_count = 0; in rtsx_pci_isr()
1018 pcr->card_inserted |= MS_EXIST; in rtsx_pci_isr()
1020 pcr->card_removed |= MS_EXIST; in rtsx_pci_isr()
1021 pcr->card_inserted &= ~MS_EXIST; in rtsx_pci_isr()
1027 pcr->trans_result = TRANS_RESULT_FAIL; in rtsx_pci_isr()
1028 if (pcr->done) in rtsx_pci_isr()
1029 complete(pcr->done); in rtsx_pci_isr()
1031 pcr->trans_result = TRANS_RESULT_OK; in rtsx_pci_isr()
1032 if (pcr->done) in rtsx_pci_isr()
1033 complete(pcr->done); in rtsx_pci_isr()
1037 if ((pcr->card_inserted || pcr->card_removed) && !(int_reg & SD_OC_INT)) in rtsx_pci_isr()
1038 schedule_delayed_work(&pcr->carddet_work, in rtsx_pci_isr()
1041 spin_unlock(&pcr->lock); in rtsx_pci_isr()
1045 static int rtsx_pci_acquire_irq(struct rtsx_pcr *pcr) in rtsx_pci_acquire_irq() argument
1047 pcr_dbg(pcr, "%s: pcr->msi_en = %d, pci->irq = %d\n", in rtsx_pci_acquire_irq()
1048 __func__, pcr->msi_en, pcr->pci->irq); in rtsx_pci_acquire_irq()
1050 if (request_irq(pcr->pci->irq, rtsx_pci_isr, in rtsx_pci_acquire_irq()
1051 pcr->msi_en ? 0 : IRQF_SHARED, in rtsx_pci_acquire_irq()
1052 DRV_NAME_RTSX_PCI, pcr)) { in rtsx_pci_acquire_irq()
1053 dev_err(&(pcr->pci->dev), in rtsx_pci_acquire_irq()
1055 pcr->pci->irq); in rtsx_pci_acquire_irq()
1059 pcr->irq = pcr->pci->irq; in rtsx_pci_acquire_irq()
1060 pci_intx(pcr->pci, !pcr->msi_en); in rtsx_pci_acquire_irq()
1065 static void rtsx_enable_aspm(struct rtsx_pcr *pcr) in rtsx_enable_aspm() argument
1067 if (pcr->ops->set_aspm) in rtsx_enable_aspm()
1068 pcr->ops->set_aspm(pcr, true); in rtsx_enable_aspm()
1070 rtsx_comm_set_aspm(pcr, true); in rtsx_enable_aspm()
1073 static void rtsx_comm_pm_power_saving(struct rtsx_pcr *pcr) in rtsx_comm_pm_power_saving() argument
1075 struct rtsx_cr_option *option = &pcr->option; in rtsx_comm_pm_power_saving()
1080 if (rtsx_check_dev_flag(pcr, L1_SNOOZE_TEST_EN)) in rtsx_comm_pm_power_saving()
1083 rtsx_set_ltr_latency(pcr, latency); in rtsx_comm_pm_power_saving()
1086 if (rtsx_check_dev_flag(pcr, LTR_L1SS_PWR_GATE_EN)) in rtsx_comm_pm_power_saving()
1087 rtsx_set_l1off_sub_cfg_d0(pcr, 0); in rtsx_comm_pm_power_saving()
1089 rtsx_enable_aspm(pcr); in rtsx_comm_pm_power_saving()
1092 static void rtsx_pm_power_saving(struct rtsx_pcr *pcr) in rtsx_pm_power_saving() argument
1094 rtsx_comm_pm_power_saving(pcr); in rtsx_pm_power_saving()
1100 struct rtsx_pcr *pcr = container_of(dwork, struct rtsx_pcr, rtd3_work); in rtsx_pci_rtd3_work() local
1102 pcr_dbg(pcr, "--> %s\n", __func__); in rtsx_pci_rtd3_work()
1103 if (!pcr->is_runtime_suspended) in rtsx_pci_rtd3_work()
1104 pm_runtime_put(&(pcr->pci->dev)); in rtsx_pci_rtd3_work()
1110 struct rtsx_pcr *pcr = container_of(dwork, struct rtsx_pcr, idle_work); in rtsx_pci_idle_work() local
1112 pcr_dbg(pcr, "--> %s\n", __func__); in rtsx_pci_idle_work()
1114 mutex_lock(&pcr->pcr_mutex); in rtsx_pci_idle_work()
1116 pcr->state = PDEV_STAT_IDLE; in rtsx_pci_idle_work()
1118 if (pcr->ops->disable_auto_blink) in rtsx_pci_idle_work()
1119 pcr->ops->disable_auto_blink(pcr); in rtsx_pci_idle_work()
1120 if (pcr->ops->turn_off_led) in rtsx_pci_idle_work()
1121 pcr->ops->turn_off_led(pcr); in rtsx_pci_idle_work()
1123 rtsx_pm_power_saving(pcr); in rtsx_pci_idle_work()
1125 mutex_unlock(&pcr->pcr_mutex); in rtsx_pci_idle_work()
1127 if (pcr->rtd3_en) in rtsx_pci_idle_work()
1128 mod_delayed_work(system_wq, &pcr->rtd3_work, msecs_to_jiffies(10000)); in rtsx_pci_idle_work()
1131 static void rtsx_base_force_power_down(struct rtsx_pcr *pcr, u8 pm_state) in rtsx_base_force_power_down() argument
1134 rtsx_pci_write_register(pcr, AUTOLOAD_CFG_BASE + 1, MASK_8_BIT_DEF, 0); in rtsx_base_force_power_down()
1135 rtsx_pci_write_register(pcr, AUTOLOAD_CFG_BASE + 2, MASK_8_BIT_DEF, 0); in rtsx_base_force_power_down()
1136 rtsx_pci_write_register(pcr, AUTOLOAD_CFG_BASE + 3, in rtsx_base_force_power_down()
1139 rtsx_pci_write_register(pcr, pcr->reg_pm_ctrl3, in rtsx_base_force_power_down()
1142 rtsx_pci_write_register(pcr, FPDCTL, ALL_POWER_DOWN, ALL_POWER_DOWN); in rtsx_base_force_power_down()
1145 static void __maybe_unused rtsx_pci_power_off(struct rtsx_pcr *pcr, u8 pm_state) in rtsx_pci_power_off() argument
1147 if (pcr->ops->turn_off_led) in rtsx_pci_power_off()
1148 pcr->ops->turn_off_led(pcr); in rtsx_pci_power_off()
1150 rtsx_pci_writel(pcr, RTSX_BIER, 0); in rtsx_pci_power_off()
1151 pcr->bier = 0; in rtsx_pci_power_off()
1153 rtsx_pci_write_register(pcr, PETXCFG, 0x08, 0x08); in rtsx_pci_power_off()
1154 rtsx_pci_write_register(pcr, HOST_SLEEP_STATE, 0x03, pm_state); in rtsx_pci_power_off()
1156 if (pcr->ops->force_power_down) in rtsx_pci_power_off()
1157 pcr->ops->force_power_down(pcr, pm_state); in rtsx_pci_power_off()
1159 rtsx_base_force_power_down(pcr, pm_state); in rtsx_pci_power_off()
1162 void rtsx_pci_enable_ocp(struct rtsx_pcr *pcr) in rtsx_pci_enable_ocp() argument
1166 if (pcr->ops->enable_ocp) { in rtsx_pci_enable_ocp()
1167 pcr->ops->enable_ocp(pcr); in rtsx_pci_enable_ocp()
1169 rtsx_pci_write_register(pcr, FPDCTL, OC_POWER_DOWN, 0); in rtsx_pci_enable_ocp()
1170 rtsx_pci_write_register(pcr, REG_OCPCTL, 0xFF, val); in rtsx_pci_enable_ocp()
1175 void rtsx_pci_disable_ocp(struct rtsx_pcr *pcr) in rtsx_pci_disable_ocp() argument
1179 if (pcr->ops->disable_ocp) { in rtsx_pci_disable_ocp()
1180 pcr->ops->disable_ocp(pcr); in rtsx_pci_disable_ocp()
1182 rtsx_pci_write_register(pcr, REG_OCPCTL, mask, 0); in rtsx_pci_disable_ocp()
1183 rtsx_pci_write_register(pcr, FPDCTL, OC_POWER_DOWN, in rtsx_pci_disable_ocp()
1188 void rtsx_pci_init_ocp(struct rtsx_pcr *pcr) in rtsx_pci_init_ocp() argument
1190 if (pcr->ops->init_ocp) { in rtsx_pci_init_ocp()
1191 pcr->ops->init_ocp(pcr); in rtsx_pci_init_ocp()
1193 struct rtsx_cr_option *option = &(pcr->option); in rtsx_pci_init_ocp()
1198 rtsx_pci_write_register(pcr, FPDCTL, OC_POWER_DOWN, 0); in rtsx_pci_init_ocp()
1199 rtsx_pci_write_register(pcr, REG_OCPPARA1, in rtsx_pci_init_ocp()
1201 rtsx_pci_write_register(pcr, REG_OCPPARA2, in rtsx_pci_init_ocp()
1203 rtsx_pci_write_register(pcr, REG_OCPGLITCH, in rtsx_pci_init_ocp()
1204 SD_OCP_GLITCH_MASK, pcr->hw_param.ocp_glitch); in rtsx_pci_init_ocp()
1205 rtsx_pci_enable_ocp(pcr); in rtsx_pci_init_ocp()
1210 int rtsx_pci_get_ocpstat(struct rtsx_pcr *pcr, u8 *val) in rtsx_pci_get_ocpstat() argument
1212 if (pcr->ops->get_ocpstat) in rtsx_pci_get_ocpstat()
1213 return pcr->ops->get_ocpstat(pcr, val); in rtsx_pci_get_ocpstat()
1215 return rtsx_pci_read_register(pcr, REG_OCPSTAT, val); in rtsx_pci_get_ocpstat()
1218 void rtsx_pci_clear_ocpstat(struct rtsx_pcr *pcr) in rtsx_pci_clear_ocpstat() argument
1220 if (pcr->ops->clear_ocpstat) { in rtsx_pci_clear_ocpstat()
1221 pcr->ops->clear_ocpstat(pcr); in rtsx_pci_clear_ocpstat()
1226 rtsx_pci_write_register(pcr, REG_OCPCTL, mask, val); in rtsx_pci_clear_ocpstat()
1228 rtsx_pci_write_register(pcr, REG_OCPCTL, mask, 0); in rtsx_pci_clear_ocpstat()
1232 void rtsx_pci_enable_oobs_polling(struct rtsx_pcr *pcr) in rtsx_pci_enable_oobs_polling() argument
1236 if ((PCI_PID(pcr) != PID_525A) && (PCI_PID(pcr) != PID_5260)) { in rtsx_pci_enable_oobs_polling()
1237 rtsx_pci_read_phy_register(pcr, 0x01, &val); in rtsx_pci_enable_oobs_polling()
1239 rtsx_pci_write_phy_register(pcr, 0x01, val); in rtsx_pci_enable_oobs_polling()
1241 rtsx_pci_write_register(pcr, REG_CFG_OOBS_OFF_TIMER, 0xFF, 0x32); in rtsx_pci_enable_oobs_polling()
1242 rtsx_pci_write_register(pcr, REG_CFG_OOBS_ON_TIMER, 0xFF, 0x05); in rtsx_pci_enable_oobs_polling()
1243 rtsx_pci_write_register(pcr, REG_CFG_VCM_ON_TIMER, 0xFF, 0x83); in rtsx_pci_enable_oobs_polling()
1244 rtsx_pci_write_register(pcr, REG_CFG_OOBS_POLLING, 0xFF, 0xDE); in rtsx_pci_enable_oobs_polling()
1248 void rtsx_pci_disable_oobs_polling(struct rtsx_pcr *pcr) in rtsx_pci_disable_oobs_polling() argument
1252 if ((PCI_PID(pcr) != PID_525A) && (PCI_PID(pcr) != PID_5260)) { in rtsx_pci_disable_oobs_polling()
1253 rtsx_pci_read_phy_register(pcr, 0x01, &val); in rtsx_pci_disable_oobs_polling()
1255 rtsx_pci_write_phy_register(pcr, 0x01, val); in rtsx_pci_disable_oobs_polling()
1257 rtsx_pci_write_register(pcr, REG_CFG_VCM_ON_TIMER, 0xFF, 0x03); in rtsx_pci_disable_oobs_polling()
1258 rtsx_pci_write_register(pcr, REG_CFG_OOBS_POLLING, 0xFF, 0x00); in rtsx_pci_disable_oobs_polling()
1262 int rtsx_sd_power_off_card3v3(struct rtsx_pcr *pcr) in rtsx_sd_power_off_card3v3() argument
1264 rtsx_pci_write_register(pcr, CARD_CLK_EN, SD_CLK_EN | in rtsx_sd_power_off_card3v3()
1266 rtsx_pci_write_register(pcr, CARD_OE, SD_OUTPUT_EN, 0); in rtsx_sd_power_off_card3v3()
1267 rtsx_pci_card_power_off(pcr, RTSX_SD_CARD); in rtsx_sd_power_off_card3v3()
1271 rtsx_pci_card_pull_ctl_disable(pcr, RTSX_SD_CARD); in rtsx_sd_power_off_card3v3()
1276 int rtsx_ms_power_off_card3v3(struct rtsx_pcr *pcr) in rtsx_ms_power_off_card3v3() argument
1278 rtsx_pci_write_register(pcr, CARD_CLK_EN, SD_CLK_EN | in rtsx_ms_power_off_card3v3()
1281 rtsx_pci_card_pull_ctl_disable(pcr, RTSX_MS_CARD); in rtsx_ms_power_off_card3v3()
1283 rtsx_pci_write_register(pcr, CARD_OE, MS_OUTPUT_EN, 0); in rtsx_ms_power_off_card3v3()
1284 rtsx_pci_card_power_off(pcr, RTSX_MS_CARD); in rtsx_ms_power_off_card3v3()
1289 static int rtsx_pci_init_hw(struct rtsx_pcr *pcr) in rtsx_pci_init_hw() argument
1291 struct pci_dev *pdev = pcr->pci; in rtsx_pci_init_hw()
1294 if (PCI_PID(pcr) == PID_5228) in rtsx_pci_init_hw()
1295 rtsx_pci_write_register(pcr, RTS5228_LDO1_CFG1, RTS5228_LDO1_SR_TIME_MASK, in rtsx_pci_init_hw()
1298 rtsx_pci_writel(pcr, RTSX_HCBAR, pcr->host_cmds_addr); in rtsx_pci_init_hw()
1300 rtsx_pci_enable_bus_int(pcr); in rtsx_pci_init_hw()
1303 if (PCI_PID(pcr) == PID_5261) { in rtsx_pci_init_hw()
1305 err = rtsx_pci_write_register(pcr, RTS5261_FW_CFG1, in rtsx_pci_init_hw()
1307 err = rtsx_pci_write_register(pcr, RTS5261_REG_FPDCTL, in rtsx_pci_init_hw()
1310 err = rtsx_pci_write_register(pcr, FPDCTL, SSC_POWER_DOWN, 0); in rtsx_pci_init_hw()
1318 rtsx_disable_aspm(pcr); in rtsx_pci_init_hw()
1319 if (pcr->ops->optimize_phy) { in rtsx_pci_init_hw()
1320 err = pcr->ops->optimize_phy(pcr); in rtsx_pci_init_hw()
1325 rtsx_pci_init_cmd(pcr); in rtsx_pci_init_hw()
1328 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_DIV, 0x07, 0x07); in rtsx_pci_init_hw()
1330 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, HOST_SLEEP_STATE, 0x03, 0x00); in rtsx_pci_init_hw()
1332 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_CLK_EN, 0x1E, 0); in rtsx_pci_init_hw()
1334 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CHANGE_LINK_STATE, 0x0A, 0); in rtsx_pci_init_hw()
1336 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_DRIVE_SEL, in rtsx_pci_init_hw()
1337 0xFF, pcr->card_drive_sel); in rtsx_pci_init_hw()
1339 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL1, in rtsx_pci_init_hw()
1341 if (PCI_PID(pcr) == PID_5261) in rtsx_pci_init_hw()
1342 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL2, 0xFF, in rtsx_pci_init_hw()
1344 else if (PCI_PID(pcr) == PID_5228) in rtsx_pci_init_hw()
1345 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL2, 0xFF, in rtsx_pci_init_hw()
1348 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL2, 0xFF, 0x12); in rtsx_pci_init_hw()
1351 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CHANGE_LINK_STATE, 0x16, 0x10); in rtsx_pci_init_hw()
1353 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, IRQSTAT0, in rtsx_pci_init_hw()
1358 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PERST_GLITCH_WIDTH, 0xFF, 0x80); in rtsx_pci_init_hw()
1363 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, RCCTL, 0x01, 0x00); in rtsx_pci_init_hw()
1369 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, NFTS_TX_CTRL, 0x02, 0); in rtsx_pci_init_hw()
1371 err = rtsx_pci_send_cmd(pcr, 100); in rtsx_pci_init_hw()
1375 switch (PCI_PID(pcr)) { in rtsx_pci_init_hw()
1382 rtsx_pci_write_register(pcr, PM_CLK_FORCE_CTL, 1, 1); in rtsx_pci_init_hw()
1389 rtsx_pci_init_ocp(pcr); in rtsx_pci_init_hw()
1392 pcie_capability_clear_and_set_word(pcr->pci, PCI_EXP_LNKCTL, in rtsx_pci_init_hw()
1397 if (pcr->ops->extra_init_hw) { in rtsx_pci_init_hw()
1398 err = pcr->ops->extra_init_hw(pcr); in rtsx_pci_init_hw()
1403 if (pcr->aspm_mode == ASPM_MODE_REG) in rtsx_pci_init_hw()
1404 rtsx_pci_write_register(pcr, ASPM_FORCE_CTL, 0x30, 0x30); in rtsx_pci_init_hw()
1409 if (pcr->ops->cd_deglitch) in rtsx_pci_init_hw()
1410 pcr->card_exist = pcr->ops->cd_deglitch(pcr); in rtsx_pci_init_hw()
1412 pcr->card_exist = rtsx_pci_readl(pcr, RTSX_BIPR) & CARD_EXIST; in rtsx_pci_init_hw()
1417 static int rtsx_pci_init_chip(struct rtsx_pcr *pcr) in rtsx_pci_init_chip() argument
1423 spin_lock_init(&pcr->lock); in rtsx_pci_init_chip()
1424 mutex_init(&pcr->pcr_mutex); in rtsx_pci_init_chip()
1426 switch (PCI_PID(pcr)) { in rtsx_pci_init_chip()
1429 rts5209_init_params(pcr); in rtsx_pci_init_chip()
1433 rts5229_init_params(pcr); in rtsx_pci_init_chip()
1437 rtl8411_init_params(pcr); in rtsx_pci_init_chip()
1441 rts5227_init_params(pcr); in rtsx_pci_init_chip()
1445 rts522a_init_params(pcr); in rtsx_pci_init_chip()
1449 rts5249_init_params(pcr); in rtsx_pci_init_chip()
1453 rts524a_init_params(pcr); in rtsx_pci_init_chip()
1457 rts525a_init_params(pcr); in rtsx_pci_init_chip()
1461 rtl8411b_init_params(pcr); in rtsx_pci_init_chip()
1465 rtl8402_init_params(pcr); in rtsx_pci_init_chip()
1469 rts5260_init_params(pcr); in rtsx_pci_init_chip()
1473 rts5261_init_params(pcr); in rtsx_pci_init_chip()
1477 rts5228_init_params(pcr); in rtsx_pci_init_chip()
1481 pcr_dbg(pcr, "PID: 0x%04x, IC version: 0x%02x\n", in rtsx_pci_init_chip()
1482 PCI_PID(pcr), pcr->ic_version); in rtsx_pci_init_chip()
1484 pcr->slots = kcalloc(pcr->num_slots, sizeof(struct rtsx_slot), in rtsx_pci_init_chip()
1486 if (!pcr->slots) in rtsx_pci_init_chip()
1489 if (pcr->aspm_mode == ASPM_MODE_CFG) { in rtsx_pci_init_chip()
1490 pcie_capability_read_word(pcr->pci, PCI_EXP_LNKCTL, &cfg_val); in rtsx_pci_init_chip()
1492 pcr->aspm_enabled = true; in rtsx_pci_init_chip()
1494 pcr->aspm_enabled = false; in rtsx_pci_init_chip()
1496 } else if (pcr->aspm_mode == ASPM_MODE_REG) { in rtsx_pci_init_chip()
1497 rtsx_pci_read_register(pcr, ASPM_FORCE_CTL, &val); in rtsx_pci_init_chip()
1499 pcr->aspm_enabled = false; in rtsx_pci_init_chip()
1501 pcr->aspm_enabled = true; in rtsx_pci_init_chip()
1504 if (pcr->ops->fetch_vendor_settings) in rtsx_pci_init_chip()
1505 pcr->ops->fetch_vendor_settings(pcr); in rtsx_pci_init_chip()
1507 pcr_dbg(pcr, "pcr->aspm_en = 0x%x\n", pcr->aspm_en); in rtsx_pci_init_chip()
1508 pcr_dbg(pcr, "pcr->sd30_drive_sel_1v8 = 0x%x\n", in rtsx_pci_init_chip()
1509 pcr->sd30_drive_sel_1v8); in rtsx_pci_init_chip()
1510 pcr_dbg(pcr, "pcr->sd30_drive_sel_3v3 = 0x%x\n", in rtsx_pci_init_chip()
1511 pcr->sd30_drive_sel_3v3); in rtsx_pci_init_chip()
1512 pcr_dbg(pcr, "pcr->card_drive_sel = 0x%x\n", in rtsx_pci_init_chip()
1513 pcr->card_drive_sel); in rtsx_pci_init_chip()
1514 pcr_dbg(pcr, "pcr->flags = 0x%x\n", pcr->flags); in rtsx_pci_init_chip()
1516 pcr->state = PDEV_STAT_IDLE; in rtsx_pci_init_chip()
1517 err = rtsx_pci_init_hw(pcr); in rtsx_pci_init_chip()
1519 kfree(pcr->slots); in rtsx_pci_init_chip()
1529 struct rtsx_pcr *pcr; in rtsx_pci_probe() local
1551 pcr = kzalloc(sizeof(*pcr), GFP_KERNEL); in rtsx_pci_probe()
1552 if (!pcr) { in rtsx_pci_probe()
1562 handle->pcr = pcr; in rtsx_pci_probe()
1566 ret = idr_alloc(&rtsx_pci_idr, pcr, 0, 0, GFP_NOWAIT); in rtsx_pci_probe()
1568 pcr->id = ret; in rtsx_pci_probe()
1574 pcr->pci = pcidev; in rtsx_pci_probe()
1577 if (CHK_PCI_PID(pcr, 0x525A)) in rtsx_pci_probe()
1581 pcr->remap_addr = ioremap(base, len); in rtsx_pci_probe()
1582 if (!pcr->remap_addr) { in rtsx_pci_probe()
1587 pcr->rtsx_resv_buf = dma_alloc_coherent(&(pcidev->dev), in rtsx_pci_probe()
1588 RTSX_RESV_BUF_LEN, &(pcr->rtsx_resv_buf_addr), in rtsx_pci_probe()
1590 if (pcr->rtsx_resv_buf == NULL) { in rtsx_pci_probe()
1594 pcr->host_cmds_ptr = pcr->rtsx_resv_buf; in rtsx_pci_probe()
1595 pcr->host_cmds_addr = pcr->rtsx_resv_buf_addr; in rtsx_pci_probe()
1596 pcr->host_sg_tbl_ptr = pcr->rtsx_resv_buf + HOST_CMDS_BUF_LEN; in rtsx_pci_probe()
1597 pcr->host_sg_tbl_addr = pcr->rtsx_resv_buf_addr + HOST_CMDS_BUF_LEN; in rtsx_pci_probe()
1598 pcr->card_inserted = 0; in rtsx_pci_probe()
1599 pcr->card_removed = 0; in rtsx_pci_probe()
1600 INIT_DELAYED_WORK(&pcr->carddet_work, rtsx_pci_card_detect); in rtsx_pci_probe()
1601 INIT_DELAYED_WORK(&pcr->idle_work, rtsx_pci_idle_work); in rtsx_pci_probe()
1603 pcr->msi_en = msi_en; in rtsx_pci_probe()
1604 if (pcr->msi_en) { in rtsx_pci_probe()
1607 pcr->msi_en = false; in rtsx_pci_probe()
1610 ret = rtsx_pci_acquire_irq(pcr); in rtsx_pci_probe()
1615 synchronize_irq(pcr->irq); in rtsx_pci_probe()
1617 ret = rtsx_pci_init_chip(pcr); in rtsx_pci_probe()
1626 if (pcr->rtd3_en) { in rtsx_pci_probe()
1627 INIT_DELAYED_WORK(&pcr->rtd3_work, rtsx_pci_rtd3_work); in rtsx_pci_probe()
1630 pcr->is_runtime_suspended = false; in rtsx_pci_probe()
1634 ret = mfd_add_devices(&pcidev->dev, pcr->id, rtsx_pcr_cells, in rtsx_pci_probe()
1639 schedule_delayed_work(&pcr->idle_work, msecs_to_jiffies(200)); in rtsx_pci_probe()
1644 kfree(pcr->slots); in rtsx_pci_probe()
1646 free_irq(pcr->irq, (void *)pcr); in rtsx_pci_probe()
1648 if (pcr->msi_en) in rtsx_pci_probe()
1649 pci_disable_msi(pcr->pci); in rtsx_pci_probe()
1650 dma_free_coherent(&(pcr->pci->dev), RTSX_RESV_BUF_LEN, in rtsx_pci_probe()
1651 pcr->rtsx_resv_buf, pcr->rtsx_resv_buf_addr); in rtsx_pci_probe()
1653 iounmap(pcr->remap_addr); in rtsx_pci_probe()
1657 kfree(pcr); in rtsx_pci_probe()
1669 struct rtsx_pcr *pcr = handle->pcr; in rtsx_pci_remove() local
1671 if (pcr->rtd3_en) in rtsx_pci_remove()
1672 pm_runtime_get_noresume(&pcr->pci->dev); in rtsx_pci_remove()
1674 pcr->remove_pci = true; in rtsx_pci_remove()
1677 spin_lock_irq(&pcr->lock); in rtsx_pci_remove()
1678 rtsx_pci_writel(pcr, RTSX_BIER, 0); in rtsx_pci_remove()
1679 pcr->bier = 0; in rtsx_pci_remove()
1680 spin_unlock_irq(&pcr->lock); in rtsx_pci_remove()
1682 cancel_delayed_work_sync(&pcr->carddet_work); in rtsx_pci_remove()
1683 cancel_delayed_work_sync(&pcr->idle_work); in rtsx_pci_remove()
1684 if (pcr->rtd3_en) in rtsx_pci_remove()
1685 cancel_delayed_work_sync(&pcr->rtd3_work); in rtsx_pci_remove()
1689 dma_free_coherent(&(pcr->pci->dev), RTSX_RESV_BUF_LEN, in rtsx_pci_remove()
1690 pcr->rtsx_resv_buf, pcr->rtsx_resv_buf_addr); in rtsx_pci_remove()
1691 free_irq(pcr->irq, (void *)pcr); in rtsx_pci_remove()
1692 if (pcr->msi_en) in rtsx_pci_remove()
1693 pci_disable_msi(pcr->pci); in rtsx_pci_remove()
1694 iounmap(pcr->remap_addr); in rtsx_pci_remove()
1700 idr_remove(&rtsx_pci_idr, pcr->id); in rtsx_pci_remove()
1703 if (pcr->rtd3_en) { in rtsx_pci_remove()
1704 pm_runtime_disable(&pcr->pci->dev); in rtsx_pci_remove()
1705 pm_runtime_put_noidle(&pcr->pci->dev); in rtsx_pci_remove()
1708 kfree(pcr->slots); in rtsx_pci_remove()
1709 kfree(pcr); in rtsx_pci_remove()
1721 struct rtsx_pcr *pcr; in rtsx_pci_suspend() local
1726 pcr = handle->pcr; in rtsx_pci_suspend()
1728 cancel_delayed_work(&pcr->carddet_work); in rtsx_pci_suspend()
1729 cancel_delayed_work(&pcr->idle_work); in rtsx_pci_suspend()
1731 mutex_lock(&pcr->pcr_mutex); in rtsx_pci_suspend()
1733 rtsx_pci_power_off(pcr, HOST_ENTER_S3); in rtsx_pci_suspend()
1737 mutex_unlock(&pcr->pcr_mutex); in rtsx_pci_suspend()
1745 struct rtsx_pcr *pcr; in rtsx_pci_resume() local
1751 pcr = handle->pcr; in rtsx_pci_resume()
1753 mutex_lock(&pcr->pcr_mutex); in rtsx_pci_resume()
1755 ret = rtsx_pci_write_register(pcr, HOST_SLEEP_STATE, 0x03, 0x00); in rtsx_pci_resume()
1759 ret = rtsx_pci_init_hw(pcr); in rtsx_pci_resume()
1763 schedule_delayed_work(&pcr->idle_work, msecs_to_jiffies(200)); in rtsx_pci_resume()
1766 mutex_unlock(&pcr->pcr_mutex); in rtsx_pci_resume()
1775 struct rtsx_pcr *pcr; in rtsx_pci_shutdown() local
1780 pcr = handle->pcr; in rtsx_pci_shutdown()
1781 rtsx_pci_power_off(pcr, HOST_ENTER_S1); in rtsx_pci_shutdown()
1784 free_irq(pcr->irq, (void *)pcr); in rtsx_pci_shutdown()
1785 if (pcr->msi_en) in rtsx_pci_shutdown()
1786 pci_disable_msi(pcr->pci); in rtsx_pci_shutdown()
1793 struct rtsx_pcr *pcr; in rtsx_pci_runtime_suspend() local
1796 pcr = handle->pcr; in rtsx_pci_runtime_suspend()
1799 cancel_delayed_work(&pcr->carddet_work); in rtsx_pci_runtime_suspend()
1800 cancel_delayed_work(&pcr->rtd3_work); in rtsx_pci_runtime_suspend()
1801 cancel_delayed_work(&pcr->idle_work); in rtsx_pci_runtime_suspend()
1803 mutex_lock(&pcr->pcr_mutex); in rtsx_pci_runtime_suspend()
1804 rtsx_pci_power_off(pcr, HOST_ENTER_S3); in rtsx_pci_runtime_suspend()
1806 mutex_unlock(&pcr->pcr_mutex); in rtsx_pci_runtime_suspend()
1808 pcr->is_runtime_suspended = true; in rtsx_pci_runtime_suspend()
1817 struct rtsx_pcr *pcr; in rtsx_pci_runtime_resume() local
1820 pcr = handle->pcr; in rtsx_pci_runtime_resume()
1823 mutex_lock(&pcr->pcr_mutex); in rtsx_pci_runtime_resume()
1825 rtsx_pci_write_register(pcr, HOST_SLEEP_STATE, 0x03, 0x00); in rtsx_pci_runtime_resume()
1827 if (pcr->ops->fetch_vendor_settings) in rtsx_pci_runtime_resume()
1828 pcr->ops->fetch_vendor_settings(pcr); in rtsx_pci_runtime_resume()
1830 rtsx_pci_init_hw(pcr); in rtsx_pci_runtime_resume()
1832 if (pcr->slots[RTSX_SD_CARD].p_dev != NULL) { in rtsx_pci_runtime_resume()
1833 pcr->slots[RTSX_SD_CARD].card_event( in rtsx_pci_runtime_resume()
1834 pcr->slots[RTSX_SD_CARD].p_dev); in rtsx_pci_runtime_resume()
1837 schedule_delayed_work(&pcr->idle_work, msecs_to_jiffies(200)); in rtsx_pci_runtime_resume()
1839 mutex_unlock(&pcr->pcr_mutex); in rtsx_pci_runtime_resume()