Lines Matching refs:CFG_BASE
638 prop->pcie_aux_dbi_reg_addr = CFG_BASE + mmPCIE_AUX_DBI; in gaudi_set_fixed_properties()
681 (CFG_BASE - SPI_FLASH_BASE_ADDR); in gaudi_pci_bars_map()
815 rc = hl_pci_elbi_read(hdev, CFG_BASE + mmCPU_BOOT_DEV_STS0, in gaudi_early_init()
1781 region->region_base = CFG_BASE; in gaudi_set_pci_memory_regions()
1783 region->offset_in_bar = CFG_BASE - SPI_FLASH_BASE_ADDR; in gaudi_set_pci_memory_regions()
2722 mtr_base_en_lo = lower_32_bits(CFG_BASE + in gaudi_init_pci_dma_qman()
2724 mtr_base_en_hi = upper_32_bits(CFG_BASE + in gaudi_init_pci_dma_qman()
2726 so_base_en_lo = lower_32_bits(CFG_BASE + in gaudi_init_pci_dma_qman()
2728 so_base_en_hi = upper_32_bits(CFG_BASE + in gaudi_init_pci_dma_qman()
2730 mtr_base_ws_lo = lower_32_bits(CFG_BASE + in gaudi_init_pci_dma_qman()
2732 mtr_base_ws_hi = upper_32_bits(CFG_BASE + in gaudi_init_pci_dma_qman()
2734 so_base_ws_lo = lower_32_bits(CFG_BASE + in gaudi_init_pci_dma_qman()
2736 so_base_ws_hi = upper_32_bits(CFG_BASE + in gaudi_init_pci_dma_qman()
2780 lower_32_bits(CFG_BASE + irq_handler_offset)); in gaudi_init_pci_dma_qman()
2782 upper_32_bits(CFG_BASE + irq_handler_offset)); in gaudi_init_pci_dma_qman()
2828 lower_32_bits(CFG_BASE + irq_handler_offset)); in gaudi_init_dma_core()
2830 upper_32_bits(CFG_BASE + irq_handler_offset)); in gaudi_init_dma_core()
2903 mtr_base_en_lo = lower_32_bits(CFG_BASE + in gaudi_init_hbm_dma_qman()
2905 mtr_base_en_hi = upper_32_bits(CFG_BASE + in gaudi_init_hbm_dma_qman()
2907 so_base_en_lo = lower_32_bits(CFG_BASE + in gaudi_init_hbm_dma_qman()
2909 so_base_en_hi = upper_32_bits(CFG_BASE + in gaudi_init_hbm_dma_qman()
2911 mtr_base_ws_lo = lower_32_bits(CFG_BASE + in gaudi_init_hbm_dma_qman()
2913 mtr_base_ws_hi = upper_32_bits(CFG_BASE + in gaudi_init_hbm_dma_qman()
2915 so_base_ws_lo = lower_32_bits(CFG_BASE + in gaudi_init_hbm_dma_qman()
2917 so_base_ws_hi = upper_32_bits(CFG_BASE + in gaudi_init_hbm_dma_qman()
2959 lower_32_bits(CFG_BASE + irq_handler_offset)); in gaudi_init_hbm_dma_qman()
2961 upper_32_bits(CFG_BASE + irq_handler_offset)); in gaudi_init_hbm_dma_qman()
3045 mtr_base_lo = lower_32_bits(CFG_BASE + in gaudi_init_mme_qman()
3047 mtr_base_hi = upper_32_bits(CFG_BASE + in gaudi_init_mme_qman()
3049 so_base_lo = lower_32_bits(CFG_BASE + in gaudi_init_mme_qman()
3051 so_base_hi = upper_32_bits(CFG_BASE + in gaudi_init_mme_qman()
3096 lower_32_bits(CFG_BASE + irq_handler_offset)); in gaudi_init_mme_qman()
3098 upper_32_bits(CFG_BASE + irq_handler_offset)); in gaudi_init_mme_qman()
3171 mtr_base_en_lo = lower_32_bits(CFG_BASE + in gaudi_init_tpc_qman()
3173 mtr_base_en_hi = upper_32_bits(CFG_BASE + in gaudi_init_tpc_qman()
3175 so_base_en_lo = lower_32_bits(CFG_BASE + in gaudi_init_tpc_qman()
3177 so_base_en_hi = upper_32_bits(CFG_BASE + in gaudi_init_tpc_qman()
3179 mtr_base_ws_lo = lower_32_bits(CFG_BASE + in gaudi_init_tpc_qman()
3181 mtr_base_ws_hi = upper_32_bits(CFG_BASE + in gaudi_init_tpc_qman()
3183 so_base_ws_lo = lower_32_bits(CFG_BASE + in gaudi_init_tpc_qman()
3185 so_base_ws_hi = upper_32_bits(CFG_BASE + in gaudi_init_tpc_qman()
3230 lower_32_bits(CFG_BASE + irq_handler_offset)); in gaudi_init_tpc_qman()
3232 upper_32_bits(CFG_BASE + irq_handler_offset)); in gaudi_init_tpc_qman()
3281 so_base_hi = upper_32_bits(CFG_BASE + in gaudi_init_tpc_qmans()
3323 mtr_base_en_lo = lower_32_bits(CFG_BASE + in gaudi_init_nic_qman()
3325 mtr_base_en_hi = upper_32_bits(CFG_BASE + in gaudi_init_nic_qman()
3327 so_base_en_lo = lower_32_bits(CFG_BASE + in gaudi_init_nic_qman()
3329 so_base_en_hi = upper_32_bits(CFG_BASE + in gaudi_init_nic_qman()
3331 mtr_base_ws_lo = lower_32_bits(CFG_BASE + in gaudi_init_nic_qman()
3333 mtr_base_ws_hi = upper_32_bits(CFG_BASE + in gaudi_init_nic_qman()
3335 so_base_ws_lo = lower_32_bits(CFG_BASE + in gaudi_init_nic_qman()
3337 so_base_ws_hi = upper_32_bits(CFG_BASE + in gaudi_init_nic_qman()
3381 lower_32_bits(CFG_BASE + irq_handler_offset)); in gaudi_init_nic_qman()
3383 upper_32_bits(CFG_BASE + irq_handler_offset)); in gaudi_init_nic_qman()
3825 WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE, 0); in gaudi_enable_timestamp()
3828 WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE + 0xC, 0); in gaudi_enable_timestamp()
3829 WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE + 0x8, 0); in gaudi_enable_timestamp()
3832 WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE, 1); in gaudi_enable_timestamp()
3838 WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE, 0); in gaudi_disable_timestamp()
5834 cq_pkt->addr = cpu_to_le64(CFG_BASE + msi_addr); in gaudi_add_end_of_cb_packets()
5992 base_addr = CFG_BASE + mmSYNC_MNGR_E_N_SYNC_MNGR_OBJS_SOB_OBJ_0; in gaudi_restore_sm_registers()
6000 base_addr = CFG_BASE + mmSYNC_MNGR_E_S_SYNC_MNGR_OBJS_SOB_OBJ_0; in gaudi_restore_sm_registers()
6008 base_addr = CFG_BASE + mmSYNC_MNGR_W_N_SYNC_MNGR_OBJS_SOB_OBJ_0; in gaudi_restore_sm_registers()
6016 base_addr = CFG_BASE + mmSYNC_MNGR_E_N_SYNC_MNGR_OBJS_MON_STATUS_0; in gaudi_restore_sm_registers()
6024 base_addr = CFG_BASE + mmSYNC_MNGR_E_S_SYNC_MNGR_OBJS_MON_STATUS_0; in gaudi_restore_sm_registers()
6032 base_addr = CFG_BASE + mmSYNC_MNGR_W_N_SYNC_MNGR_OBJS_MON_STATUS_0; in gaudi_restore_sm_registers()
6040 base_addr = CFG_BASE + mmSYNC_MNGR_W_S_SYNC_MNGR_OBJS_SOB_OBJ_0 + in gaudi_restore_sm_registers()
6049 base_addr = CFG_BASE + mmSYNC_MNGR_W_S_SYNC_MNGR_OBJS_MON_STATUS_0 + in gaudi_restore_sm_registers()
6068 u64 sob_addr = CFG_BASE + in gaudi_restore_dma_registers()
6162 if ((addr >= CFG_BASE) && (addr < CFG_BASE + CFG_SIZE)) { in gaudi_debugfs_read32()
6172 *val = RREG32(addr - CFG_BASE); in gaudi_debugfs_read32()
6213 if ((addr >= CFG_BASE) && (addr < CFG_BASE + CFG_SIZE)) { in gaudi_debugfs_write32()
6223 WREG32(addr - CFG_BASE, val); in gaudi_debugfs_write32()
6264 if ((addr >= CFG_BASE) && (addr <= CFG_BASE + CFG_SIZE - sizeof(u64))) { in gaudi_debugfs_read64()
6274 u32 val_l = RREG32(addr - CFG_BASE); in gaudi_debugfs_read64()
6275 u32 val_h = RREG32(addr + sizeof(u32) - CFG_BASE); in gaudi_debugfs_read64()
6319 if ((addr >= CFG_BASE) && (addr <= CFG_BASE + CFG_SIZE - sizeof(u64))) { in gaudi_debugfs_write64()
6329 WREG32(addr - CFG_BASE, lower_32_bits(val)); in gaudi_debugfs_write64()
6330 WREG32(addr + sizeof(u32) - CFG_BASE, in gaudi_debugfs_write64()
7185 if (params->block_address >= CFG_BASE) in gaudi_extract_ecc_info()
7186 params->block_address -= CFG_BASE; in gaudi_extract_ecc_info()
8537 lower_32_bits(CFG_BASE + in gaudi_run_tpc_kernel()
8995 *addr = CFG_BASE + offset; in gaudi_get_fence_addr()
9149 reg_value -= (u32)CFG_BASE; in gaudi_add_sync_to_engine_map_entry()
9346 fence_cnt = base_offset + CFG_BASE + in gaudi_print_fences_single_engine()