Lines Matching refs:CFG_BASE

455 	prop->pcie_aux_dbi_reg_addr = CFG_BASE + mmPCIE_AUX_DBI;  in goya_set_fixed_properties()
499 (CFG_BASE - SRAM_BASE_ADDR); in goya_pci_bars_map()
635 rc = hl_pci_elbi_read(hdev, CFG_BASE + mmCPU_BOOT_DEV_STS0, in goya_early_init()
870 region->region_base = CFG_BASE; in goya_set_pci_memory_regions()
872 region->offset_in_bar = CFG_BASE - SRAM_BASE_ADDR; in goya_set_pci_memory_regions()
1021 mtr_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_MON_PAY_ADDRL_0); in goya_init_dma_qman()
1022 mtr_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_MON_PAY_ADDRL_0); in goya_init_dma_qman()
1023 so_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0); in goya_init_dma_qman()
1024 so_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0); in goya_init_dma_qman()
1027 lower_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR); in goya_init_dma_qman()
1029 upper_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR); in goya_init_dma_qman()
1070 lower_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR); in goya_init_dma_ch()
1072 upper_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR); in goya_init_dma_ch()
1080 sob_addr = CFG_BASE + mmSYNC_MNGR_SOB_OBJ_1000 + in goya_init_dma_ch()
1083 sob_addr = CFG_BASE + mmSYNC_MNGR_SOB_OBJ_1007; in goya_init_dma_ch()
1376 tpc_eml_address = (mmTPC0_EML_CFG_BASE + tpc_eml_offset - CFG_BASE); in _goya_tpc_mbist_workaround()
1762 mtr_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_MON_PAY_ADDRL_0); in goya_init_mme_qman()
1763 mtr_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_MON_PAY_ADDRL_0); in goya_init_mme_qman()
1764 so_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0); in goya_init_mme_qman()
1765 so_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0); in goya_init_mme_qman()
1768 lower_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR); in goya_init_mme_qman()
1770 upper_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR); in goya_init_mme_qman()
1811 mtr_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_MON_PAY_ADDRL_0); in goya_init_mme_cmdq()
1812 mtr_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_MON_PAY_ADDRL_0); in goya_init_mme_cmdq()
1813 so_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0); in goya_init_mme_cmdq()
1814 so_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0); in goya_init_mme_cmdq()
1817 lower_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR); in goya_init_mme_cmdq()
1819 upper_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR); in goya_init_mme_cmdq()
1849 so_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0); in goya_init_mme_qmans()
1850 so_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0); in goya_init_mme_qmans()
1869 mtr_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_MON_PAY_ADDRL_0); in goya_init_tpc_qman()
1870 mtr_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_MON_PAY_ADDRL_0); in goya_init_tpc_qman()
1871 so_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0); in goya_init_tpc_qman()
1872 so_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0); in goya_init_tpc_qman()
1875 lower_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR); in goya_init_tpc_qman()
1877 upper_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR); in goya_init_tpc_qman()
1918 mtr_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_MON_PAY_ADDRL_0); in goya_init_tpc_cmdq()
1919 mtr_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_MON_PAY_ADDRL_0); in goya_init_tpc_cmdq()
1920 so_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0); in goya_init_tpc_cmdq()
1921 so_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0); in goya_init_tpc_cmdq()
1924 lower_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR); in goya_init_tpc_cmdq()
1926 upper_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR); in goya_init_tpc_cmdq()
1959 so_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0); in goya_init_tpc_qmans()
1960 so_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0); in goya_init_tpc_qmans()
2370 WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE, 0); in goya_enable_timestamp()
2373 WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE + 0xC, 0); in goya_enable_timestamp()
2374 WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE + 0x8, 0); in goya_enable_timestamp()
2377 WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE, 1); in goya_enable_timestamp()
2383 WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE, 0); in goya_disable_timestamp()
3592 sob_start_addr = lower_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0); in goya_validate_wreg32()
3593 sob_end_addr = lower_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_1023); in goya_validate_wreg32()
4138 cq_pkt->addr = cpu_to_le64(CFG_BASE + mmPCIE_DBI_MSIX_DOORBELL_OFF); in goya_add_end_of_cb_packets()
4195 if ((addr >= CFG_BASE) && (addr < CFG_BASE + CFG_SIZE)) { in goya_debugfs_read32()
4196 *val = RREG32(addr - CFG_BASE); in goya_debugfs_read32()
4255 if ((addr >= CFG_BASE) && (addr < CFG_BASE + CFG_SIZE)) { in goya_debugfs_write32()
4256 WREG32(addr - CFG_BASE, val); in goya_debugfs_write32()
4300 if ((addr >= CFG_BASE) && (addr <= CFG_BASE + CFG_SIZE - sizeof(u64))) { in goya_debugfs_read64()
4301 u32 val_l = RREG32(addr - CFG_BASE); in goya_debugfs_read64()
4302 u32 val_h = RREG32(addr + sizeof(u32) - CFG_BASE); in goya_debugfs_read64()
4349 if ((addr >= CFG_BASE) && (addr <= CFG_BASE + CFG_SIZE - sizeof(u64))) { in goya_debugfs_write64()
4350 WREG32(addr - CFG_BASE, lower_32_bits(val)); in goya_debugfs_write64()
4351 WREG32(addr + sizeof(u32) - CFG_BASE, upper_32_bits(val)); in goya_debugfs_write64()
5018 sob_addr = CFG_BASE + mmSYNC_MNGR_SOB_OBJ_1007; in goya_context_switch()
5022 sob_addr = CFG_BASE + mmSYNC_MNGR_SOB_OBJ_1000 + in goya_context_switch()