Lines Matching refs:mci_writel
198 mci_writel(host, CTRL, ctrl); in dw_mci_ctrl_reset()
240 mci_writel(host, CMDARG, arg); in mci_send_cmd()
243 mci_writel(host, CMD, SDMMC_CMD_START | cmd); in mci_send_cmd()
294 mci_writel(host, CLKENA, clk_en_a); in dw_mci_prepare_command()
406 mci_writel(host, CMDARG, cmd->arg); in dw_mci_start_command()
410 mci_writel(host, CMD, cmd_flags | SDMMC_CMD_START); in dw_mci_start_command()
454 mci_writel(host, BMOD, bmod); in dw_mci_idmac_reset()
465 mci_writel(host, CTRL, temp); in dw_mci_idmac_stop_dma()
471 mci_writel(host, BMOD, temp); in dw_mci_idmac_stop_dma()
558 mci_writel(host, IDSTS64, IDMAC_INT_CLR); in dw_mci_idmac_init()
559 mci_writel(host, IDINTEN64, SDMMC_IDMAC_INT_NI | in dw_mci_idmac_init()
563 mci_writel(host, DBADDRL, host->sg_dma & 0xffffffff); in dw_mci_idmac_init()
564 mci_writel(host, DBADDRU, (u64)host->sg_dma >> 32); in dw_mci_idmac_init()
568 mci_writel(host, IDSTS, IDMAC_INT_CLR); in dw_mci_idmac_init()
569 mci_writel(host, IDINTEN, SDMMC_IDMAC_INT_NI | in dw_mci_idmac_init()
573 mci_writel(host, DBADDR, host->sg_dma); in dw_mci_idmac_init()
747 mci_writel(host, CTRL, temp); in dw_mci_idmac_start_dma()
755 mci_writel(host, BMOD, temp); in dw_mci_idmac_start_dma()
758 mci_writel(host, PLDMND, 1); in dw_mci_idmac_start_dma()
1027 mci_writel(host, FIFOTH, fifoth_val); in dw_mci_adjust_fifoth()
1075 mci_writel(host, CDTHRCTL, SDMMC_SET_THLD(thld_size, enable)); in dw_mci_ctrl_thld()
1079 mci_writel(host, CDTHRCTL, 0); in dw_mci_ctrl_thld()
1120 mci_writel(host, CTRL, temp); in dw_mci_submit_data_dma()
1126 mci_writel(host, INTMASK, temp); in dw_mci_submit_data_dma()
1171 mci_writel(host, RINTSTS, SDMMC_INT_TXDR | SDMMC_INT_RXDR); in dw_mci_submit_data()
1176 mci_writel(host, INTMASK, temp); in dw_mci_submit_data()
1181 mci_writel(host, CTRL, temp); in dw_mci_submit_data()
1192 mci_writel(host, FIFOTH, host->fifoth_val); in dw_mci_submit_data()
1219 mci_writel(host, CLKENA, 0); in dw_mci_setup_bus()
1253 mci_writel(host, CLKENA, 0); in dw_mci_setup_bus()
1254 mci_writel(host, CLKSRC, 0); in dw_mci_setup_bus()
1260 mci_writel(host, CLKDIV, div); in dw_mci_setup_bus()
1269 mci_writel(host, CLKENA, clk_en_a); in dw_mci_setup_bus()
1283 mci_writel(host, CTYPE, (slot->ctype << slot->id)); in dw_mci_setup_bus()
1306 mci_writel(host, TMOUT, 0xFFFFFFFF); in __dw_mci_start_request()
1307 mci_writel(host, BYTCNT, data->blksz*data->blocks); in __dw_mci_start_request()
1308 mci_writel(host, BLKSIZ, data->blksz); in __dw_mci_start_request()
1440 mci_writel(slot->host, UHS_REG, regs); in dw_mci_set_ios()
1467 mci_writel(slot->host, PWREN, regs); in dw_mci_set_ios()
1506 mci_writel(slot->host, PWREN, regs); in dw_mci_set_ios()
1562 mci_writel(host, UHS_REG, uhs); in dw_mci_switch_voltage()
1607 mci_writel(host, RST_N, reset); in dw_mci_hw_reset()
1610 mci_writel(host, RST_N, reset); in dw_mci_hw_reset()
1637 mci_writel(host, CLKENA, clk_en_a); in dw_mci_prepare_sdio_irq()
1657 mci_writel(host, INTMASK, int_mask); in __dw_mci_enable_sdio_irq()
1732 mci_writel(host, RINTSTS, 0xFFFFFFFF); in dw_mci_reset()
2589 mci_writel(host, RINTSTS, SDMMC_INT_RXDR); in dw_mci_read_data_pio()
2645 mci_writel(host, RINTSTS, SDMMC_INT_TXDR); in dw_mci_write_data_pio()
2698 mci_writel(host, RINTSTS, SDMMC_INT_VOLT_SWITCH); in dw_mci_interrupt()
2716 mci_writel(host, RINTSTS, DW_MCI_CMD_ERROR_FLAGS); in dw_mci_interrupt()
2728 mci_writel(host, RINTSTS, DW_MCI_DATA_ERROR_FLAGS); in dw_mci_interrupt()
2742 mci_writel(host, RINTSTS, SDMMC_INT_DATA_OVER); in dw_mci_interrupt()
2757 mci_writel(host, RINTSTS, SDMMC_INT_RXDR); in dw_mci_interrupt()
2763 mci_writel(host, RINTSTS, SDMMC_INT_TXDR); in dw_mci_interrupt()
2771 mci_writel(host, RINTSTS, SDMMC_INT_CMD_DONE); in dw_mci_interrupt()
2778 mci_writel(host, RINTSTS, SDMMC_INT_CD); in dw_mci_interrupt()
2783 mci_writel(host, RINTSTS, in dw_mci_interrupt()
2798 mci_writel(host, IDSTS64, SDMMC_IDMAC_INT_TI | in dw_mci_interrupt()
2800 mci_writel(host, IDSTS64, SDMMC_IDMAC_INT_NI); in dw_mci_interrupt()
2807 mci_writel(host, IDSTS, SDMMC_IDMAC_INT_TI | in dw_mci_interrupt()
2809 mci_writel(host, IDSTS, SDMMC_IDMAC_INT_NI); in dw_mci_interrupt()
3223 mci_writel(host, INTMASK, temp); in dw_mci_enable_cd()
3341 mci_writel(host, RINTSTS, 0xFFFFFFFF); in dw_mci_probe()
3342 mci_writel(host, INTMASK, 0); /* disable all mmc interrupt first */ in dw_mci_probe()
3345 mci_writel(host, TMOUT, 0xFFFFFFFF); in dw_mci_probe()
3366 mci_writel(host, FIFOTH, host->fifoth_val); in dw_mci_probe()
3369 mci_writel(host, CLKENA, 0); in dw_mci_probe()
3370 mci_writel(host, CLKSRC, 0); in dw_mci_probe()
3396 mci_writel(host, INTMASK, SDMMC_INT_CMD_DONE | SDMMC_INT_DATA_OVER | in dw_mci_probe()
3400 mci_writel(host, CTRL, SDMMC_CTRL_INT_ENABLE); in dw_mci_probe()
3440 mci_writel(host, RINTSTS, 0xFFFFFFFF); in dw_mci_remove()
3441 mci_writel(host, INTMASK, 0); /* disable all mmc interrupt first */ in dw_mci_remove()
3444 mci_writel(host, CLKENA, 0); in dw_mci_remove()
3445 mci_writel(host, CLKSRC, 0); in dw_mci_remove()
3508 mci_writel(host, FIFOTH, host->fifoth_val); in dw_mci_runtime_resume()
3512 mci_writel(host, TMOUT, 0xFFFFFFFF); in dw_mci_runtime_resume()
3514 mci_writel(host, RINTSTS, 0xFFFFFFFF); in dw_mci_runtime_resume()
3515 mci_writel(host, INTMASK, SDMMC_INT_CMD_DONE | SDMMC_INT_DATA_OVER | in dw_mci_runtime_resume()
3518 mci_writel(host, CTRL, SDMMC_CTRL_INT_ENABLE); in dw_mci_runtime_resume()