Lines Matching refs:REGA
165 #define REGA(a) (*( AREG = (a), &DREG )) macro
355 REGA(CSR0) = CSR0_STOP; in lance_probe()
419 REGA(CSR0) = CSR0_STOP; in lance_open()
424 REGA(CSR0) = CSR0_INIT; in lance_open()
497 REGA(CSR1) = dvma_vtob(&(MEM->init)); in lance_init_ring()
498 REGA(CSR2) = dvma_vtob(&(MEM->init)) >> 16; in lance_init_ring()
501 REGA(CSR3) = CSR3_BSWP | CSR3_ACON | CSR3_BCON; in lance_init_ring()
503 REGA(CSR3) = CSR3_BSWP; in lance_init_ring()
533 REGA(CSR3) = CSR3_BSWP; in lance_start_xmit()
555 REGA( CSR0 ) = CSR0_INEA | CSR0_INIT | CSR0_STRT; in lance_start_xmit()
585 REGA( CSR0 ) = CSR0_STOP; in lance_start_xmit()
587 REGA( CSR0 ) = CSR0_INIT | CSR0_STRT; in lance_start_xmit()
631 REGA(CSR0) = CSR0_INEA | CSR0_TDMD | CSR0_STRT; in lance_start_xmit()
703 REGA(CSR0) = CSR0_STOP; in lance_interrupt()
704 REGA(CSR3) = CSR3_BSWP; in lance_interrupt()
706 REGA(CSR0) = CSR0_STRT | CSR0_INEA; in lance_interrupt()
741 REGA(CSR0) = CSR0_STOP; in lance_interrupt()
742 REGA(CSR3) = CSR3_BSWP; in lance_interrupt()
744 REGA(CSR0) = CSR0_STRT | CSR0_INEA; in lance_interrupt()
752 REGA(CSR0) = CSR0_INEA; in lance_interrupt()
896 REGA( CSR15 ) = 0x8000; /* Set promiscuous mode */ in set_multicast_list()
906 REGA( CSR8+i ) = multicast_table[i]; in set_multicast_list()
907 REGA( CSR15 ) = 0; /* Unset promiscuous mode */ in set_multicast_list()
914 REGA( CSR3 ) = CSR3_BSWP; in set_multicast_list()
917 REGA( CSR0 ) = CSR0_IDON | CSR0_INEA | CSR0_STRT; in set_multicast_list()