Lines Matching refs:SET_REG_BITS
33 SET_REG_BITS(&mc2, INTF_MODE, 1); in xge_mac_set_speed()
34 SET_REG_BITS(&intf_ctrl, HD_MODE, 0); in xge_mac_set_speed()
35 SET_REG_BITS(&icm0, CFG_MACMODE, 0); in xge_mac_set_speed()
36 SET_REG_BITS(&icm2, CFG_WAITASYNCRD, 500); in xge_mac_set_speed()
40 SET_REG_BITS(&mc2, INTF_MODE, 1); in xge_mac_set_speed()
41 SET_REG_BITS(&intf_ctrl, HD_MODE, 1); in xge_mac_set_speed()
42 SET_REG_BITS(&icm0, CFG_MACMODE, 1); in xge_mac_set_speed()
43 SET_REG_BITS(&icm2, CFG_WAITASYNCRD, 80); in xge_mac_set_speed()
47 SET_REG_BITS(&mc2, INTF_MODE, 2); in xge_mac_set_speed()
48 SET_REG_BITS(&intf_ctrl, HD_MODE, 2); in xge_mac_set_speed()
49 SET_REG_BITS(&icm0, CFG_MACMODE, 2); in xge_mac_set_speed()
50 SET_REG_BITS(&icm2, CFG_WAITASYNCRD, 16); in xge_mac_set_speed()
56 SET_REG_BITS(&ecm0, CFG_WFIFOFULLTHR, 0x32); in xge_mac_set_speed()