Lines Matching refs:outl
684 outl(imr, DE4X5_IMR); /* Enable the IRQs */\
690 outl(imr, DE4X5_IMR); /* Disable the IRQs */\
695 outl(imr, DE4X5_IMR); /* Unmask the IRQs */\
701 outl(imr, DE4X5_IMR); /* Mask the IRQs */\
710 outl(omr, DE4X5_OMR); /* Enable the TX and/or RX */\
716 outl(omr, DE4X5_OMR); /* Disable the TX and/or RX */ \
722 #define RESET_SIA outl(0, DE4X5_SICR); /* Reset SIA connectivity regs */
1068 outl(i | BMR_SWR, DE4X5_BMR);\
1070 outl(i, DE4X5_BMR);\
1077 outl(GEP_HRST, DE4X5_GEP); /* Hard RESET the PHY dev. */\
1079 outl(0x00, DE4X5_GEP);\
1226 outl(lp->dma_rings, DE4X5_RRBA); in de4x5_hw_init()
1227 outl(lp->dma_rings + NUM_RX_DESC * sizeof(struct de4x5_desc), in de4x5_hw_init()
1405 outl(bmr, DE4X5_BMR); in de4x5_sw_reset()
1412 outl(lp->dma_rings, DE4X5_RRBA); in de4x5_sw_reset()
1413 outl(lp->dma_rings + NUM_RX_DESC * sizeof(struct de4x5_desc), in de4x5_sw_reset()
1433 outl(omr|OMR_ST, DE4X5_OMR); in de4x5_sw_reset()
1441 outl(omr, DE4X5_OMR); /* Stop everything! */ in de4x5_sw_reset()
1505 outl(POLL_DEMAND, DE4X5_TPD);/* Start the TX */ in de4x5_queue_pkt()
1559 outl(sts, DE4X5_STS); /* Reset the board interrupts */ in de4x5_interrupt()
1714 outl(POLL_DEMAND, DE4X5_TPD);/* Restart a stalled TX */ in de4x5_tx()
1780 outl(omr, DE4X5_OMR); in de4x5_txur()
1787 outl(omr | OMR_ST | OMR_SR, DE4X5_OMR); in de4x5_txur()
1801 outl(omr & ~OMR_SR, DE4X5_OMR); in de4x5_rx_ovfc()
1809 outl(omr, DE4X5_OMR); in de4x5_rx_ovfc()
1930 outl(omr, DE4X5_OMR); in set_multicast_list()
1937 outl(POLL_DEMAND, DE4X5_TPD); /* Start the TX */ in set_multicast_list()
1989 outl(omr, DE4X5_OMR); in SetMulticastFilter()
2061 outl(PCI_COMMAND_IO | PCI_COMMAND_MASTER, PCI_CFCS); in de4x5_eisa_probe()
2062 outl(0x00006000, PCI_CFLT); in de4x5_eisa_probe()
2063 outl(iobase, PCI_CBIO); in de4x5_eisa_probe()
2576 outl(omr | OMR_FDX, DE4X5_OMR); in dc21041_autoconf()
2623 outl(omr & ~OMR_FDX, DE4X5_OMR); in dc21041_autoconf()
2657 outl(omr & ~OMR_FDX, DE4X5_OMR); in dc21041_autoconf()
2688 outl(omr & ~OMR_FDX, DE4X5_OMR); in dc21041_autoconf()
2727 outl(omr | OMR_FDX, DE4X5_OMR); in dc21041_autoconf()
3036 outl(omr & ~OMR_FDX, DE4X5_OMR); in dc2114x_autoconf()
3067 outl(omr & ~OMR_FDX, DE4X5_OMR); in dc2114x_autoconf()
3282 outl(POLL_DEMAND, DE4X5_TPD); in de4x5_init_connection()
3340 outl(irq_mask, DE4X5_IMR); in test_media()
3344 outl(sts, DE4X5_STS); in test_media()
3349 outl(csr12, DE4X5_SISR); in test_media()
3569 outl(POLL_DEMAND, DE4X5_TPD); in ping_media()
3710 outl(lp->dma_rings, DE4X5_RRBA); in de4x5_rst_desc_ring()
3711 outl(lp->dma_rings + NUM_RX_DESC * sizeof(struct de4x5_desc), in de4x5_rst_desc_ring()
3745 outl(lp->cache.csr0, DE4X5_BMR); in de4x5_cache_state()
3746 outl(lp->cache.csr6, DE4X5_OMR); in de4x5_cache_state()
3747 outl(lp->cache.csr7, DE4X5_IMR); in de4x5_cache_state()
3796 outl(irq_mask, DE4X5_IMR); in test_ans()
3800 outl(sts, DE4X5_STS); in test_ans()
3826 outl(sts, DE4X5_STS); in de4x5_setup_intr()
3845 outl(1, DE4X5_SICR); in reset_init_sia()
3851 outl(csr15 | lp->cache.gepc, DE4X5_SIGR); in reset_init_sia()
3852 outl(csr15 | lp->cache.gep, DE4X5_SIGR); in reset_init_sia()
3855 outl(csr15, DE4X5_SIGR); in reset_init_sia()
3857 outl(csr14, DE4X5_STRR); in reset_init_sia()
3858 outl(csr13, DE4X5_SICR); in reset_init_sia()
3960 outl(0, aprom_addr); /* Reset Ethernet Address ROM Pointer */ in DevicePresent()
4280 outl(command, addr); in sendto_srom()
4405 outl(lp->cache.csr14, DE4X5_STRR); in srom_exec()
4406 outl(lp->cache.csr13, DE4X5_SICR); in srom_exec()
4906 outl(command | j, ioaddr); in sendto_mii()
4908 outl(command | MII_MDC | j, ioaddr); in sendto_mii()
4915 outl(command, ioaddr); in getfrom_mii()
4917 outl(command | MII_MDC, ioaddr); in getfrom_mii()
5094 outl(omr, DE4X5_OMR); in de4x5_switch_mac_port()
5108 outl(omr, DE4X5_OMR); in de4x5_switch_mac_port()
5123 outl(data, DE4X5_GEP); in gep_wr()
5125 outl((data<<16) | lp->cache.csr15, DE4X5_SIGR); in gep_wr()
5164 outl(0, DE4X5_SICR); in yawn()
5181 outl(0, DE4X5_SICR); in yawn()
5409 outl(POLL_DEMAND, DE4X5_TPD); /* Start the TX */ in de4x5_siocdevprivate()
5422 outl(omr, DE4X5_OMR); in de4x5_siocdevprivate()
5451 outl(tmp.addr[0], DE4X5_OMR); in de4x5_siocdevprivate()