Lines Matching refs:tmp_reg16
1303 u16 tmp_reg16; in dtsec_restart_autoneg() local
1308 tmp_reg16 = phy_read(dtsec->tbiphy, MII_BMCR); in dtsec_restart_autoneg()
1310 tmp_reg16 &= ~(BMCR_SPEED100 | BMCR_SPEED1000); in dtsec_restart_autoneg()
1311 tmp_reg16 |= (BMCR_ANENABLE | BMCR_ANRESTART | in dtsec_restart_autoneg()
1314 phy_write(dtsec->tbiphy, MII_BMCR, tmp_reg16); in dtsec_restart_autoneg()
1417 u16 tmp_reg16; in dtsec_init() local
1420 tmp_reg16 = TBICON_CLK_SELECT | TBICON_SOFT_RESET; in dtsec_init()
1421 phy_write(dtsec->tbiphy, MII_TBICON, tmp_reg16); in dtsec_init()
1423 tmp_reg16 = TBICON_CLK_SELECT; in dtsec_init()
1424 phy_write(dtsec->tbiphy, MII_TBICON, tmp_reg16); in dtsec_init()
1426 tmp_reg16 = (BMCR_RESET | BMCR_ANENABLE | in dtsec_init()
1428 phy_write(dtsec->tbiphy, MII_BMCR, tmp_reg16); in dtsec_init()
1431 tmp_reg16 = TBIANA_1000X; in dtsec_init()
1433 tmp_reg16 = TBIANA_SGMII; in dtsec_init()
1434 phy_write(dtsec->tbiphy, MII_ADVERTISE, tmp_reg16); in dtsec_init()
1436 tmp_reg16 = (BMCR_ANENABLE | BMCR_ANRESTART | in dtsec_init()
1439 phy_write(dtsec->tbiphy, MII_BMCR, tmp_reg16); in dtsec_init()