Lines Matching refs:e_dbg
309 e_dbg("Failed to initialize PHY flow\n"); in e1000_init_phy_workarounds_pchlan()
353 e_dbg("Required LANPHYPC toggle blocked by ME\n"); in e1000_init_phy_workarounds_pchlan()
536 e_dbg("Cannot determine PHY addr. Erroring out\n"); in e1000_init_phy_params_ich8lan()
622 e_dbg("ERROR: Flash registers not mapped\n"); in e1000_init_nvm_params_ich8lan()
1024 e_dbg("max_frame_size not set.\n"); in e1000_platform_pm_pch_lpt()
1030 e_dbg("Speed not set.\n"); in e1000_platform_pm_pch_lpt()
1055 e_dbg("Invalid LTR latency scale %d\n", scale); in e1000_platform_pm_pch_lpt()
1136 e_dbg("CABLE_DISCONNECTED %s set after %dmsec\n", in e1000_enable_ulp_lpt_lp()
1220 e_dbg("Error in ULP enable flow: %d\n", ret_val); in e1000_enable_ulp_lpt_lp()
1287 e_dbg("ULP_CONFIG_DONE cleared after %d msec\n", in e1000_disable_ulp_lpt_lp()
1377 e_dbg("Error in ULP disable flow: %d\n", ret_val); in e1000_disable_ulp_lpt_lp()
1647 e_dbg("Error configuring flow control\n"); in e1000_check_for_copper_link_ich8lan()
1756 e_dbg("contention for Phy access\n"); in e1000_acquire_swflag_ich8lan()
1770 e_dbg("SW has already locked the resource.\n"); in e1000_acquire_swflag_ich8lan()
1790 e_dbg("Failed to acquire the semaphore, FW or HW has it: FWSM=0x%8.8x EXTCNF_CTRL=0x%8.8x)\n", in e1000_acquire_swflag_ich8lan()
1822 e_dbg("Semaphore unexpectedly released by sw/fw/hw\n"); in e1000_release_swflag_ich8lan()
1921 e_dbg("SHRA[%d] might be locked by ME - FWSM=0x%8.8x\n", in e1000_rar_set_pch2lan()
1926 e_dbg("Failed to write receive address at index %d\n", index); in e1000_rar_set_pch2lan()
2036 e_dbg("Failed to write receive address at index %d\n", index); in e1000_rar_set_pch_lpt()
2093 e_dbg("Unsupported SMB frequency in PHY\n"); in e1000_write_smbus_addr()
2861 e_dbg("LAN_INIT_DONE not set, increase timeout\n"); in e1000_lan_init_done_ich8lan()
3216 e_dbg("ERROR: No valid NVM bank present\n"); in e1000_valid_nvm_bank_detect_ich8lan()
3230 e_dbg("Unable to determine valid NVM bank via EEC - reading flash signature\n"); in e1000_valid_nvm_bank_detect_ich8lan()
3259 e_dbg("ERROR: No valid NVM bank present\n"); in e1000_valid_nvm_bank_detect_ich8lan()
3287 e_dbg("nvm parameter(s) out of bounds\n"); in e1000_read_nvm_spt()
3296 e_dbg("Could not detect valid bank, assuming bank 0\n"); in e1000_read_nvm_spt()
3352 e_dbg("NVM read error: %d\n", ret_val); in e1000_read_nvm_spt()
3378 e_dbg("nvm parameter(s) out of bounds\n"); in e1000_read_nvm_ich8lan()
3387 e_dbg("Could not detect valid bank, assuming bank 0\n"); in e1000_read_nvm_ich8lan()
3412 e_dbg("NVM read error: %d\n", ret_val); in e1000_read_nvm_ich8lan()
3433 e_dbg("Flash descriptor invalid. SW Sequencing must be used.\n"); in e1000_flash_cycle_init_ich8lan()
3489 e_dbg("Flash controller busy, cannot get access\n"); in e1000_flash_cycle_init_ich8lan()
3667 e_dbg("Timeout error - flash cycle did not complete.\n"); in e1000_read_flash_data_ich8lan()
3742 e_dbg("Timeout error - flash cycle did not complete.\n"); in e1000_read_flash_data32_ich8lan()
3769 e_dbg("nvm parameter(s) out of bounds\n"); in e1000_write_nvm_ich8lan()
3819 e_dbg("Could not detect valid bank, assuming bank 0\n"); in e1000_update_nvm_checksum_spt()
3885 e_dbg("Flash commit failed.\n"); in e1000_update_nvm_checksum_spt()
3941 e_dbg("NVM update error: %d\n", ret_val); in e1000_update_nvm_checksum_spt()
3980 e_dbg("Could not detect valid bank, assuming bank 0\n"); in e1000_update_nvm_checksum_ich8lan()
4042 e_dbg("Flash commit failed.\n"); in e1000_update_nvm_checksum_ich8lan()
4092 e_dbg("NVM update error: %d\n", ret_val); in e1000_update_nvm_checksum_ich8lan()
4139 e_dbg("NVM Checksum Invalid\n"); in e1000_validate_nvm_checksum_ich8lan()
4279 e_dbg("Timeout error - flash cycle did not complete.\n"); in e1000_write_flash_data_ich8lan()
4363 e_dbg("Timeout error - flash cycle did not complete.\n"); in e1000_write_flash_data32_ich8lan()
4409 e_dbg("Retrying Byte %8.8X at offset %u\n", dword, offset); in e1000_retry_write_flash_dword_ich8lan()
4441 e_dbg("Retrying Byte %2.2X at offset %u\n", byte, offset); in e1000_retry_write_flash_byte_ich8lan()
4580 e_dbg("NVM Read Error\n"); in e1000_valid_led_default_ich8lan()
4706 e_dbg("PCI-E Master disable polling has failed.\n"); in e1000_reset_hw_ich8lan()
4708 e_dbg("Masking off all interrupts\n"); in e1000_reset_hw_ich8lan()
4758 e_dbg("Issuing a global reset to ich8lan\n"); in e1000_reset_hw_ich8lan()
4826 e_dbg("Error initializing identification LED\n"); in e1000_init_hw_ich8lan()
4832 e_dbg("Zeroing the MTA\n"); in e1000_init_hw_ich8lan()
5009 e_dbg("After fix-ups FlowControl is now = %x\n", hw->fc.current_mode); in e1000_setup_link_ich8lan()
5249 e_dbg("Workaround applies to ICH8 only.\n"); in e1000e_set_kmrn_lock_loss_workaround_ich8lan()
5485 e_dbg("Failed to init PHY flow ret_val=%d\n", ret_val); in e1000_resume_workarounds_pchlan()
5499 e_dbg("Failed to setup iRST\n"); in e1000_resume_workarounds_pchlan()
5529 e_dbg("Error %d in resume workarounds\n", ret_val); in e1000_resume_workarounds_pchlan()
5694 e_dbg("Auto Read Done did not complete\n"); in e1000_get_cfg_done_ich8lan()
5704 e_dbg("PHY Reset Asserted not set - needs delay\n"); in e1000_get_cfg_done_ich8lan()
5715 e_dbg("EEPROM not present\n"); in e1000_get_cfg_done_ich8lan()