Lines Matching refs:phy_reg
178 u16 phy_reg = 0; in e1000_phy_is_accessible_pchlan() local
185 ret_val = e1e_rphy_locked(hw, MII_PHYSID1, &phy_reg); in e1000_phy_is_accessible_pchlan()
186 if (ret_val || (phy_reg == 0xFFFF)) in e1000_phy_is_accessible_pchlan()
188 phy_id = (u32)(phy_reg << 16); in e1000_phy_is_accessible_pchlan()
190 ret_val = e1e_rphy_locked(hw, MII_PHYSID2, &phy_reg); in e1000_phy_is_accessible_pchlan()
191 if (ret_val || (phy_reg == 0xFFFF)) { in e1000_phy_is_accessible_pchlan()
195 phy_id |= (u32)(phy_reg & PHY_REVISION_MASK); in e1000_phy_is_accessible_pchlan()
204 hw->phy.revision = (u32)(phy_reg & ~PHY_REVISION_MASK); in e1000_phy_is_accessible_pchlan()
226 e1e_rphy_locked(hw, CV_SMB_CTRL, &phy_reg); in e1000_phy_is_accessible_pchlan()
227 phy_reg &= ~CV_SMB_CTRL_FORCE_SMBUS; in e1000_phy_is_accessible_pchlan()
228 e1e_wphy_locked(hw, CV_SMB_CTRL, phy_reg); in e1000_phy_is_accessible_pchlan()
1102 u16 phy_reg; in e1000_enable_ulp_lpt_lp() local
1146 ret_val = e1000_read_phy_reg_hv_locked(hw, CV_SMB_CTRL, &phy_reg); in e1000_enable_ulp_lpt_lp()
1149 phy_reg |= CV_SMB_CTRL_FORCE_SMBUS; in e1000_enable_ulp_lpt_lp()
1150 e1000_write_phy_reg_hv_locked(hw, CV_SMB_CTRL, phy_reg); in e1000_enable_ulp_lpt_lp()
1166 phy_reg = oem_reg; in e1000_enable_ulp_lpt_lp()
1167 phy_reg |= HV_OEM_BITS_LPLU | HV_OEM_BITS_GBE_DIS; in e1000_enable_ulp_lpt_lp()
1170 phy_reg); in e1000_enable_ulp_lpt_lp()
1179 ret_val = e1000_read_phy_reg_hv_locked(hw, I218_ULP_CONFIG1, &phy_reg); in e1000_enable_ulp_lpt_lp()
1182 phy_reg |= (I218_ULP_CONFIG1_RESET_TO_SMBUS | in e1000_enable_ulp_lpt_lp()
1186 phy_reg |= I218_ULP_CONFIG1_WOL_HOST; in e1000_enable_ulp_lpt_lp()
1188 phy_reg &= ~I218_ULP_CONFIG1_WOL_HOST; in e1000_enable_ulp_lpt_lp()
1190 phy_reg |= I218_ULP_CONFIG1_STICKY_ULP; in e1000_enable_ulp_lpt_lp()
1191 phy_reg &= ~I218_ULP_CONFIG1_INBAND_EXIT; in e1000_enable_ulp_lpt_lp()
1193 phy_reg |= I218_ULP_CONFIG1_INBAND_EXIT; in e1000_enable_ulp_lpt_lp()
1194 phy_reg &= ~I218_ULP_CONFIG1_STICKY_ULP; in e1000_enable_ulp_lpt_lp()
1195 phy_reg &= ~I218_ULP_CONFIG1_WOL_HOST; in e1000_enable_ulp_lpt_lp()
1197 e1000_write_phy_reg_hv_locked(hw, I218_ULP_CONFIG1, phy_reg); in e1000_enable_ulp_lpt_lp()
1205 phy_reg |= I218_ULP_CONFIG1_START; in e1000_enable_ulp_lpt_lp()
1206 e1000_write_phy_reg_hv_locked(hw, I218_ULP_CONFIG1, phy_reg); in e1000_enable_ulp_lpt_lp()
1246 u16 phy_reg; in e1000_disable_ulp_lpt_lp() local
1313 ret_val = e1000_read_phy_reg_hv_locked(hw, CV_SMB_CTRL, &phy_reg); in e1000_disable_ulp_lpt_lp()
1325 &phy_reg); in e1000_disable_ulp_lpt_lp()
1329 phy_reg &= ~CV_SMB_CTRL_FORCE_SMBUS; in e1000_disable_ulp_lpt_lp()
1330 e1000_write_phy_reg_hv_locked(hw, CV_SMB_CTRL, phy_reg); in e1000_disable_ulp_lpt_lp()
1340 ret_val = e1000_read_phy_reg_hv_locked(hw, HV_PM_CTRL, &phy_reg); in e1000_disable_ulp_lpt_lp()
1343 phy_reg |= HV_PM_CTRL_K1_ENABLE; in e1000_disable_ulp_lpt_lp()
1344 e1000_write_phy_reg_hv_locked(hw, HV_PM_CTRL, phy_reg); in e1000_disable_ulp_lpt_lp()
1347 ret_val = e1000_read_phy_reg_hv_locked(hw, I218_ULP_CONFIG1, &phy_reg); in e1000_disable_ulp_lpt_lp()
1350 phy_reg &= ~(I218_ULP_CONFIG1_IND | in e1000_disable_ulp_lpt_lp()
1358 e1000_write_phy_reg_hv_locked(hw, I218_ULP_CONFIG1, phy_reg); in e1000_disable_ulp_lpt_lp()
1361 phy_reg |= I218_ULP_CONFIG1_START; in e1000_disable_ulp_lpt_lp()
1362 e1000_write_phy_reg_hv_locked(hw, I218_ULP_CONFIG1, phy_reg); in e1000_disable_ulp_lpt_lp()
1398 u16 phy_reg; in e1000_check_for_copper_link_ich8lan() local
1462 u16 phy_reg; in e1000_check_for_copper_link_ich8lan() local
1464 e1e_rphy_locked(hw, I217_PLL_CLOCK_GATE_REG, &phy_reg); in e1000_check_for_copper_link_ich8lan()
1465 phy_reg &= ~I217_PLL_CLOCK_GATE_MASK; in e1000_check_for_copper_link_ich8lan()
1467 phy_reg |= 0x3E8; in e1000_check_for_copper_link_ich8lan()
1469 phy_reg |= 0xFA; in e1000_check_for_copper_link_ich8lan()
1470 e1e_wphy_locked(hw, I217_PLL_CLOCK_GATE_REG, phy_reg); in e1000_check_for_copper_link_ich8lan()
1474 &phy_reg); in e1000_check_for_copper_link_ich8lan()
1476 phy_reg |= HV_PM_CTRL_K1_CLK_REQ; in e1000_check_for_copper_link_ich8lan()
1479 phy_reg); in e1000_check_for_copper_link_ich8lan()
1604 e1e_rphy(hw, HV_KMRN_FIFO_CTRLSTA, &phy_reg); in e1000_check_for_copper_link_ich8lan()
1605 phy_reg &= ~HV_KMRN_FIFO_CTRLSTA_PREAMBLE_MASK; in e1000_check_for_copper_link_ich8lan()
1608 phy_reg |= BIT(HV_KMRN_FIFO_CTRLSTA_PREAMBLE_SHIFT); in e1000_check_for_copper_link_ich8lan()
1610 e1e_wphy(hw, HV_KMRN_FIFO_CTRLSTA, phy_reg); in e1000_check_for_copper_link_ich8lan()
2533 u16 i, phy_reg = 0; in e1000_copy_rx_addrs_to_phy_ich8lan() local
2539 ret_val = e1000_enable_phy_wakeup_reg_access_bm(hw, &phy_reg); in e1000_copy_rx_addrs_to_phy_ich8lan()
2559 e1000_disable_phy_wakeup_reg_access_bm(hw, &phy_reg); in e1000_copy_rx_addrs_to_phy_ich8lan()
2574 u16 phy_reg, data; in e1000_lv_jumbo_workaround_ich8lan() local
2582 e1e_rphy(hw, PHY_REG(769, 20), &phy_reg); in e1000_lv_jumbo_workaround_ich8lan()
2583 ret_val = e1e_wphy(hw, PHY_REG(769, 20), phy_reg | BIT(14)); in e1000_lv_jumbo_workaround_ich8lan()
2730 return e1e_wphy(hw, PHY_REG(769, 20), phy_reg & ~BIT(14)); in e1000_lv_jumbo_workaround_ich8lan()
5362 u16 phy_reg, device_id = hw->adapter->pdev->device; in e1000_suspend_workarounds_ich8lan() local
5402 I217_LPI_GPIO_CTRL, &phy_reg); in e1000_suspend_workarounds_ich8lan()
5403 phy_reg |= I217_LPI_GPIO_CTRL_AUTO_EN_LPI; in e1000_suspend_workarounds_ich8lan()
5405 I217_LPI_GPIO_CTRL, phy_reg); in e1000_suspend_workarounds_ich8lan()
5418 e1e_rphy_locked(hw, I217_PROXY_CTRL, &phy_reg); in e1000_suspend_workarounds_ich8lan()
5419 phy_reg |= I217_PROXY_CTRL_AUTO_DISABLE; in e1000_suspend_workarounds_ich8lan()
5420 e1e_wphy_locked(hw, I217_PROXY_CTRL, phy_reg); in e1000_suspend_workarounds_ich8lan()
5425 e1e_rphy_locked(hw, I217_SxCTRL, &phy_reg); in e1000_suspend_workarounds_ich8lan()
5426 phy_reg |= I217_SxCTRL_ENABLE_LPI_RESET; in e1000_suspend_workarounds_ich8lan()
5427 e1e_wphy_locked(hw, I217_SxCTRL, phy_reg); in e1000_suspend_workarounds_ich8lan()
5430 e1e_rphy_locked(hw, I217_MEMPWR, &phy_reg); in e1000_suspend_workarounds_ich8lan()
5431 phy_reg &= ~I217_MEMPWR_DISABLE_SMB_RELEASE; in e1000_suspend_workarounds_ich8lan()
5432 e1e_wphy_locked(hw, I217_MEMPWR, phy_reg); in e1000_suspend_workarounds_ich8lan()
5438 e1e_rphy_locked(hw, I217_CGFREG, &phy_reg); in e1000_suspend_workarounds_ich8lan()
5439 phy_reg |= I217_CGFREG_ENABLE_MTA_RESET; in e1000_suspend_workarounds_ich8lan()
5440 e1e_wphy_locked(hw, I217_CGFREG, phy_reg); in e1000_suspend_workarounds_ich8lan()
5495 u16 phy_reg; in e1000_resume_workarounds_pchlan() local
5504 e1e_rphy_locked(hw, I217_LPI_GPIO_CTRL, &phy_reg); in e1000_resume_workarounds_pchlan()
5505 phy_reg &= ~I217_LPI_GPIO_CTRL_AUTO_EN_LPI; in e1000_resume_workarounds_pchlan()
5506 e1e_wphy_locked(hw, I217_LPI_GPIO_CTRL, phy_reg); in e1000_resume_workarounds_pchlan()
5512 ret_val = e1e_rphy_locked(hw, I217_MEMPWR, &phy_reg); in e1000_resume_workarounds_pchlan()
5515 phy_reg |= I217_MEMPWR_DISABLE_SMB_RELEASE; in e1000_resume_workarounds_pchlan()
5516 e1e_wphy_locked(hw, I217_MEMPWR, phy_reg); in e1000_resume_workarounds_pchlan()
5522 ret_val = e1e_rphy_locked(hw, I217_CGFREG, &phy_reg); in e1000_resume_workarounds_pchlan()
5525 phy_reg &= ~I217_CGFREG_ENABLE_MTA_RESET; in e1000_resume_workarounds_pchlan()
5526 e1e_wphy_locked(hw, I217_CGFREG, phy_reg); in e1000_resume_workarounds_pchlan()