Lines Matching refs:mbox
284 static int mlxsw_pci_sdq_init(struct mlxsw_pci *mlxsw_pci, char *mbox, in mlxsw_pci_sdq_init() argument
297 mlxsw_cmd_mbox_sw2hw_dq_cq_set(mbox, q->num); in mlxsw_pci_sdq_init()
298 mlxsw_cmd_mbox_sw2hw_dq_sdq_tclass_set(mbox, tclass); in mlxsw_pci_sdq_init()
299 mlxsw_cmd_mbox_sw2hw_dq_log2_dq_sz_set(mbox, 3); /* 8 pages */ in mlxsw_pci_sdq_init()
303 mlxsw_cmd_mbox_sw2hw_dq_pa_set(mbox, i, mapaddr); in mlxsw_pci_sdq_init()
306 err = mlxsw_cmd_sw2hw_sdq(mlxsw_pci->core, mbox, q->num); in mlxsw_pci_sdq_init()
386 static int mlxsw_pci_rdq_init(struct mlxsw_pci *mlxsw_pci, char *mbox, in mlxsw_pci_rdq_init() argument
400 mlxsw_cmd_mbox_sw2hw_dq_cq_set(mbox, sdq_count + q->num); in mlxsw_pci_rdq_init()
401 mlxsw_cmd_mbox_sw2hw_dq_log2_dq_sz_set(mbox, 3); /* 8 pages */ in mlxsw_pci_rdq_init()
405 mlxsw_cmd_mbox_sw2hw_dq_pa_set(mbox, i, mapaddr); in mlxsw_pci_rdq_init()
408 err = mlxsw_cmd_sw2hw_rdq(mlxsw_pci->core, mbox, q->num); in mlxsw_pci_rdq_init()
461 static int mlxsw_pci_cq_init(struct mlxsw_pci *mlxsw_pci, char *mbox, in mlxsw_pci_cq_init() argument
476 mlxsw_cmd_mbox_sw2hw_cq_cqe_ver_set(mbox, in mlxsw_pci_cq_init()
479 mlxsw_cmd_mbox_sw2hw_cq_cqe_ver_set(mbox, in mlxsw_pci_cq_init()
482 mlxsw_cmd_mbox_sw2hw_cq_c_eqn_set(mbox, MLXSW_PCI_EQ_COMP_NUM); in mlxsw_pci_cq_init()
483 mlxsw_cmd_mbox_sw2hw_cq_st_set(mbox, 0); in mlxsw_pci_cq_init()
484 mlxsw_cmd_mbox_sw2hw_cq_log_cq_size_set(mbox, ilog2(q->count)); in mlxsw_pci_cq_init()
488 mlxsw_cmd_mbox_sw2hw_cq_pa_set(mbox, i, mapaddr); in mlxsw_pci_cq_init()
490 err = mlxsw_cmd_sw2hw_cq(mlxsw_pci->core, mbox, q->num); in mlxsw_pci_cq_init()
726 static int mlxsw_pci_eq_init(struct mlxsw_pci *mlxsw_pci, char *mbox, in mlxsw_pci_eq_init() argument
740 mlxsw_cmd_mbox_sw2hw_eq_int_msix_set(mbox, 1); /* MSI-X used */ in mlxsw_pci_eq_init()
741 mlxsw_cmd_mbox_sw2hw_eq_st_set(mbox, 1); /* armed */ in mlxsw_pci_eq_init()
742 mlxsw_cmd_mbox_sw2hw_eq_log_eq_size_set(mbox, ilog2(q->count)); in mlxsw_pci_eq_init()
746 mlxsw_cmd_mbox_sw2hw_eq_pa_set(mbox, i, mapaddr); in mlxsw_pci_eq_init()
748 err = mlxsw_cmd_sw2hw_eq(mlxsw_pci->core, mbox, q->num); in mlxsw_pci_eq_init()
843 int (*init)(struct mlxsw_pci *mlxsw_pci, char *mbox,
889 static int mlxsw_pci_queue_init(struct mlxsw_pci *mlxsw_pci, char *mbox, in mlxsw_pci_queue_init() argument
936 mlxsw_cmd_mbox_zero(mbox); in mlxsw_pci_queue_init()
937 err = q_ops->init(mlxsw_pci, mbox, q); in mlxsw_pci_queue_init()
962 static int mlxsw_pci_queue_group_init(struct mlxsw_pci *mlxsw_pci, char *mbox, in mlxsw_pci_queue_group_init() argument
976 err = mlxsw_pci_queue_init(mlxsw_pci, mbox, q_ops, in mlxsw_pci_queue_group_init()
1004 static int mlxsw_pci_aqs_init(struct mlxsw_pci *mlxsw_pci, char *mbox) in mlxsw_pci_aqs_init() argument
1018 mlxsw_cmd_mbox_zero(mbox); in mlxsw_pci_aqs_init()
1019 err = mlxsw_cmd_query_aq_cap(mlxsw_pci->core, mbox); in mlxsw_pci_aqs_init()
1023 num_sdqs = mlxsw_cmd_mbox_query_aq_cap_max_num_sdqs_get(mbox); in mlxsw_pci_aqs_init()
1024 sdq_log2sz = mlxsw_cmd_mbox_query_aq_cap_log_max_sdq_sz_get(mbox); in mlxsw_pci_aqs_init()
1025 num_rdqs = mlxsw_cmd_mbox_query_aq_cap_max_num_rdqs_get(mbox); in mlxsw_pci_aqs_init()
1026 rdq_log2sz = mlxsw_cmd_mbox_query_aq_cap_log_max_rdq_sz_get(mbox); in mlxsw_pci_aqs_init()
1027 num_cqs = mlxsw_cmd_mbox_query_aq_cap_max_num_cqs_get(mbox); in mlxsw_pci_aqs_init()
1028 cq_log2sz = mlxsw_cmd_mbox_query_aq_cap_log_max_cq_sz_get(mbox); in mlxsw_pci_aqs_init()
1029 cqv2_log2sz = mlxsw_cmd_mbox_query_aq_cap_log_max_cqv2_sz_get(mbox); in mlxsw_pci_aqs_init()
1030 num_eqs = mlxsw_cmd_mbox_query_aq_cap_max_num_eqs_get(mbox); in mlxsw_pci_aqs_init()
1031 eq_log2sz = mlxsw_cmd_mbox_query_aq_cap_log_max_eq_sz_get(mbox); in mlxsw_pci_aqs_init()
1052 err = mlxsw_pci_queue_group_init(mlxsw_pci, mbox, &mlxsw_pci_eq_ops, in mlxsw_pci_aqs_init()
1059 err = mlxsw_pci_queue_group_init(mlxsw_pci, mbox, &mlxsw_pci_cq_ops, in mlxsw_pci_aqs_init()
1066 err = mlxsw_pci_queue_group_init(mlxsw_pci, mbox, &mlxsw_pci_sdq_ops, in mlxsw_pci_aqs_init()
1073 err = mlxsw_pci_queue_group_init(mlxsw_pci, mbox, &mlxsw_pci_rdq_ops, in mlxsw_pci_aqs_init()
1104 char *mbox, int index, in mlxsw_pci_config_profile_swid_config() argument
1111 mbox, index, swid->type); in mlxsw_pci_config_profile_swid_config()
1116 mbox, index, swid->properties); in mlxsw_pci_config_profile_swid_config()
1119 mlxsw_cmd_mbox_config_profile_swid_config_mask_set(mbox, index, mask); in mlxsw_pci_config_profile_swid_config()
1143 static int mlxsw_pci_config_profile(struct mlxsw_pci *mlxsw_pci, char *mbox, in mlxsw_pci_config_profile() argument
1150 mlxsw_cmd_mbox_zero(mbox); in mlxsw_pci_config_profile()
1154 mbox, 1); in mlxsw_pci_config_profile()
1156 mbox, profile->max_vepa_channels); in mlxsw_pci_config_profile()
1160 mbox, 1); in mlxsw_pci_config_profile()
1162 mbox, profile->max_mid); in mlxsw_pci_config_profile()
1166 mbox, 1); in mlxsw_pci_config_profile()
1168 mbox, profile->max_pgt); in mlxsw_pci_config_profile()
1172 mbox, 1); in mlxsw_pci_config_profile()
1174 mbox, profile->max_system_port); in mlxsw_pci_config_profile()
1178 mbox, 1); in mlxsw_pci_config_profile()
1180 mbox, profile->max_vlan_groups); in mlxsw_pci_config_profile()
1184 mbox, 1); in mlxsw_pci_config_profile()
1186 mbox, profile->max_regions); in mlxsw_pci_config_profile()
1190 mbox, 1); in mlxsw_pci_config_profile()
1192 mbox, profile->max_flood_tables); in mlxsw_pci_config_profile()
1194 mbox, profile->max_vid_flood_tables); in mlxsw_pci_config_profile()
1196 mbox, profile->max_fid_offset_flood_tables); in mlxsw_pci_config_profile()
1198 mbox, profile->fid_offset_flood_table_size); in mlxsw_pci_config_profile()
1200 mbox, profile->max_fid_flood_tables); in mlxsw_pci_config_profile()
1202 mbox, profile->fid_flood_table_size); in mlxsw_pci_config_profile()
1206 mbox, 1); in mlxsw_pci_config_profile()
1208 mbox, profile->flood_mode); in mlxsw_pci_config_profile()
1212 mbox, 1); in mlxsw_pci_config_profile()
1214 mbox, profile->max_ib_mc); in mlxsw_pci_config_profile()
1218 mbox, 1); in mlxsw_pci_config_profile()
1220 mbox, profile->max_pkey); in mlxsw_pci_config_profile()
1224 mbox, 1); in mlxsw_pci_config_profile()
1226 mbox, profile->ar_sec); in mlxsw_pci_config_profile()
1230 mbox, 1); in mlxsw_pci_config_profile()
1232 mbox, profile->adaptive_routing_group_cap); in mlxsw_pci_config_profile()
1239 mlxsw_cmd_mbox_config_profile_set_kvd_linear_size_set(mbox, 1); in mlxsw_pci_config_profile()
1240 mlxsw_cmd_mbox_config_profile_kvd_linear_size_set(mbox, in mlxsw_pci_config_profile()
1242 mlxsw_cmd_mbox_config_profile_set_kvd_hash_single_size_set(mbox, in mlxsw_pci_config_profile()
1244 mlxsw_cmd_mbox_config_profile_kvd_hash_single_size_set(mbox, in mlxsw_pci_config_profile()
1247 mbox, 1); in mlxsw_pci_config_profile()
1248 mlxsw_cmd_mbox_config_profile_kvd_hash_double_size_set(mbox, in mlxsw_pci_config_profile()
1253 mbox, 1); in mlxsw_pci_config_profile()
1255 mbox, profile->kvh_xlt_cache_mode); in mlxsw_pci_config_profile()
1259 mlxsw_pci_config_profile_swid_config(mlxsw_pci, mbox, i, in mlxsw_pci_config_profile()
1263 mlxsw_cmd_mbox_config_profile_set_cqe_version_set(mbox, 1); in mlxsw_pci_config_profile()
1264 mlxsw_cmd_mbox_config_profile_cqe_version_set(mbox, 1); in mlxsw_pci_config_profile()
1267 return mlxsw_cmd_config_profile_set(mlxsw_pci->core, mbox); in mlxsw_pci_config_profile()
1272 char *mbox) in mlxsw_pci_boardinfo_xm_process() argument
1274 int count = mlxsw_cmd_mbox_boardinfo_xm_num_local_ports_get(mbox); in mlxsw_pci_boardinfo_xm_process()
1277 if (!mlxsw_cmd_mbox_boardinfo_xm_exists_get(mbox)) in mlxsw_pci_boardinfo_xm_process()
1289 mlxsw_cmd_mbox_boardinfo_xm_local_port_entry_get(mbox, in mlxsw_pci_boardinfo_xm_process()
1294 static int mlxsw_pci_boardinfo(struct mlxsw_pci *mlxsw_pci, char *mbox) in mlxsw_pci_boardinfo() argument
1299 mlxsw_cmd_mbox_zero(mbox); in mlxsw_pci_boardinfo()
1300 err = mlxsw_cmd_boardinfo(mlxsw_pci->core, mbox); in mlxsw_pci_boardinfo()
1303 mlxsw_cmd_mbox_boardinfo_vsd_memcpy_from(mbox, bus_info->vsd); in mlxsw_pci_boardinfo()
1304 mlxsw_cmd_mbox_boardinfo_psid_memcpy_from(mbox, bus_info->psid); in mlxsw_pci_boardinfo()
1306 return mlxsw_pci_boardinfo_xm_process(mlxsw_pci, bus_info, mbox); in mlxsw_pci_boardinfo()
1309 static int mlxsw_pci_fw_area_init(struct mlxsw_pci *mlxsw_pci, char *mbox, in mlxsw_pci_fw_area_init() argument
1323 mlxsw_cmd_mbox_zero(mbox); in mlxsw_pci_fw_area_init()
1335 mlxsw_cmd_mbox_map_fa_pa_set(mbox, nent, mem_item->mapaddr); in mlxsw_pci_fw_area_init()
1336 mlxsw_cmd_mbox_map_fa_log2size_set(mbox, nent, 0); /* 1 page */ in mlxsw_pci_fw_area_init()
1338 err = mlxsw_cmd_map_fa(mlxsw_pci->core, mbox, nent); in mlxsw_pci_fw_area_init()
1342 mlxsw_cmd_mbox_zero(mbox); in mlxsw_pci_fw_area_init()
1347 err = mlxsw_cmd_map_fa(mlxsw_pci->core, mbox, nent); in mlxsw_pci_fw_area_init()
1396 struct mlxsw_pci_mem_item *mbox) in mlxsw_pci_mbox_alloc() argument
1401 mbox->size = MLXSW_CMD_MBOX_SIZE; in mlxsw_pci_mbox_alloc()
1402 mbox->buf = dma_alloc_coherent(&pdev->dev, MLXSW_CMD_MBOX_SIZE, in mlxsw_pci_mbox_alloc()
1403 &mbox->mapaddr, GFP_KERNEL); in mlxsw_pci_mbox_alloc()
1404 if (!mbox->buf) { in mlxsw_pci_mbox_alloc()
1413 struct mlxsw_pci_mem_item *mbox) in mlxsw_pci_mbox_free() argument
1417 dma_free_coherent(&pdev->dev, MLXSW_CMD_MBOX_SIZE, mbox->buf, in mlxsw_pci_mbox_free()
1418 mbox->mapaddr); in mlxsw_pci_mbox_free()
1495 char *mbox; in mlxsw_pci_init() local
1501 mbox = mlxsw_cmd_mbox_alloc(); in mlxsw_pci_init()
1502 if (!mbox) in mlxsw_pci_init()
1515 err = mlxsw_cmd_query_fw(mlxsw_core, mbox); in mlxsw_pci_init()
1520 mlxsw_cmd_mbox_query_fw_fw_rev_major_get(mbox); in mlxsw_pci_init()
1522 mlxsw_cmd_mbox_query_fw_fw_rev_minor_get(mbox); in mlxsw_pci_init()
1524 mlxsw_cmd_mbox_query_fw_fw_rev_subminor_get(mbox); in mlxsw_pci_init()
1526 if (mlxsw_cmd_mbox_query_fw_cmd_interface_rev_get(mbox) != 1) { in mlxsw_pci_init()
1531 if (mlxsw_cmd_mbox_query_fw_doorbell_page_bar_get(mbox) != 0) { in mlxsw_pci_init()
1538 mlxsw_cmd_mbox_query_fw_doorbell_page_offset_get(mbox); in mlxsw_pci_init()
1540 if (mlxsw_cmd_mbox_query_fw_fr_rn_clk_bar_get(mbox) != 0) { in mlxsw_pci_init()
1547 mlxsw_cmd_mbox_query_fw_free_running_clock_offset_get(mbox); in mlxsw_pci_init()
1549 num_pages = mlxsw_cmd_mbox_query_fw_fw_pages_get(mbox); in mlxsw_pci_init()
1550 err = mlxsw_pci_fw_area_init(mlxsw_pci, mbox, num_pages); in mlxsw_pci_init()
1554 err = mlxsw_pci_boardinfo(mlxsw_pci, mbox); in mlxsw_pci_init()
1558 err = mlxsw_core_resources_query(mlxsw_core, mbox, res); in mlxsw_pci_init()
1577 err = mlxsw_pci_config_profile(mlxsw_pci, mbox, profile, res); in mlxsw_pci_init()
1581 err = mlxsw_pci_aqs_init(mlxsw_pci, mbox); in mlxsw_pci_init()
1612 mlxsw_cmd_mbox_free(mbox); in mlxsw_pci_init()