Lines Matching refs:MLXSW_ITEM32
47 MLXSW_ITEM32(reg, sgcr, llb, 0x04, 0, 1);
87 MLXSW_ITEM32(reg, smid, swid, 0x00, 24, 8);
94 MLXSW_ITEM32(reg, smid, mid, 0x00, 0, 16);
137 MLXSW_ITEM32(reg, sspr, m, 0x00, 31, 1);
144 MLXSW_ITEM32(reg, sspr, local_port, 0x00, 16, 8);
152 MLXSW_ITEM32(reg, sspr, sub_port, 0x00, 8, 8);
162 MLXSW_ITEM32(reg, sspr, system_port, 0x04, 0, 16);
187 MLXSW_ITEM32(reg, sfdat, swid, 0x00, 24, 8);
196 MLXSW_ITEM32(reg, sfdat, age_time, 0x04, 0, 20);
225 MLXSW_ITEM32(reg, sfd, swid, 0x00, 24, 8);
259 MLXSW_ITEM32(reg, sfd, op, 0x04, 30, 2);
268 MLXSW_ITEM32(reg, sfd, record_locator, 0x04, 0, 30);
277 MLXSW_ITEM32(reg, sfd, num_rec, 0x08, 0, 8);
609 MLXSW_ITEM32(reg, sfn, swid, 0x00, 24, 8);
615 MLXSW_ITEM32(reg, sfn, end, 0x04, 20, 1);
625 MLXSW_ITEM32(reg, sfn, num_rec, 0x04, 0, 8);
784 MLXSW_ITEM32(reg, spms, local_port, 0x00, 16, 8);
829 MLXSW_ITEM32(reg, spvid, tport, 0x00, 24, 1);
836 MLXSW_ITEM32(reg, spvid, local_port, 0x00, 16, 8);
843 MLXSW_ITEM32(reg, spvid, sub_port, 0x00, 8, 8);
851 MLXSW_ITEM32(reg, spvid, egr_et_set, 0x04, 24, 1);
863 MLXSW_ITEM32(reg, spvid, et_vlan, 0x04, 16, 2);
869 MLXSW_ITEM32(reg, spvid, pvid, 0x04, 0, 12);
901 MLXSW_ITEM32(reg, spvm, pt, 0x00, 31, 1);
908 MLXSW_ITEM32(reg, spvm, pte, 0x00, 30, 1);
914 MLXSW_ITEM32(reg, spvm, local_port, 0x00, 16, 8);
921 MLXSW_ITEM32(reg, spvm, sub_port, 0x00, 8, 8);
927 MLXSW_ITEM32(reg, spvm, num_rec, 0x00, 0, 8);
997 MLXSW_ITEM32(reg, spaft, local_port, 0x00, 16, 8);
1004 MLXSW_ITEM32(reg, spaft, sub_port, 0x00, 8, 8);
1010 MLXSW_ITEM32(reg, spaft, allow_untagged, 0x04, 31, 1);
1016 MLXSW_ITEM32(reg, spaft, allow_prio_tagged, 0x04, 30, 1);
1022 MLXSW_ITEM32(reg, spaft, allow_tagged, 0x04, 29, 1);
1060 MLXSW_ITEM32(reg, sfgc, type, 0x00, 0, 4);
1072 MLXSW_ITEM32(reg, sfgc, bridge_type, 0x04, 24, 3);
1088 MLXSW_ITEM32(reg, sfgc, table_type, 0x04, 16, 3);
1095 MLXSW_ITEM32(reg, sfgc, flood_table, 0x04, 0, 6);
1101 MLXSW_ITEM32(reg, sfgc, mid, 0x08, 0, 16);
1107 MLXSW_ITEM32(reg, sfgc, counter_set_type, 0x0C, 24, 8);
1113 MLXSW_ITEM32(reg, sfgc, counter_index, 0x0C, 0, 24);
1143 MLXSW_ITEM32(reg, sftr, swid, 0x00, 24, 8);
1150 MLXSW_ITEM32(reg, sftr, flood_table, 0x00, 16, 6);
1157 MLXSW_ITEM32(reg, sftr, index, 0x00, 0, 16);
1163 MLXSW_ITEM32(reg, sftr, table_type, 0x04, 16, 3);
1169 MLXSW_ITEM32(reg, sftr, range, 0x04, 0, 16);
1213 MLXSW_ITEM32(reg, sfdf, swid, 0x00, 24, 8);
1240 MLXSW_ITEM32(reg, sfdf, flush_type, 0x04, 28, 4);
1248 MLXSW_ITEM32(reg, sfdf, flush_static, 0x04, 24, 1);
1262 MLXSW_ITEM32(reg, sfdf, fid, 0x0C, 0, 16);
1268 MLXSW_ITEM32(reg, sfdf, system_port, 0x0C, 0, 16);
1274 MLXSW_ITEM32(reg, sfdf, port_fid_system_port, 0x08, 0, 16);
1280 MLXSW_ITEM32(reg, sfdf, lag_id, 0x0C, 0, 10);
1286 MLXSW_ITEM32(reg, sfdf, lag_fid_lag_id, 0x08, 0, 10);
1313 MLXSW_ITEM32(reg, sldr, op, 0x00, 29, 3);
1319 MLXSW_ITEM32(reg, sldr, lag_id, 0x00, 0, 10);
1341 MLXSW_ITEM32(reg, sldr, num_ports, 0x04, 24, 8);
1391 MLXSW_ITEM32(reg, slcr, pp, 0x00, 24, 1);
1400 MLXSW_ITEM32(reg, slcr, local_port, 0x00, 16, 8);
1412 MLXSW_ITEM32(reg, slcr, type, 0x00, 0, 4);
1472 MLXSW_ITEM32(reg, slcr, lag_hash, 0x04, 0, 20);
1478 MLXSW_ITEM32(reg, slcr, seed, 0x08, 0, 32);
1511 MLXSW_ITEM32(reg, slcor, col, 0x00, 30, 2);
1518 MLXSW_ITEM32(reg, slcor, local_port, 0x00, 16, 8);
1524 MLXSW_ITEM32(reg, slcor, lag_id, 0x00, 0, 10);
1531 MLXSW_ITEM32(reg, slcor, port_index, 0x04, 0, 10);
1586 MLXSW_ITEM32(reg, spmlr, local_port, 0x00, 16, 8);
1593 MLXSW_ITEM32(reg, spmlr, sub_port, 0x00, 8, 8);
1612 MLXSW_ITEM32(reg, spmlr, learn_mode, 0x04, 30, 2);
1637 MLXSW_ITEM32(reg, svfa, swid, 0x00, 24, 8);
1645 MLXSW_ITEM32(reg, svfa, local_port, 0x00, 16, 8);
1660 MLXSW_ITEM32(reg, svfa, mapping_table, 0x00, 8, 3);
1669 MLXSW_ITEM32(reg, svfa, v, 0x00, 0, 1);
1675 MLXSW_ITEM32(reg, svfa, fid, 0x04, 16, 16);
1681 MLXSW_ITEM32(reg, svfa, vid, 0x04, 0, 12);
1689 MLXSW_ITEM32(reg, svfa, counter_set_type, 0x08, 24, 8);
1697 MLXSW_ITEM32(reg, svfa, counter_index, 0x08, 0, 24);
1729 MLXSW_ITEM32(reg, spvtr, tport, 0x00, 24, 1);
1736 MLXSW_ITEM32(reg, spvtr, local_port, 0x00, 16, 8);
1744 MLXSW_ITEM32(reg, spvtr, ippe, 0x04, 31, 1);
1753 MLXSW_ITEM32(reg, spvtr, ipve, 0x04, 30, 1);
1761 MLXSW_ITEM32(reg, spvtr, epve, 0x04, 29, 1);
1773 MLXSW_ITEM32(reg, spvtr, ipprio_mode, 0x04, 20, 4);
1789 MLXSW_ITEM32(reg, spvtr, ipvid_mode, 0x04, 16, 4);
1803 MLXSW_ITEM32(reg, spvtr, epvid_mode, 0x04, 0, 4);
1831 MLXSW_ITEM32(reg, svpe, local_port, 0x00, 16, 8);
1839 MLXSW_ITEM32(reg, svpe, vp_en, 0x00, 8, 1);
1869 MLXSW_ITEM32(reg, sfmr, op, 0x00, 24, 4);
1875 MLXSW_ITEM32(reg, sfmr, fid, 0x00, 0, 16);
1883 MLXSW_ITEM32(reg, sfmr, fid_offset, 0x08, 0, 16);
1892 MLXSW_ITEM32(reg, sfmr, vtfp, 0x0C, 31, 1);
1900 MLXSW_ITEM32(reg, sfmr, nve_tunnel_flood_ptr, 0x0C, 0, 24);
1909 MLXSW_ITEM32(reg, sfmr, vv, 0x10, 31, 1);
1917 MLXSW_ITEM32(reg, sfmr, vni, 0x10, 0, 24);
1951 MLXSW_ITEM32(reg, spvmlr, local_port, 0x00, 16, 8);
1957 MLXSW_ITEM32(reg, spvmlr, num_rec, 0x00, 0, 8);
2012 MLXSW_ITEM32(reg, spvc, local_port, 0x00, 16, 8);
2023 MLXSW_ITEM32(reg, spvc, inner_et2, 0x08, 17, 1);
2033 MLXSW_ITEM32(reg, spvc, et2, 0x08, 16, 1);
2044 MLXSW_ITEM32(reg, spvc, inner_et1, 0x08, 9, 1);
2054 MLXSW_ITEM32(reg, spvc, et1, 0x08, 8, 1);
2065 MLXSW_ITEM32(reg, spvc, inner_et0, 0x08, 1, 1);
2075 MLXSW_ITEM32(reg, spvc, et0, 0x08, 0, 1);
2107 MLXSW_ITEM32(reg, spevet, local_port, 0x00, 16, 8);
2116 MLXSW_ITEM32(reg, spevet, et_vlan, 0x04, 16, 2);
2142 MLXSW_ITEM32(reg, cwtp, local_port, 0, 16, 8);
2148 MLXSW_ITEM32(reg, cwtp, traffic_class, 32, 0, 8);
2220 MLXSW_ITEM32(reg, cwtpm, local_port, 0, 16, 8);
2226 MLXSW_ITEM32(reg, cwtpm, traffic_class, 32, 0, 8);
2234 MLXSW_ITEM32(reg, cwtpm, ew, 36, 1, 1);
2242 MLXSW_ITEM32(reg, cwtpm, ee, 36, 0, 1);
2250 MLXSW_ITEM32(reg, cwtpm, tcp_g, 52, 0, 2);
2258 MLXSW_ITEM32(reg, cwtpm, tcp_y, 56, 16, 2);
2266 MLXSW_ITEM32(reg, cwtpm, tcp_r, 56, 0, 2);
2274 MLXSW_ITEM32(reg, cwtpm, ntcp_g, 60, 0, 2);
2282 MLXSW_ITEM32(reg, cwtpm, ntcp_y, 64, 16, 2);
2290 MLXSW_ITEM32(reg, cwtpm, ntcp_r, 64, 0, 2);
2325 MLXSW_ITEM32(reg, pgcr, default_action_pointer_base, 0x1C, 0, 24);
2350 MLXSW_ITEM32(reg, ppbt, e, 0x00, 31, 1);
2360 MLXSW_ITEM32(reg, ppbt, op, 0x00, 28, 3);
2366 MLXSW_ITEM32(reg, ppbt, local_port, 0x00, 16, 8);
2374 MLXSW_ITEM32(reg, ppbt, g, 0x10, 31, 1);
2381 MLXSW_ITEM32(reg, ppbt, acl_info, 0x10, 0, 16);
2409 MLXSW_ITEM32(reg, pacl, v, 0x00, 24, 1);
2416 MLXSW_ITEM32(reg, pacl, acl_id, 0x08, 0, 16);
2459 MLXSW_ITEM32(reg, pagt, size, 0x00, 0, 8);
2466 MLXSW_ITEM32(reg, pagt, acl_group_id, 0x08, 0, 16);
2527 MLXSW_ITEM32(reg, ptar, op, 0x00, 28, 4);
2534 MLXSW_ITEM32(reg, ptar, action_set_type, 0x00, 16, 8);
2545 MLXSW_ITEM32(reg, ptar, key_type, 0x00, 0, 8);
2555 MLXSW_ITEM32(reg, ptar, region_size, 0x04, 0, 16);
2562 MLXSW_ITEM32(reg, ptar, region_id, 0x08, 0, 16);
2623 MLXSW_ITEM32(reg, ppbs, pbs_ptr, 0x08, 0, 24);
2629 MLXSW_ITEM32(reg, ppbs, system_port, 0x10, 0, 16);
2664 MLXSW_ITEM32(reg, prcr, op, 0x00, 28, 4);
2670 MLXSW_ITEM32(reg, prcr, offset, 0x00, 0, 16);
2676 MLXSW_ITEM32(reg, prcr, size, 0x04, 0, 16);
2689 MLXSW_ITEM32(reg, prcr, dest_offset, 0x20, 0, 16);
2729 MLXSW_ITEM32(reg, pefa, index, 0x00, 0, 24);
2738 MLXSW_ITEM32(reg, pefa, a, 0x04, 29, 1);
2746 MLXSW_ITEM32(reg, pefa, ca, 0x04, 24, 1);
2792 MLXSW_ITEM32(reg, pemrbt, protocol, 0x00, 0, 1);
2799 MLXSW_ITEM32(reg, pemrbt, group_id, 0x10, 0, 16);
2826 MLXSW_ITEM32(reg, ptce2, v, 0x00, 31, 1);
2833 MLXSW_ITEM32(reg, ptce2, a, 0x00, 30, 1);
2856 MLXSW_ITEM32(reg, ptce2, op, 0x00, 20, 3);
2861 MLXSW_ITEM32(reg, ptce2, offset, 0x00, 0, 16);
2870 MLXSW_ITEM32(reg, ptce2, priority, 0x04, 0, 24);
2931 MLXSW_ITEM32(reg, perpt, erpt_bank, 0x00, 16, 4);
2938 MLXSW_ITEM32(reg, perpt, erpt_index, 0x00, 0, 8);
2950 MLXSW_ITEM32(reg, perpt, key_size, 0x04, 0, 4);
2959 MLXSW_ITEM32(reg, perpt, bf_bypass, 0x08, 8, 1);
2965 MLXSW_ITEM32(reg, perpt, erp_id, 0x08, 0, 4);
2972 MLXSW_ITEM32(reg, perpt, erpt_base_bank, 0x0C, 16, 4);
2979 MLXSW_ITEM32(reg, perpt, erpt_base_index, 0x0C, 0, 8);
2985 MLXSW_ITEM32(reg, perpt, erp_index_in_vector, 0x10, 0, 4);
3044 MLXSW_ITEM32(reg, perar, region_id, 0x00, 0, 16);
3060 MLXSW_ITEM32(reg, perar, hw_region, 0x04, 0, 16);
3084 MLXSW_ITEM32(reg, ptce3, v, 0x00, 31, 1);
3102 MLXSW_ITEM32(reg, ptce3, op, 0x00, 20, 3);
3110 MLXSW_ITEM32(reg, ptce3, priority, 0x04, 0, 24);
3131 MLXSW_ITEM32(reg, ptce3, erp_id, 0x80, 0, 4);
3138 MLXSW_ITEM32(reg, ptce3, delta_start, 0x84, 0, 10);
3149 MLXSW_ITEM32(reg, ptce3, delta_mask, 0x88, 16, 8);
3156 MLXSW_ITEM32(reg, ptce3, delta_value, 0x88, 0, 8);
3176 MLXSW_ITEM32(reg, ptce3, prune_ctcam, 0x94, 31, 1);
3189 MLXSW_ITEM32(reg, ptce3, large_exists, 0x98, 31, 1);
3199 MLXSW_ITEM32(reg, ptce3, large_entry_key_id, 0x98, 0, 24);
3206 MLXSW_ITEM32(reg, ptce3, action_pointer, 0xA0, 0, 24);
3247 MLXSW_ITEM32(reg, percr, region_id, 0x00, 0, 16);
3253 MLXSW_ITEM32(reg, percr, atcam_ignore_prune, 0x04, 25, 1);
3259 MLXSW_ITEM32(reg, percr, ctcam_ignore_prune, 0x04, 24, 1);
3268 MLXSW_ITEM32(reg, percr, bf_bypass, 0x04, 16, 1);
3302 MLXSW_ITEM32(reg, pererp, region_id, 0x00, 0, 16);
3308 MLXSW_ITEM32(reg, pererp, ctcam_le, 0x04, 28, 1);
3314 MLXSW_ITEM32(reg, pererp, erpt_pointer_valid, 0x10, 31, 1);
3321 MLXSW_ITEM32(reg, pererp, erpt_bank_pointer, 0x10, 16, 4);
3330 MLXSW_ITEM32(reg, pererp, erpt_pointer, 0x10, 0, 8);
3347 MLXSW_ITEM32(reg, pererp, master_rp_id, 0x18, 0, 4);
3392 MLXSW_ITEM32(reg, peabfe, size, 0x00, 0, 9);
3459 MLXSW_ITEM32(reg, iedr, num_rec, 0x00, 0, 8);
3516 MLXSW_ITEM32(reg, qpts, local_port, 0x00, 16, 8);
3527 MLXSW_ITEM32(reg, qpts, trust_state, 0x04, 0, 3);
3557 MLXSW_ITEM32(reg, qpcr, g, 0x00, 14, 2);
3563 MLXSW_ITEM32(reg, qpcr, pid, 0x00, 0, 14);
3569 MLXSW_ITEM32(reg, qpcr, clear_counter, 0x04, 31, 1);
3576 MLXSW_ITEM32(reg, qpcr, color_aware, 0x04, 15, 1);
3584 MLXSW_ITEM32(reg, qpcr, bytes, 0x04, 14, 1);
3597 MLXSW_ITEM32(reg, qpcr, ir_units, 0x04, 12, 1);
3610 MLXSW_ITEM32(reg, qpcr, rate_type, 0x04, 8, 2);
3623 MLXSW_ITEM32(reg, qpcr, cbs, 0x08, 24, 6);
3632 MLXSW_ITEM32(reg, qpcr, cir, 0x0C, 0, 32);
3642 MLXSW_ITEM32(reg, qpcr, eir, 0x10, 0, 32);
3650 MLXSW_ITEM32(reg, qpcr, exceed_action, 0x14, 0, 4);
3666 MLXSW_ITEM32(reg, qpcr, violate_action, 0x18, 0, 4);
3720 MLXSW_ITEM32(reg, qtct, local_port, 0x00, 16, 8);
3727 MLXSW_ITEM32(reg, qtct, sub_port, 0x00, 8, 8);
3733 MLXSW_ITEM32(reg, qtct, switch_prio, 0x00, 0, 4);
3743 MLXSW_ITEM32(reg, qtct, tclass, 0x04, 0, 4);
3769 MLXSW_ITEM32(reg, qeec, local_port, 0x00, 16, 8);
3785 MLXSW_ITEM32(reg, qeec, element_hierarchy, 0x04, 16, 4);
3791 MLXSW_ITEM32(reg, qeec, element_index, 0x04, 0, 8);
3799 MLXSW_ITEM32(reg, qeec, next_element_index, 0x08, 0, 8);
3808 MLXSW_ITEM32(reg, qeec, mise, 0x0C, 31, 1);
3820 MLXSW_ITEM32(reg, qeec, ptps, 0x0C, 29, 1);
3836 MLXSW_ITEM32(reg, qeec, pb, 0x0C, 28, 1);
3847 MLXSW_ITEM32(reg, qeec, min_shaper_rate, 0x0C, 0, 28);
3856 MLXSW_ITEM32(reg, qeec, mase, 0x10, 31, 1);
3867 MLXSW_ITEM32(reg, qeec, max_shaper_rate, 0x10, 0, 31);
3876 MLXSW_ITEM32(reg, qeec, de, 0x18, 31, 1);
3885 MLXSW_ITEM32(reg, qeec, dwrr, 0x18, 15, 1);
3895 MLXSW_ITEM32(reg, qeec, dwrr_weight, 0x18, 0, 8);
3905 MLXSW_ITEM32(reg, qeec, max_shaper_bs, 0x1C, 0, 6);
3947 MLXSW_ITEM32(reg, qrwe, local_port, 0x00, 16, 8);
3953 MLXSW_ITEM32(reg, qrwe, dscp, 0x04, 1, 1);
3959 MLXSW_ITEM32(reg, qrwe, pcp, 0x04, 0, 1);
3988 MLXSW_ITEM32(reg, qpdsm, local_port, 0x00, 16, 8);
4074 MLXSW_ITEM32(reg, qpdp, local_port, 0x00, 16, 8);
4080 MLXSW_ITEM32(reg, qpdp, switch_prio, 0x04, 0, 4);
4109 MLXSW_ITEM32(reg, qpdpm, local_port, 0x00, 16, 8);
4160 MLXSW_ITEM32(reg, qtctm, local_port, 0x00, 16, 8);
4167 MLXSW_ITEM32(reg, qtctm, mc, 0x04, 0, 1);
4198 MLXSW_ITEM32(reg, qpsc, port_speed, 0x00, 0, 4);
4206 MLXSW_ITEM32(reg, qpsc, shaper_time_exp, 0x04, 16, 4);
4214 MLXSW_ITEM32(reg, qpsc, shaper_time_mantissa, 0x04, 0, 5);
4221 MLXSW_ITEM32(reg, qpsc, shaper_inc, 0x08, 0, 5);
4229 MLXSW_ITEM32(reg, qpsc, shaper_bs, 0x0C, 0, 6);
4235 MLXSW_ITEM32(reg, qpsc, ptsc_we, 0x10, 31, 1);
4243 MLXSW_ITEM32(reg, qpsc, port_to_shaper_credits, 0x10, 0, 8);
4253 MLXSW_ITEM32(reg, qpsc, ing_timestamp_inc, 0x20, 0, 32);
4263 MLXSW_ITEM32(reg, qpsc, egr_timestamp_inc, 0x24, 0, 32);
4297 MLXSW_ITEM32(reg, pmlp, rxtx, 0x00, 31, 1);
4303 MLXSW_ITEM32(reg, pmlp, local_port, 0x00, 16, 8);
4313 MLXSW_ITEM32(reg, pmlp, width, 0x00, 0, 8);
4353 MLXSW_ITEM32(reg, pmtu, local_port, 0x00, 16, 8);
4362 MLXSW_ITEM32(reg, pmtu, max_mtu, 0x04, 16, 16);
4370 MLXSW_ITEM32(reg, pmtu, admin_mtu, 0x08, 16, 16);
4379 MLXSW_ITEM32(reg, pmtu, oper_mtu, 0x0C, 16, 16);
4409 MLXSW_ITEM32(reg, ptys, an_disable_admin, 0x00, 30, 1);
4415 MLXSW_ITEM32(reg, ptys, local_port, 0x00, 16, 8);
4427 MLXSW_ITEM32(reg, ptys, proto_mask, 0x00, 0, 3);
4439 MLXSW_ITEM32(reg, ptys, an_status, 0x04, 28, 4);
4458 MLXSW_ITEM32(reg, ptys, ext_eth_proto_cap, 0x08, 0, 32);
4488 MLXSW_ITEM32(reg, ptys, eth_proto_cap, 0x0C, 0, 32);
4494 MLXSW_ITEM32(reg, ptys, ib_link_width_cap, 0x10, 16, 16);
4507 MLXSW_ITEM32(reg, ptys, ib_proto_cap, 0x10, 0, 16);
4513 MLXSW_ITEM32(reg, ptys, ext_eth_proto_admin, 0x14, 0, 32);
4519 MLXSW_ITEM32(reg, ptys, eth_proto_admin, 0x18, 0, 32);
4525 MLXSW_ITEM32(reg, ptys, ib_link_width_admin, 0x1C, 16, 16);
4531 MLXSW_ITEM32(reg, ptys, ib_proto_admin, 0x1C, 0, 16);
4537 MLXSW_ITEM32(reg, ptys, ext_eth_proto_oper, 0x20, 0, 32);
4543 MLXSW_ITEM32(reg, ptys, eth_proto_oper, 0x24, 0, 32);
4549 MLXSW_ITEM32(reg, ptys, ib_link_width_oper, 0x28, 16, 16);
4555 MLXSW_ITEM32(reg, ptys, ib_proto_oper, 0x28, 0, 16);
4573 MLXSW_ITEM32(reg, ptys, connector_type, 0x2C, 0, 4);
4669 MLXSW_ITEM32(reg, ppad, single_base_mac, 0x00, 28, 1);
4675 MLXSW_ITEM32(reg, ppad, local_port, 0x00, 16, 8);
4708 MLXSW_ITEM32(reg, paos, swid, 0x00, 24, 8);
4714 MLXSW_ITEM32(reg, paos, local_port, 0x00, 16, 8);
4725 MLXSW_ITEM32(reg, paos, admin_status, 0x00, 8, 4);
4735 MLXSW_ITEM32(reg, paos, oper_status, 0x00, 0, 4);
4741 MLXSW_ITEM32(reg, paos, ase, 0x04, 31, 1);
4748 MLXSW_ITEM32(reg, paos, ee, 0x04, 30, 1);
4757 MLXSW_ITEM32(reg, paos, e, 0x04, 0, 2);
4785 MLXSW_ITEM32(reg, pfcc, local_port, 0x00, 16, 8);
4793 MLXSW_ITEM32(reg, pfcc, pnat, 0x00, 14, 2);
4802 MLXSW_ITEM32(reg, pfcc, shl_cap, 0x00, 1, 1);
4811 MLXSW_ITEM32(reg, pfcc, shl_opr, 0x00, 0, 1);
4823 MLXSW_ITEM32(reg, pfcc, ppan, 0x04, 28, 4);
4830 MLXSW_ITEM32(reg, pfcc, prio_mask_tx, 0x04, 16, 8);
4837 MLXSW_ITEM32(reg, pfcc, prio_mask_rx, 0x04, 0, 8);
4845 MLXSW_ITEM32(reg, pfcc, pptx, 0x08, 31, 1);
4853 MLXSW_ITEM32(reg, pfcc, aptx, 0x08, 30, 1);
4865 MLXSW_ITEM32(reg, pfcc, pfctx, 0x08, 16, 8);
4873 MLXSW_ITEM32(reg, pfcc, pprx, 0x0C, 31, 1);
4881 MLXSW_ITEM32(reg, pfcc, aprx, 0x0C, 30, 1);
4890 MLXSW_ITEM32(reg, pfcc, pfcrx, 0x0C, 16, 8);
4927 MLXSW_ITEM32(reg, ppcnt, swid, 0x00, 24, 8);
4935 MLXSW_ITEM32(reg, ppcnt, local_port, 0x00, 16, 8);
4943 MLXSW_ITEM32(reg, ppcnt, pnat, 0x00, 14, 2);
4974 MLXSW_ITEM32(reg, ppcnt, grp, 0x00, 0, 6);
4982 MLXSW_ITEM32(reg, ppcnt, clr, 0x04, 31, 1);
4992 MLXSW_ITEM32(reg, ppcnt, prio_tc, 0x04, 0, 5);
5433 MLXSW_ITEM32(reg, plib, local_port, 0x00, 16, 8);
5439 MLXSW_ITEM32(reg, plib, ib_port, 0x00, 0, 8);
5465 MLXSW_ITEM32(reg, pptb, mm, 0x00, 28, 2);
5471 MLXSW_ITEM32(reg, pptb, local_port, 0x00, 16, 8);
5477 MLXSW_ITEM32(reg, pptb, um, 0x00, 8, 1);
5484 MLXSW_ITEM32(reg, pptb, pm, 0x00, 0, 8);
5498 MLXSW_ITEM32(reg, pptb, pm_msb, 0x08, 24, 8);
5507 MLXSW_ITEM32(reg, pptb, untagged_buff, 0x08, 0, 4);
5548 MLXSW_ITEM32(reg, pbmc, local_port, 0x00, 16, 8);
5555 MLXSW_ITEM32(reg, pbmc, xoff_timer_value, 0x04, 16, 16);
5563 MLXSW_ITEM32(reg, pbmc, xoff_refresh, 0x04, 0, 16);
5658 MLXSW_ITEM32(reg, pspa, swid, 0x00, 24, 8);
5664 MLXSW_ITEM32(reg, pspa, local_port, 0x00, 16, 8);
5671 MLXSW_ITEM32(reg, pspa, sub_port, 0x00, 8, 8);
5696 MLXSW_ITEM32(reg, pmaos, rst, 0x00, 31, 1);
5702 MLXSW_ITEM32(reg, pmaos, slot_index, 0x00, 24, 4);
5708 MLXSW_ITEM32(reg, pmaos, module, 0x00, 16, 8);
5726 MLXSW_ITEM32(reg, pmaos, admin_status, 0x00, 8, 4);
5734 MLXSW_ITEM32(reg, pmaos, ase, 0x04, 31, 1);
5742 MLXSW_ITEM32(reg, pmaos, ee, 0x04, 30, 1);
5754 MLXSW_ITEM32(reg, pmaos, e, 0x04, 0, 2);
5775 MLXSW_ITEM32(reg, pplr, local_port, 0x00, 16, 8);
5786 MLXSW_ITEM32(reg, pplr, lb_en, 0x04, 0, 8);
5813 MLXSW_ITEM32(reg, pmtdb, slot_index, 0x00, 24, 4);
5819 MLXSW_ITEM32(reg, pmtdb, module, 0x00, 16, 8);
5825 MLXSW_ITEM32(reg, pmtdb, ports_width, 0x00, 12, 4);
5831 MLXSW_ITEM32(reg, pmtdb, num_ports, 0x00, 8, 4);
5841 MLXSW_ITEM32(reg, pmtdb, status, 0x00, 0, 4);
5878 MLXSW_ITEM32(reg, pmpe, slot_index, 0x00, 24, 4);
5884 MLXSW_ITEM32(reg, pmpe, module, 0x00, 16, 8);
5897 MLXSW_ITEM32(reg, pmpe, module_status, 0x00, 0, 4);
5903 MLXSW_ITEM32(reg, pmpe, error_type, 0x04, 8, 4);
5918 MLXSW_ITEM32(reg, pddr, local_port, 0x00, 16, 8);
5928 MLXSW_ITEM32(reg, pddr, page_select, 0x04, 0, 8);
5939 MLXSW_ITEM32(reg, pddr, trblsh_group_opcode, 0x08, 0, 16);
5945 MLXSW_ITEM32(reg, pddr, trblsh_status_opcode, 0x0C, 0, 16);
5969 MLXSW_ITEM32(reg, pmmp, module, 0x00, 16, 8);
5975 MLXSW_ITEM32(reg, pmmp, sticky, 0x00, 0, 1);
5985 MLXSW_ITEM32(reg, pmmp, eeprom_override_mask, 0x04, 16, 16);
5996 MLXSW_ITEM32(reg, pmmp, eeprom_override, 0x04, 0, 16);
6017 MLXSW_ITEM32(reg, pllp, local_port, 0x00, 16, 8);
6023 MLXSW_ITEM32(reg, pllp, label_port, 0x00, 0, 8);
6029 MLXSW_ITEM32(reg, pllp, split_num, 0x04, 0, 4);
6035 MLXSW_ITEM32(reg, pllp, slot_index, 0x08, 0, 4);
6064 MLXSW_ITEM32(reg, htgt, swid, 0x00, 24, 8);
6072 MLXSW_ITEM32(reg, htgt, type, 0x00, 8, 4);
6120 MLXSW_ITEM32(reg, htgt, trap_group, 0x00, 0, 8);
6131 MLXSW_ITEM32(reg, htgt, pide, 0x04, 15, 1);
6139 MLXSW_ITEM32(reg, htgt, pid, 0x04, 0, 8);
6152 MLXSW_ITEM32(reg, htgt, mirror_action, 0x08, 8, 2);
6158 MLXSW_ITEM32(reg, htgt, mirroring_agent, 0x08, 0, 3);
6173 MLXSW_ITEM32(reg, htgt, priority, 0x0C, 0, 4);
6181 MLXSW_ITEM32(reg, htgt, local_path_cpu_tclass, 0x10, 16, 6);
6193 MLXSW_ITEM32(reg, htgt, local_path_rdq, 0x10, 0, 6);
6240 MLXSW_ITEM32(reg, hpkt, ack, 0x00, 24, 1);
6268 MLXSW_ITEM32(reg, hpkt, action, 0x00, 20, 3);
6274 MLXSW_ITEM32(reg, hpkt, trap_group, 0x00, 12, 6);
6283 MLXSW_ITEM32(reg, hpkt, trap_id, 0x00, 0, 10);
6299 MLXSW_ITEM32(reg, hpkt, ctrl, 0x04, 16, 2);
6328 MLXSW_ITEM32(reg, rgcr, ipv4_en, 0x00, 31, 1);
6334 MLXSW_ITEM32(reg, rgcr, ipv6_en, 0x00, 30, 1);
6341 MLXSW_ITEM32(reg, rgcr, max_router_interfaces, 0x10, 0, 16);
6351 MLXSW_ITEM32(reg, rgcr, usp, 0x18, 20, 1);
6362 MLXSW_ITEM32(reg, rgcr, pcp_rw, 0x18, 16, 2);
6378 MLXSW_ITEM32(reg, rgcr, activity_dis, 0x20, 0, 8);
6401 MLXSW_ITEM32(reg, ritr, enable, 0x00, 31, 1);
6408 MLXSW_ITEM32(reg, ritr, ipv4, 0x00, 29, 1);
6415 MLXSW_ITEM32(reg, ritr, ipv6, 0x00, 28, 1);
6421 MLXSW_ITEM32(reg, ritr, ipv4_mc, 0x00, 27, 1);
6427 MLXSW_ITEM32(reg, ritr, ipv6_mc, 0x00, 26, 1);
6444 MLXSW_ITEM32(reg, ritr, type, 0x00, 23, 3);
6460 MLXSW_ITEM32(reg, ritr, op, 0x00, 20, 2);
6466 MLXSW_ITEM32(reg, ritr, rif, 0x00, 0, 16);
6475 MLXSW_ITEM32(reg, ritr, ipv4_fe, 0x04, 29, 1);
6484 MLXSW_ITEM32(reg, ritr, ipv6_fe, 0x04, 28, 1);
6492 MLXSW_ITEM32(reg, ritr, ipv4_mc_fe, 0x04, 27, 1);
6500 MLXSW_ITEM32(reg, ritr, ipv6_mc_fe, 0x04, 26, 1);
6509 MLXSW_ITEM32(reg, ritr, lb_en, 0x04, 24, 1);
6515 MLXSW_ITEM32(reg, ritr, virtual_router, 0x04, 0, 16);
6521 MLXSW_ITEM32(reg, ritr, mtu, 0x34, 0, 16);
6527 MLXSW_ITEM32(reg, ritr, if_swid, 0x08, 24, 8);
6533 MLXSW_ITEM32(reg, ritr, if_mac_profile_id, 0x10, 16, 4);
6547 MLXSW_ITEM32(reg, ritr, if_vrrp_id_ipv6, 0x1C, 8, 8);
6554 MLXSW_ITEM32(reg, ritr, if_vrrp_id_ipv4, 0x1C, 0, 8);
6562 MLXSW_ITEM32(reg, ritr, vlan_if_vid, 0x08, 0, 12);
6571 MLXSW_ITEM32(reg, ritr, fid_if_fid, 0x08, 0, 16);
6590 MLXSW_ITEM32(reg, ritr, sp_if_lag, 0x08, 24, 1);
6597 MLXSW_ITEM32(reg, ritr, sp_if_system_port, 0x08, 0, 16);
6603 MLXSW_ITEM32(reg, ritr, sp_if_vid, 0x18, 0, 12);
6619 MLXSW_ITEM32(reg, ritr, loopback_protocol, 0x08, 28, 4);
6634 MLXSW_ITEM32(reg, ritr, loopback_ipip_type, 0x10, 24, 4);
6644 MLXSW_ITEM32(reg, ritr, loopback_ipip_options, 0x10, 20, 4);
6652 MLXSW_ITEM32(reg, ritr, loopback_ipip_uvr, 0x10, 0, 16);
6659 MLXSW_ITEM32(reg, ritr, loopback_ipip_underlay_rif, 0x14, 0, 16);
6666 MLXSW_ITEM32(reg, ritr, loopback_ipip_usip4, 0x24, 0, 32);
6673 MLXSW_ITEM32(reg, ritr, loopback_ipip_gre_key, 0x28, 0, 32);
6692 MLXSW_ITEM32(reg, ritr, ingress_counter_index, 0x38, 0, 24);
6698 MLXSW_ITEM32(reg, ritr, ingress_counter_set_type, 0x38, 24, 8);
6704 MLXSW_ITEM32(reg, ritr, egress_counter_index, 0x3C, 0, 24);
6710 MLXSW_ITEM32(reg, ritr, egress_counter_set_type, 0x3C, 24, 8);
6833 MLXSW_ITEM32(reg, rtar, op, 0x00, 28, 4);
6844 MLXSW_ITEM32(reg, rtar, key_type, 0x00, 0, 8);
6853 MLXSW_ITEM32(reg, rtar, region_size, 0x04, 0, 16);
6898 MLXSW_ITEM32(reg, ratr, op, 0x00, 28, 4);
6912 MLXSW_ITEM32(reg, ratr, v, 0x00, 24, 1);
6919 MLXSW_ITEM32(reg, ratr, a, 0x00, 16, 1);
6951 MLXSW_ITEM32(reg, ratr, type, 0x04, 28, 4);
6960 MLXSW_ITEM32(reg, ratr, adjacency_index_low, 0x04, 0, 16);
6966 MLXSW_ITEM32(reg, ratr, egress_router_interface, 0x08, 0, 16);
6980 MLXSW_ITEM32(reg, ratr, trap_action, 0x0C, 28, 4);
6986 MLXSW_ITEM32(reg, ratr, adjacency_index_high, 0x0C, 16, 8);
6999 MLXSW_ITEM32(reg, ratr, trap_id, 0x0C, 0, 8);
7019 MLXSW_ITEM32(reg, ratr, ipip_type, 0x10, 16, 4);
7026 MLXSW_ITEM32(reg, ratr, ipip_ipv4_udip, 0x18, 0, 32);
7033 MLXSW_ITEM32(reg, ratr, ipip_ipv6_ptr, 0x1C, 0, 24);
7048 MLXSW_ITEM32(reg, ratr, counter_set_type, 0x28, 24, 8);
7054 MLXSW_ITEM32(reg, ratr, counter_index, 0x28, 0, 24);
7152 MLXSW_ITEM32(reg, ricnt, counter_index, 0x04, 0, 24);
7170 MLXSW_ITEM32(reg, ricnt, counter_set_type, 0x04, 24, 8);
7185 MLXSW_ITEM32(reg, ricnt, op, 0x00, 28, 4);
7281 MLXSW_ITEM32(reg, rrcr, op, 0x00, 28, 4);
7287 MLXSW_ITEM32(reg, rrcr, offset, 0x00, 0, 16);
7293 MLXSW_ITEM32(reg, rrcr, size, 0x04, 0, 16);
7300 MLXSW_ITEM32(reg, rrcr, table_id, 0x10, 0, 4);
7306 MLXSW_ITEM32(reg, rrcr, dest_offset, 0x20, 0, 16);
7336 MLXSW_ITEM32(reg, ralta, op, 0x00, 28, 2);
7348 MLXSW_ITEM32(reg, ralta, protocol, 0x00, 24, 4);
7356 MLXSW_ITEM32(reg, ralta, tree_id, 0x00, 0, 8);
7388 MLXSW_ITEM32(reg, ralst, root_bin, 0x00, 16, 8);
7394 MLXSW_ITEM32(reg, ralst, tree_id, 0x00, 0, 8);
7454 MLXSW_ITEM32(reg, raltb, virtual_router, 0x00, 16, 16);
7460 MLXSW_ITEM32(reg, raltb, protocol, 0x00, 12, 4);
7468 MLXSW_ITEM32(reg, raltb, tree_id, 0x00, 0, 8);
7494 MLXSW_ITEM32(reg, ralue, protocol, 0x00, 24, 4);
7527 MLXSW_ITEM32(reg, ralue, op, 0x00, 20, 3);
7536 MLXSW_ITEM32(reg, ralue, a, 0x00, 16, 1);
7543 MLXSW_ITEM32(reg, ralue, virtual_router, 0x04, 16, 16);
7556 MLXSW_ITEM32(reg, ralue, op_u_mask, 0x04, 8, 3);
7564 MLXSW_ITEM32(reg, ralue, prefix_len, 0x08, 0, 8);
7574 MLXSW_ITEM32(reg, ralue, dip4, 0x18, 0, 32);
7588 MLXSW_ITEM32(reg, ralue, entry_type, 0x1C, 30, 2);
7598 MLXSW_ITEM32(reg, ralue, bmp_len, 0x1C, 16, 8);
7615 MLXSW_ITEM32(reg, ralue, action_type, 0x1C, 0, 2);
7630 MLXSW_ITEM32(reg, ralue, trap_action, 0x20, 28, 4);
7638 MLXSW_ITEM32(reg, ralue, trap_id, 0x20, 0, 9);
7645 MLXSW_ITEM32(reg, ralue, adjacency_index, 0x24, 0, 24);
7655 MLXSW_ITEM32(reg, ralue, ecmp_size, 0x28, 0, 13);
7662 MLXSW_ITEM32(reg, ralue, local_erif, 0x24, 0, 16);
7674 MLXSW_ITEM32(reg, ralue, ip2me_v, 0x24, 31, 1);
7682 MLXSW_ITEM32(reg, ralue, ip2me_tunnel_ptr, 0x24, 0, 24);
7780 MLXSW_ITEM32(reg, rauht, type, 0x00, 24, 2);
7811 MLXSW_ITEM32(reg, rauht, op, 0x00, 20, 3);
7820 MLXSW_ITEM32(reg, rauht, a, 0x00, 16, 1);
7826 MLXSW_ITEM32(reg, rauht, rif, 0x00, 0, 16);
7832 MLXSW_ITEM32(reg, rauht, dip4, 0x1C, 0x0, 32);
7846 MLXSW_ITEM32(reg, rauht, trap_action, 0x60, 28, 4);
7860 MLXSW_ITEM32(reg, rauht, trap_id, 0x60, 0, 9);
7866 MLXSW_ITEM32(reg, rauht, counter_set_type, 0x68, 24, 8);
7872 MLXSW_ITEM32(reg, rauht, counter_index, 0x68, 0, 24);
7930 MLXSW_ITEM32(reg, raleu, protocol, 0x00, 24, 4);
7937 MLXSW_ITEM32(reg, raleu, virtual_router, 0x00, 0, 16);
7943 MLXSW_ITEM32(reg, raleu, adjacency_index, 0x10, 0, 24);
7949 MLXSW_ITEM32(reg, raleu, ecmp_size, 0x14, 0, 13);
7955 MLXSW_ITEM32(reg, raleu, new_adjacency_index, 0x20, 0, 24);
7961 MLXSW_ITEM32(reg, raleu, new_ecmp_size, 0x24, 0, 13);
8008 MLXSW_ITEM32(reg, rauhtd, filter_fields, 0x00, 0, 8);
8018 MLXSW_ITEM32(reg, rauhtd, op, 0x04, 24, 2);
8028 MLXSW_ITEM32(reg, rauhtd, num_rec, 0x04, 0, 8);
8035 MLXSW_ITEM32(reg, rauhtd, entry_a, 0x08, 16, 1);
8048 MLXSW_ITEM32(reg, rauhtd, type, 0x08, 0, 4);
8055 MLXSW_ITEM32(reg, rauhtd, entry_rif, 0x0C, 0, 16);
8172 MLXSW_ITEM32(reg, rtdp, type, 0x00, 28, 4);
8179 MLXSW_ITEM32(reg, rtdp, tunnel_index, 0x00, 0, 24);
8186 MLXSW_ITEM32(reg, rtdp, egress_router_interface, 0x40, 0, 16);
8194 MLXSW_ITEM32(reg, rtdp, ipip_irif, 0x04, 16, 16);
8214 MLXSW_ITEM32(reg, rtdp, ipip_sip_check, 0x04, 0, 3);
8228 MLXSW_ITEM32(reg, rtdp, ipip_type_check, 0x08, 24, 3);
8239 MLXSW_ITEM32(reg, rtdp, ipip_gre_key_check, 0x08, 23, 1);
8246 MLXSW_ITEM32(reg, rtdp, ipip_ipv4_usip, 0x0C, 0, 32);
8255 MLXSW_ITEM32(reg, rtdp, ipip_ipv6_usip_ptr, 0x10, 0, 24);
8262 MLXSW_ITEM32(reg, rtdp, ipip_expected_gre_key, 0x14, 0, 32);
8323 MLXSW_ITEM32(reg, rips, index, 0x00, 0, 24);
8359 MLXSW_ITEM32(reg, ratrad, op, 0x00, 30, 2);
8368 MLXSW_ITEM32(reg, ratrad, ecmp_size, 0x00, 0, 13);
8374 MLXSW_ITEM32(reg, ratrad, adjacency_index, 0x04, 0, 24);
8409 MLXSW_ITEM32(reg, rigr2, rigr_index, 0x04, 0, 24);
8415 MLXSW_ITEM32(reg, rigr2, vnext, 0x08, 31, 1);
8422 MLXSW_ITEM32(reg, rigr2, next_rigr_index, 0x08, 0, 24);
8428 MLXSW_ITEM32(reg, rigr2, vrmid, 0x20, 31, 1);
8437 MLXSW_ITEM32(reg, rigr2, rmid_index, 0x20, 0, 16);
8487 MLXSW_ITEM32(reg, recr2, pp, 0x00, 24, 1);
8493 MLXSW_ITEM32(reg, recr2, sh, 0x00, 8, 1);
8499 MLXSW_ITEM32(reg, recr2, seed, 0x08, 0, 32);
8623 MLXSW_ITEM32(reg, rmft2, v, 0x00, 31, 1);
8633 MLXSW_ITEM32(reg, rmft2, type, 0x00, 28, 2);
8650 MLXSW_ITEM32(reg, rmft2, op, 0x00, 20, 2);
8657 MLXSW_ITEM32(reg, rmft2, a, 0x00, 16, 1);
8663 MLXSW_ITEM32(reg, rmft2, offset, 0x00, 0, 16);
8669 MLXSW_ITEM32(reg, rmft2, virtual_router, 0x04, 0, 16);
8680 MLXSW_ITEM32(reg, rmft2, irif_mask, 0x08, 24, 1);
8686 MLXSW_ITEM32(reg, rmft2, irif, 0x08, 0, 16);
8693 MLXSW_ITEM32(reg, rmft2, dip4, 0x1C, 0, 32);
8701 MLXSW_ITEM32(reg, rmft2, dip4_mask, 0x2C, 0, 32);
8708 MLXSW_ITEM32(reg, rmft2, sip4, 0x3C, 0, 32);
8716 MLXSW_ITEM32(reg, rmft2, sip4_mask, 0x4C, 0, 32);
8797 MLXSW_ITEM32(reg, rxlte, virtual_router, 0x00, 0, 16);
8807 MLXSW_ITEM32(reg, rxlte, protocol, 0x04, 0, 4);
8812 MLXSW_ITEM32(reg, rxlte, lpm_xlt_en, 0x08, 0, 1);
8839 MLXSW_ITEM32(reg, rxltm, m0_val_v6, 0x10, 16, 8);
8846 MLXSW_ITEM32(reg, rxltm, m0_val_v4, 0x10, 0, 6);
8877 MLXSW_ITEM32(reg, rlcmld, select, 0x00, 16, 2);
8889 MLXSW_ITEM32(reg, rlcmld, filter_fields, 0x00, 0, 8);
8899 MLXSW_ITEM32(reg, rlcmld, protocol, 0x08, 0, 4);
8906 MLXSW_ITEM32(reg, rlcmld, virtual_router, 0x0C, 0, 16);
8913 MLXSW_ITEM32(reg, rlcmld, dip4, 0x1C, 0, 32);
8922 MLXSW_ITEM32(reg, rlcmld, dip_mask4, 0x2C, 0, 32);
8981 MLXSW_ITEM32(reg, rlpmce, flush, 0x00, 4, 1);
8989 MLXSW_ITEM32(reg, rlpmce, disable, 0x00, 0, 1);
9023 MLXSW_ITEM32(reg, xltq, xm_device_id, 0x04, 0, 16);
9028 MLXSW_ITEM32(reg, xltq, xlt_cap_ipv4_lpm, 0x10, 0, 1);
9033 MLXSW_ITEM32(reg, xltq, xlt_cap_ipv6_lpm, 0x10, 1, 1);
9040 MLXSW_ITEM32(reg, xltq, cap_xlt_entries, 0x20, 0, 32);
9046 MLXSW_ITEM32(reg, xltq, cap_xlt_mtable, 0x24, 0, 32);
9084 MLXSW_ITEM32(reg, xmdr, bulk_entry, 0x04, 8, 1);
9093 MLXSW_ITEM32(reg, xmdr, num_rec, 0x04, 0, 4);
9123 MLXSW_ITEM32(reg, xmdr_c, cmd_id, 0x00, 24, 8);
9127 MLXSW_ITEM32(reg, xmdr_c, seq_number, 0x00, 12, 12);
9140 MLXSW_ITEM32(reg, xmdr_c, ltr_op, 0x04, 24, 8);
9146 MLXSW_ITEM32(reg, xmdr_c, ltr_trap_action, 0x04, 20, 4);
9158 MLXSW_ITEM32(reg, xmdr_c, ltr_trap_id_num, 0x04, 16, 4);
9164 MLXSW_ITEM32(reg, xmdr_c, ltr_virtual_router, 0x04, 0, 16);
9169 MLXSW_ITEM32(reg, xmdr_c, ltr_prefix_len, 0x08, 24, 8);
9176 MLXSW_ITEM32(reg, xmdr_c, ltr_bmp_len, 0x08, 16, 8);
9182 MLXSW_ITEM32(reg, xmdr_c, ltr_entry_type, 0x08, 4, 4);
9193 MLXSW_ITEM32(reg, xmdr_c, ltr_action_type, 0x08, 0, 4);
9199 MLXSW_ITEM32(reg, xmdr_c, ltr_erif, 0x10, 0, 16);
9205 MLXSW_ITEM32(reg, xmdr_c, ltr_adjacency_index, 0x10, 0, 24);
9212 MLXSW_ITEM32(reg, xmdr_c, ltr_pointer_to_tunnel, 0x10, 0, 24);
9220 MLXSW_ITEM32(reg, xmdr_c, ltr_ecmp_size, 0x14, 0, 32);
9228 MLXSW_ITEM32(reg, xmdr_c, ltr_dip4, 0x1C, 0, 32);
9344 MLXSW_ITEM32(reg, xrmt, index, 0x04, 0, 20);
9349 MLXSW_ITEM32(reg, xrmt, l0_val, 0x10, 24, 8);
9457 MLXSW_ITEM32(reg, mfcr, pwm_frequency, 0x00, 0, 7);
9465 MLXSW_ITEM32(reg, mfcr, tacho_active, 0x04, 16, MLXSW_MFCR_TACHOS_MAX);
9473 MLXSW_ITEM32(reg, mfcr, pwm_active, 0x04, 0, MLXSW_MFCR_PWMS_MAX);
9506 MLXSW_ITEM32(reg, mfsc, pwm, 0x00, 24, 3);
9513 MLXSW_ITEM32(reg, mfsc, pwm_duty_cycle, 0x04, 0, 8);
9537 MLXSW_ITEM32(reg, mfsm, tacho, 0x00, 24, 4);
9543 MLXSW_ITEM32(reg, mfsm, rpm, 0x04, 0, 16);
9566 MLXSW_ITEM32(reg, mfsl, tacho, 0x00, 24, 4);
9572 MLXSW_ITEM32(reg, mfsl, tach_min, 0x04, 0, 16);
9578 MLXSW_ITEM32(reg, mfsl, tach_max, 0x08, 0, 16);
9615 MLXSW_ITEM32(reg, fore, fan_under_limit, 0x00, 16, 10);
9643 MLXSW_ITEM32(reg, mtcap, sensor_count, 0x00, 0, 7);
9664 MLXSW_ITEM32(reg, mtmp, sensor_index, 0x00, 0, 12);
9678 MLXSW_ITEM32(reg, mtmp, max_operational_temperature, 0x04, 16, 16);
9685 MLXSW_ITEM32(reg, mtmp, temperature, 0x04, 0, 16);
9691 MLXSW_ITEM32(reg, mtmp, mte, 0x08, 31, 1);
9697 MLXSW_ITEM32(reg, mtmp, mtr, 0x08, 30, 1);
9704 MLXSW_ITEM32(reg, mtmp, max_temperature, 0x08, 0, 16);
9720 MLXSW_ITEM32(reg, mtmp, tee, 0x0C, 30, 2);
9728 MLXSW_ITEM32(reg, mtmp, temperature_threshold_hi, 0x0C, 0, 16);
9735 MLXSW_ITEM32(reg, mtmp, temperature_threshold_lo, 0x10, 0, 16);
9820 MLXSW_ITEM32(reg, mtbr, base_sensor_index, 0x00, 0, 12);
9829 MLXSW_ITEM32(reg, mtbr, num_rec, 0x04, 0, 8);
9891 MLXSW_ITEM32(reg, mcia, l, 0x00, 31, 1);
9897 MLXSW_ITEM32(reg, mcia, module, 0x00, 16, 8);
9917 MLXSW_ITEM32(reg, mcia, status, 0x00, 0, 8);
9923 MLXSW_ITEM32(reg, mcia, i2c_device_address, 0x04, 24, 8);
9929 MLXSW_ITEM32(reg, mcia, page_number, 0x04, 16, 8);
9935 MLXSW_ITEM32(reg, mcia, device_address, 0x04, 0, 16);
9941 MLXSW_ITEM32(reg, mcia, bank_number, 0x08, 16, 8);
9947 MLXSW_ITEM32(reg, mcia, size, 0x08, 0, 16);
10024 MLXSW_ITEM32(reg, mpat, pa_id, 0x00, 28, 4);
10031 MLXSW_ITEM32(reg, mpat, session_id, 0x00, 24, 4);
10037 MLXSW_ITEM32(reg, mpat, system_port, 0x00, 0, 16);
10043 MLXSW_ITEM32(reg, mpat, e, 0x04, 31, 1);
10054 MLXSW_ITEM32(reg, mpat, qos, 0x04, 26, 1);
10064 MLXSW_ITEM32(reg, mpat, be, 0x04, 25, 1);
10088 MLXSW_ITEM32(reg, mpat, span_type, 0x04, 0, 4);
10094 MLXSW_ITEM32(reg, mpat, pide, 0x0C, 15, 1);
10100 MLXSW_ITEM32(reg, mpat, pid, 0x0C, 0, 14);
10110 MLXSW_ITEM32(reg, mpat, eth_rspan_vid, 0x18, 0, 12);
10124 MLXSW_ITEM32(reg, mpat, eth_rspan_version, 0x10, 18, 4);
10136 MLXSW_ITEM32(reg, mpat, eth_rspan_tp, 0x18, 16, 1);
10151 MLXSW_ITEM32(reg, mpat, eth_rspan_protocol, 0x18, 24, 4);
10157 MLXSW_ITEM32(reg, mpat, eth_rspan_ttl, 0x1C, 4, 8);
10169 MLXSW_ITEM32(reg, mpat, eth_rspan_dip4, 0x4C, 0, 32);
10176 MLXSW_ITEM32(reg, mpat, eth_rspan_sip4, 0x5C, 0, 32);
10248 MLXSW_ITEM32(reg, mpar, local_port, 0x00, 16, 8);
10259 MLXSW_ITEM32(reg, mpar, i_e, 0x00, 0, 4);
10266 MLXSW_ITEM32(reg, mpar, enable, 0x04, 31, 1);
10272 MLXSW_ITEM32(reg, mpar, pa_id, 0x04, 0, 4);
10283 MLXSW_ITEM32(reg, mpar, probability_rate, 0x08, 0, 32);
10311 MLXSW_ITEM32(reg, mgir, hw_info_device_hw_revision, 0x0, 16, 16);
10324 MLXSW_ITEM32(reg, mgir, fw_info_extended_major, 0x44, 0, 32);
10329 MLXSW_ITEM32(reg, mgir, fw_info_extended_minor, 0x48, 0, 32);
10334 MLXSW_ITEM32(reg, mgir, fw_info_extended_sub_minor, 0x4C, 0, 32);
10368 MLXSW_ITEM32(reg, mrsr, command, 0x00, 0, 4);
10389 MLXSW_ITEM32(reg, mlcr, local_port, 0x00, 16, 8);
10399 MLXSW_ITEM32(reg, mlcr, beacon_duration, 0x04, 0, 16);
10406 MLXSW_ITEM32(reg, mlcr, beacon_remain, 0x08, 0, 16);
10431 MLXSW_ITEM32(reg, mcion, module, 0x00, 16, 8);
10442 MLXSW_ITEM32(reg, mcion, module_status_bits, 0x04, 0, 16);
10465 MLXSW_ITEM32(reg, mtpps, enable, 0x20, 31, 1);
10476 MLXSW_ITEM32(reg, mtpps, pin_mode, 0x20, 8, 4);
10484 MLXSW_ITEM32(reg, mtpps, pin, 0x20, 0, 8);
10525 MLXSW_ITEM32(reg, mtutc, operation, 0x00, 0, 4);
10533 MLXSW_ITEM32(reg, mtutc, freq_adjustment, 0x04, 0, 32);
10539 MLXSW_ITEM32(reg, mtutc, utc_sec, 0x10, 0, 32);
10566 MLXSW_ITEM32(reg, mcqi, component_index, 0x00, 0, 16);
10576 MLXSW_ITEM32(reg, mcqi, info_type, 0x08, 0, 5);
10583 MLXSW_ITEM32(reg, mcqi, offset, 0x10, 0, 32);
10590 MLXSW_ITEM32(reg, mcqi, data_size, 0x14, 0, 16);
10596 MLXSW_ITEM32(reg, mcqi, cap_max_component_size, 0x20, 0, 32);
10603 MLXSW_ITEM32(reg, mcqi, cap_log_mcda_word_size, 0x24, 28, 4);
10609 MLXSW_ITEM32(reg, mcqi, cap_mcda_max_write_size, 0x24, 0, 16);
10657 MLXSW_ITEM32(reg, mcc, instruction, 0x00, 0, 8);
10664 MLXSW_ITEM32(reg, mcc, component_index, 0x04, 0, 16);
10670 MLXSW_ITEM32(reg, mcc, update_handle, 0x08, 0, 24);
10677 MLXSW_ITEM32(reg, mcc, error_code, 0x0C, 8, 8);
10683 MLXSW_ITEM32(reg, mcc, control_state, 0x0C, 0, 4);
10691 MLXSW_ITEM32(reg, mcc, component_size, 0x10, 0, 32);
10732 MLXSW_ITEM32(reg, mcda, update_handle, 0x00, 0, 24);
10739 MLXSW_ITEM32(reg, mcda, offset, 0x04, 0, 32);
10745 MLXSW_ITEM32(reg, mcda, size, 0x08, 0, 16);
10781 MLXSW_ITEM32(reg, mpsc, local_port, 0x00, 16, 8);
10787 MLXSW_ITEM32(reg, mpsc, e, 0x04, 30, 1);
10796 MLXSW_ITEM32(reg, mpsc, rate, 0x08, 0, 32);
10819 MLXSW_ITEM32(reg, mgpc, counter_set_type, 0x00, 24, 8);
10825 MLXSW_ITEM32(reg, mgpc, counter_index, 0x00, 0, 24);
10838 MLXSW_ITEM32(reg, mgpc, opcode, 0x04, 28, 4);
10878 MLXSW_ITEM32(reg, mprs, parsing_depth, 0x00, 0, 16);
10886 MLXSW_ITEM32(reg, mprs, parsing_en, 0x04, 0, 16);
10894 MLXSW_ITEM32(reg, mprs, vxlan_udp_dport, 0x10, 0, 16);
10920 MLXSW_ITEM32(reg, mogcr, ptp_iftc, 0x00, 1, 1);
10929 MLXSW_ITEM32(reg, mogcr, ptp_eftc, 0x00, 0, 1);
10937 MLXSW_ITEM32(reg, mogcr, mirroring_pid_base, 0x0C, 0, 14);
10964 MLXSW_ITEM32(reg, mpagr, trigger, 0x00, 0, 4);
10970 MLXSW_ITEM32(reg, mpagr, pa_id, 0x04, 0, 4);
10980 MLXSW_ITEM32(reg, mpagr, probability_rate, 0x08, 0, 32);
11006 MLXSW_ITEM32(reg, momte, local_port, 0x00, 16, 8);
11023 MLXSW_ITEM32(reg, momte, type, 0x04, 0, 8);
11060 MLXSW_ITEM32(reg, mtpppc, ing_timestamp_message_type, 0x08, 0, 16);
11069 MLXSW_ITEM32(reg, mtpppc, egr_timestamp_message_type, 0x0C, 0, 16);
11101 MLXSW_ITEM32(reg, mtpptr, local_port, 0x00, 16, 8);
11112 MLXSW_ITEM32(reg, mtpptr, dir, 0x00, 0, 1);
11118 MLXSW_ITEM32(reg, mtpptr, clr, 0x04, 31, 1);
11125 MLXSW_ITEM32(reg, mtpptr, num_rec, 0x08, 0, 4);
11206 MLXSW_ITEM32(reg, mtptpt, trap_id, 0x00, 0, 4);
11214 MLXSW_ITEM32(reg, mtptpt, message_type, 0x04, 0, 16);
11238 MLXSW_ITEM32(reg, mfgd, fatal_event_mode, 0x00, 9, 2);
11243 MLXSW_ITEM32(reg, mfgd, trigger_test, 0x00, 11, 1);
11263 MLXSW_ITEM32(reg, mgpir, device_type, 0x00, 24, 4);
11269 MLXSW_ITEM32(reg, mgpir, devices_per_flash, 0x00, 16, 8);
11275 MLXSW_ITEM32(reg, mgpir, num_of_devices, 0x00, 0, 8);
11281 MLXSW_ITEM32(reg, mgpir, num_of_modules, 0x04, 0, 8);
11316 MLXSW_ITEM32(reg, mfde, irisc_id, 0x00, 24, 8);
11327 MLXSW_ITEM32(reg, mfde, event_id, 0x00, 0, 16);
11337 MLXSW_ITEM32(reg, mfde, method, 0x04, 29, 1);
11343 MLXSW_ITEM32(reg, mfde, long_process, 0x04, 28, 1);
11354 MLXSW_ITEM32(reg, mfde, command_type, 0x04, 24, 2);
11360 MLXSW_ITEM32(reg, mfde, reg_attr_id, 0x04, 0, 16);
11367 MLXSW_ITEM32(reg, mfde, log_address, 0x10, 0, 32);
11374 MLXSW_ITEM32(reg, mfde, log_id, 0x14, 0, 4);
11387 MLXSW_ITEM32(reg, mfde, pipes_mask, 0x10, 0, 16);
11411 MLXSW_ITEM32(reg, tngcr, type, 0x00, 0, 4);
11417 MLXSW_ITEM32(reg, tngcr, nve_valid, 0x04, 31, 1);
11423 MLXSW_ITEM32(reg, tngcr, nve_ttl_uc, 0x04, 0, 8);
11429 MLXSW_ITEM32(reg, tngcr, nve_ttl_mc, 0x08, 0, 8);
11445 MLXSW_ITEM32(reg, tngcr, nve_flc, 0x0C, 25, 1);
11462 MLXSW_ITEM32(reg, tngcr, nve_flh, 0x0C, 24, 1);
11468 MLXSW_ITEM32(reg, tngcr, nve_fl_prefix, 0x0C, 8, 12);
11475 MLXSW_ITEM32(reg, tngcr, nve_fl_suffix, 0x0C, 0, 8);
11492 MLXSW_ITEM32(reg, tngcr, nve_udp_sport_type, 0x10, 24, 1);
11499 MLXSW_ITEM32(reg, tngcr, nve_udp_sport_prefix, 0x10, 8, 8);
11509 MLXSW_ITEM32(reg, tngcr, nve_group_size_mc, 0x18, 0, 8);
11519 MLXSW_ITEM32(reg, tngcr, nve_group_size_flood, 0x1C, 0, 8);
11526 MLXSW_ITEM32(reg, tngcr, learn_enable, 0x20, 31, 1);
11533 MLXSW_ITEM32(reg, tngcr, underlay_virtual_router, 0x20, 0, 16);
11540 MLXSW_ITEM32(reg, tngcr, underlay_rif, 0x24, 0, 16);
11546 MLXSW_ITEM32(reg, tngcr, usipv4, 0x28, 0, 32);
11593 MLXSW_ITEM32(reg, tnumt, record_type, 0x00, 28, 4);
11599 MLXSW_ITEM32(reg, tnumt, tunnel_port, 0x00, 24, 4);
11606 MLXSW_ITEM32(reg, tnumt, underlay_mc_ptr, 0x00, 0, 24);
11612 MLXSW_ITEM32(reg, tnumt, vnext, 0x04, 31, 1);
11618 MLXSW_ITEM32(reg, tnumt, next_underlay_mc_ptr, 0x04, 0, 24);
11625 MLXSW_ITEM32(reg, tnumt, record_size, 0x08, 0, 3);
11673 MLXSW_ITEM32(reg, tnqcr, enc_set_dscp, 0x04, 28, 1);
11695 MLXSW_ITEM32(reg, tnqdr, local_port, 0x00, 16, 8);
11701 MLXSW_ITEM32(reg, tnqdr, dscp, 0x04, 0, 6);
11724 MLXSW_ITEM32(reg, tneem, overlay_ecn, 0x04, 24, 2);
11730 MLXSW_ITEM32(reg, tneem, underlay_ecn, 0x04, 16, 2);
11754 MLXSW_ITEM32(reg, tndem, underlay_ecn, 0x04, 24, 2);
11760 MLXSW_ITEM32(reg, tndem, overlay_ecn, 0x04, 16, 2);
11767 MLXSW_ITEM32(reg, tndem, eip_ecn, 0x04, 8, 2);
11775 MLXSW_ITEM32(reg, tndem, trap_en, 0x08, 28, 4);
11782 MLXSW_ITEM32(reg, tndem, trap_id, 0x08, 0, 9);
11810 MLXSW_ITEM32(reg, tnpc, tunnel_port, 0x00, 0, 4);
11816 MLXSW_ITEM32(reg, tnpc, learn_enable_v6, 0x04, 1, 1);
11822 MLXSW_ITEM32(reg, tnpc, learn_enable_v4, 0x04, 0, 1);
11848 MLXSW_ITEM32(reg, tigcr, ttlc, 0x04, 8, 1);
11855 MLXSW_ITEM32(reg, tigcr, ttl_uc, 0x04, 0, 8);
11878 MLXSW_ITEM32(reg, tieem, overlay_ecn, 0x04, 24, 2);
11884 MLXSW_ITEM32(reg, tieem, underlay_ecn, 0x04, 16, 2);
11908 MLXSW_ITEM32(reg, tidem, underlay_ecn, 0x04, 24, 2);
11914 MLXSW_ITEM32(reg, tidem, overlay_ecn, 0x04, 16, 2);
11921 MLXSW_ITEM32(reg, tidem, eip_ecn, 0x04, 8, 2);
11929 MLXSW_ITEM32(reg, tidem, trap_en, 0x08, 28, 4);
11936 MLXSW_ITEM32(reg, tidem, trap_id, 0x08, 0, 9);
11969 MLXSW_ITEM32(reg, sbpr, dir, 0x00, 24, 2);
11975 MLXSW_ITEM32(reg, sbpr, pool, 0x00, 0, 4);
11981 MLXSW_ITEM32(reg, sbpr, infi_size, 0x04, 31, 1);
11988 MLXSW_ITEM32(reg, sbpr, size, 0x04, 0, 24);
11999 MLXSW_ITEM32(reg, sbpr, mode, 0x08, 0, 4);
12031 MLXSW_ITEM32(reg, sbcm, local_port, 0x00, 16, 8);
12041 MLXSW_ITEM32(reg, sbcm, pg_buff, 0x00, 8, 6);
12047 MLXSW_ITEM32(reg, sbcm, dir, 0x00, 0, 2);
12053 MLXSW_ITEM32(reg, sbcm, min_buff, 0x18, 0, 24);
12063 MLXSW_ITEM32(reg, sbcm, infi_max, 0x1C, 31, 1);
12077 MLXSW_ITEM32(reg, sbcm, max_buff, 0x1C, 0, 24);
12083 MLXSW_ITEM32(reg, sbcm, pool, 0x24, 0, 4);
12117 MLXSW_ITEM32(reg, sbpm, local_port, 0x00, 16, 8);
12123 MLXSW_ITEM32(reg, sbpm, pool, 0x00, 8, 4);
12129 MLXSW_ITEM32(reg, sbpm, dir, 0x00, 0, 2);
12135 MLXSW_ITEM32(reg, sbpm, buff_occupancy, 0x10, 0, 24);
12143 MLXSW_ITEM32(reg, sbpm, clr, 0x14, 31, 1);
12150 MLXSW_ITEM32(reg, sbpm, max_buff_occupancy, 0x14, 0, 24);
12156 MLXSW_ITEM32(reg, sbpm, min_buff, 0x18, 0, 24);
12169 MLXSW_ITEM32(reg, sbpm, max_buff, 0x1C, 0, 24);
12206 MLXSW_ITEM32(reg, sbmm, prio, 0x00, 8, 4);
12212 MLXSW_ITEM32(reg, sbmm, min_buff, 0x18, 0, 24);
12225 MLXSW_ITEM32(reg, sbmm, max_buff, 0x1C, 0, 24);
12231 MLXSW_ITEM32(reg, sbmm, pool, 0x24, 0, 4);
12267 MLXSW_ITEM32(reg, sbsr, clr, 0x00, 31, 1);
12356 MLXSW_ITEM32(reg, sbib, local_port, 0x00, 16, 8);
12364 MLXSW_ITEM32(reg, sbib, buff_size, 0x08, 0, 24);
12553 MLXSW_ITEM32(reg, pude, swid, 0x00, 24, 8);
12559 MLXSW_ITEM32(reg, pude, local_port, 0x00, 16, 8);
12570 MLXSW_ITEM32(reg, pude, admin_status, 0x00, 8, 4);
12580 MLXSW_ITEM32(reg, pude, oper_status, 0x00, 0, 4);