Lines Matching refs:writeq
1137 writeq(val64, &bar0->tti_data1_mem); in init_tti()
1162 writeq(val64, &bar0->tti_data2_mem); in init_tti()
1167 writeq(val64, &bar0->tti_command_mem); in init_tti()
1212 writeq(val64, &bar0->sw_reset); in init_nic()
1219 writeq(val64, &bar0->sw_reset); in init_nic()
1241 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in init_nic()
1243 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in init_nic()
1253 writeq(vBIT(val64, 2, 14), &bar0->rmac_max_pyld_len); in init_nic()
1274 writeq(val64, &bar0->tx_fifo_partition_0); in init_nic()
1275 writeq(val64, &bar0->tx_fifo_partition_1); in init_nic()
1276 writeq(val64, &bar0->tx_fifo_partition_2); in init_nic()
1277 writeq(val64, &bar0->tx_fifo_partition_3); in init_nic()
1292 writeq(val64, &bar0->tx_fifo_partition_0); in init_nic()
1297 writeq(val64, &bar0->tx_fifo_partition_1); in init_nic()
1302 writeq(val64, &bar0->tx_fifo_partition_2); in init_nic()
1307 writeq(val64, &bar0->tx_fifo_partition_3); in init_nic()
1322 writeq(PCC_ENABLE_FOUR, &bar0->pcc_enable); in init_nic()
1337 writeq(val64, &bar0->tx_pa_cfg); in init_nic()
1346 writeq(val64, &bar0->rx_queue_priority); in init_nic()
1395 writeq(val64, &bar0->rx_queue_cfg); in init_nic()
1404 writeq(val64, &bar0->tx_w_round_robin_0); in init_nic()
1405 writeq(val64, &bar0->tx_w_round_robin_1); in init_nic()
1406 writeq(val64, &bar0->tx_w_round_robin_2); in init_nic()
1407 writeq(val64, &bar0->tx_w_round_robin_3); in init_nic()
1408 writeq(val64, &bar0->tx_w_round_robin_4); in init_nic()
1412 writeq(val64, &bar0->tx_w_round_robin_0); in init_nic()
1413 writeq(val64, &bar0->tx_w_round_robin_1); in init_nic()
1414 writeq(val64, &bar0->tx_w_round_robin_2); in init_nic()
1415 writeq(val64, &bar0->tx_w_round_robin_3); in init_nic()
1417 writeq(val64, &bar0->tx_w_round_robin_4); in init_nic()
1421 writeq(val64, &bar0->tx_w_round_robin_0); in init_nic()
1423 writeq(val64, &bar0->tx_w_round_robin_1); in init_nic()
1425 writeq(val64, &bar0->tx_w_round_robin_2); in init_nic()
1427 writeq(val64, &bar0->tx_w_round_robin_3); in init_nic()
1429 writeq(val64, &bar0->tx_w_round_robin_4); in init_nic()
1433 writeq(val64, &bar0->tx_w_round_robin_0); in init_nic()
1434 writeq(val64, &bar0->tx_w_round_robin_1); in init_nic()
1435 writeq(val64, &bar0->tx_w_round_robin_2); in init_nic()
1436 writeq(val64, &bar0->tx_w_round_robin_3); in init_nic()
1438 writeq(val64, &bar0->tx_w_round_robin_4); in init_nic()
1442 writeq(val64, &bar0->tx_w_round_robin_0); in init_nic()
1444 writeq(val64, &bar0->tx_w_round_robin_1); in init_nic()
1446 writeq(val64, &bar0->tx_w_round_robin_2); in init_nic()
1448 writeq(val64, &bar0->tx_w_round_robin_3); in init_nic()
1450 writeq(val64, &bar0->tx_w_round_robin_4); in init_nic()
1454 writeq(val64, &bar0->tx_w_round_robin_0); in init_nic()
1456 writeq(val64, &bar0->tx_w_round_robin_1); in init_nic()
1458 writeq(val64, &bar0->tx_w_round_robin_2); in init_nic()
1460 writeq(val64, &bar0->tx_w_round_robin_3); in init_nic()
1462 writeq(val64, &bar0->tx_w_round_robin_4); in init_nic()
1466 writeq(val64, &bar0->tx_w_round_robin_0); in init_nic()
1468 writeq(val64, &bar0->tx_w_round_robin_1); in init_nic()
1470 writeq(val64, &bar0->tx_w_round_robin_2); in init_nic()
1472 writeq(val64, &bar0->tx_w_round_robin_3); in init_nic()
1474 writeq(val64, &bar0->tx_w_round_robin_4); in init_nic()
1478 writeq(val64, &bar0->tx_w_round_robin_0); in init_nic()
1479 writeq(val64, &bar0->tx_w_round_robin_1); in init_nic()
1480 writeq(val64, &bar0->tx_w_round_robin_2); in init_nic()
1481 writeq(val64, &bar0->tx_w_round_robin_3); in init_nic()
1483 writeq(val64, &bar0->tx_w_round_robin_4); in init_nic()
1490 writeq(val64, &bar0->tx_fifo_partition_0); in init_nic()
1499 writeq(val64, &bar0->rx_w_round_robin_0); in init_nic()
1500 writeq(val64, &bar0->rx_w_round_robin_1); in init_nic()
1501 writeq(val64, &bar0->rx_w_round_robin_2); in init_nic()
1502 writeq(val64, &bar0->rx_w_round_robin_3); in init_nic()
1503 writeq(val64, &bar0->rx_w_round_robin_4); in init_nic()
1506 writeq(val64, &bar0->rts_qos_steering); in init_nic()
1510 writeq(val64, &bar0->rx_w_round_robin_0); in init_nic()
1511 writeq(val64, &bar0->rx_w_round_robin_1); in init_nic()
1512 writeq(val64, &bar0->rx_w_round_robin_2); in init_nic()
1513 writeq(val64, &bar0->rx_w_round_robin_3); in init_nic()
1515 writeq(val64, &bar0->rx_w_round_robin_4); in init_nic()
1518 writeq(val64, &bar0->rts_qos_steering); in init_nic()
1522 writeq(val64, &bar0->rx_w_round_robin_0); in init_nic()
1524 writeq(val64, &bar0->rx_w_round_robin_1); in init_nic()
1526 writeq(val64, &bar0->rx_w_round_robin_2); in init_nic()
1528 writeq(val64, &bar0->rx_w_round_robin_3); in init_nic()
1530 writeq(val64, &bar0->rx_w_round_robin_4); in init_nic()
1533 writeq(val64, &bar0->rts_qos_steering); in init_nic()
1537 writeq(val64, &bar0->rx_w_round_robin_0); in init_nic()
1538 writeq(val64, &bar0->rx_w_round_robin_1); in init_nic()
1539 writeq(val64, &bar0->rx_w_round_robin_2); in init_nic()
1540 writeq(val64, &bar0->rx_w_round_robin_3); in init_nic()
1542 writeq(val64, &bar0->rx_w_round_robin_4); in init_nic()
1545 writeq(val64, &bar0->rts_qos_steering); in init_nic()
1549 writeq(val64, &bar0->rx_w_round_robin_0); in init_nic()
1551 writeq(val64, &bar0->rx_w_round_robin_1); in init_nic()
1553 writeq(val64, &bar0->rx_w_round_robin_2); in init_nic()
1555 writeq(val64, &bar0->rx_w_round_robin_3); in init_nic()
1557 writeq(val64, &bar0->rx_w_round_robin_4); in init_nic()
1560 writeq(val64, &bar0->rts_qos_steering); in init_nic()
1564 writeq(val64, &bar0->rx_w_round_robin_0); in init_nic()
1566 writeq(val64, &bar0->rx_w_round_robin_1); in init_nic()
1568 writeq(val64, &bar0->rx_w_round_robin_2); in init_nic()
1570 writeq(val64, &bar0->rx_w_round_robin_3); in init_nic()
1572 writeq(val64, &bar0->rx_w_round_robin_4); in init_nic()
1575 writeq(val64, &bar0->rts_qos_steering); in init_nic()
1579 writeq(val64, &bar0->rx_w_round_robin_0); in init_nic()
1581 writeq(val64, &bar0->rx_w_round_robin_1); in init_nic()
1583 writeq(val64, &bar0->rx_w_round_robin_2); in init_nic()
1585 writeq(val64, &bar0->rx_w_round_robin_3); in init_nic()
1587 writeq(val64, &bar0->rx_w_round_robin_4); in init_nic()
1590 writeq(val64, &bar0->rts_qos_steering); in init_nic()
1594 writeq(val64, &bar0->rx_w_round_robin_0); in init_nic()
1595 writeq(val64, &bar0->rx_w_round_robin_1); in init_nic()
1596 writeq(val64, &bar0->rx_w_round_robin_2); in init_nic()
1597 writeq(val64, &bar0->rx_w_round_robin_3); in init_nic()
1599 writeq(val64, &bar0->rx_w_round_robin_4); in init_nic()
1602 writeq(val64, &bar0->rts_qos_steering); in init_nic()
1609 writeq(val64, &bar0->rts_frm_len_n[i]); in init_nic()
1614 writeq(val64, &bar0->rts_frm_len_n[i]); in init_nic()
1627 writeq(MAC_RTS_FRM_LEN_SET(rts_frm_len[i]), in init_nic()
1643 writeq(mac_control->stats_mem_phy, &bar0->stat_addr); in init_nic()
1647 writeq(val64, &bar0->stat_byte_cnt); in init_nic()
1656 writeq(val64, &bar0->mac_link_util); in init_nic()
1682 writeq(val64, &bar0->rti_data1_mem); in init_nic()
1692 writeq(val64, &bar0->rti_data2_mem); in init_nic()
1698 writeq(val64, &bar0->rti_command_mem); in init_nic()
1727 writeq(0xffbbffbbffbbffbbULL, &bar0->mc_pause_thresh_q0q3); in init_nic()
1728 writeq(0xffbbffbbffbbffbbULL, &bar0->mc_pause_thresh_q4q7); in init_nic()
1734 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in init_nic()
1736 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in init_nic()
1745 writeq(val64, &bar0->mac_cfg); in init_nic()
1747 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in init_nic()
1749 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in init_nic()
1760 writeq(val64, &bar0->rmac_pause_cfg); in init_nic()
1774 writeq(val64, &bar0->mc_pause_thresh_q0q3); in init_nic()
1782 writeq(val64, &bar0->mc_pause_thresh_q4q7); in init_nic()
1790 writeq(val64, &bar0->pic_control); in init_nic()
1793 writeq(TXREQTO_VAL(0x7f) | TXREQTO_EN, &bar0->txreqtimeout); in init_nic()
1794 writeq(0x0, &bar0->read_retry_delay); in init_nic()
1795 writeq(0x0, &bar0->write_retry_delay); in init_nic()
1805 writeq(val64, &bar0->misc_control); in init_nic()
1808 writeq(val64, &bar0->pic_control2); in init_nic()
1812 writeq(val64, &bar0->tmac_avg_ipg); in init_nic()
1847 writeq(temp64, addr); in do_s2io_write_bits()
1856 writeq(DISABLE_ALL_INTRS, &bar0->general_int_mask); in en_dis_err_alarms()
2014 writeq(DISABLE_ALL_INTRS, &bar0->pic_int_mask); in en_dis_able_nic_intrs()
2020 writeq(DISABLE_ALL_INTRS, &bar0->pic_int_mask); in en_dis_able_nic_intrs()
2032 writeq(0x0, &bar0->tx_traffic_mask); in en_dis_able_nic_intrs()
2038 writeq(DISABLE_ALL_INTRS, &bar0->tx_traffic_mask); in en_dis_able_nic_intrs()
2047 writeq(0x0, &bar0->rx_traffic_mask); in en_dis_able_nic_intrs()
2053 writeq(DISABLE_ALL_INTRS, &bar0->rx_traffic_mask); in en_dis_able_nic_intrs()
2062 writeq(temp64, &bar0->general_int_mask); in en_dis_able_nic_intrs()
2190 writeq(fix_mac[i++], &bar0->gpio_control); in fix_mac_address()
2222 writeq((u64)ring->rx_blocks[0].block_dma_addr, in start_nic()
2234 writeq(val64, &bar0->prc_ctrl_n[i]); in start_nic()
2241 writeq(val64, &bar0->rx_pa_cfg); in start_nic()
2247 writeq(val64, &bar0->rx_pa_cfg); in start_nic()
2266 writeq(val64, &bar0->adapter_control); in start_nic()
2291 writeq(val64, &bar0->adapter_control); in start_nic()
2306 writeq(val64, &bar0->gpio_control); in start_nic()
2308 writeq(val64, (void __iomem *)bar0 + 0x2700); in start_nic()
2427 writeq(val64, &bar0->adapter_control); in stop_nic()
2814 writeq(0, &bar0->rx_traffic_mask); in s2io_poll_inta()
2845 writeq(val64, &bar0->rx_traffic_int); in s2io_netpoll()
2846 writeq(val64, &bar0->tx_traffic_int); in s2io_netpoll()
3096 writeq(val64, &bar0->mdio_control); in s2io_mdio_write()
3098 writeq(val64, &bar0->mdio_control); in s2io_mdio_write()
3107 writeq(val64, &bar0->mdio_control); in s2io_mdio_write()
3109 writeq(val64, &bar0->mdio_control); in s2io_mdio_write()
3116 writeq(val64, &bar0->mdio_control); in s2io_mdio_write()
3118 writeq(val64, &bar0->mdio_control); in s2io_mdio_write()
3142 writeq(val64, &bar0->mdio_control); in s2io_mdio_read()
3144 writeq(val64, &bar0->mdio_control); in s2io_mdio_read()
3152 writeq(val64, &bar0->mdio_control); in s2io_mdio_read()
3154 writeq(val64, &bar0->mdio_control); in s2io_mdio_read()
3419 writeq(val64, &bar0->sw_reset); in s2io_reset()
3459 writeq(s2BIT(62), &bar0->txpic_int_reg); in s2io_reset()
3496 writeq(val64, &bar0->gpio_control); in s2io_reset()
3498 writeq(val64, (void __iomem *)bar0 + 0x2700); in s2io_reset()
3507 writeq(val64, &bar0->pcc_err_reg); in s2io_reset()
3545 writeq(value[i], &bar0->swapper_ctrl); in s2io_set_swapper()
3563 writeq(valt, &bar0->xmsi_address); in s2io_set_swapper()
3576 writeq((value[i] | valr), &bar0->swapper_ctrl); in s2io_set_swapper()
3577 writeq(valt, &bar0->xmsi_address); in s2io_set_swapper()
3611 writeq(val64, &bar0->swapper_ctrl); in s2io_set_swapper()
3635 writeq(val64, &bar0->swapper_ctrl); in s2io_set_swapper()
3687 writeq(nic->msix_info[i].addr, &bar0->xmsi_address); in restore_xmsi_data()
3688 writeq(nic->msix_info[i].data, &bar0->xmsi_data); in restore_xmsi_data()
3690 writeq(val64, &bar0->xmsi_access); in restore_xmsi_data()
3710 writeq(val64, &bar0->xmsi_access); in store_xmsi_data()
3779 writeq(rx_mat, &bar0->rx_mat); in s2io_enable_msi_x()
3843 writeq(val64, &bar0->scheduled_int_ctrl); in s2io_test_msi()
3858 writeq(saved64, &bar0->scheduled_int_ctrl); in s2io_test_msi()
4155 writeq(val64, &tx_fifo->TxDL_Pointer); in s2io_xmit()
4162 writeq(val64, &tx_fifo->List_Control); in s2io_xmit()
4249 writeq(S2IO_MINUS_ONE, &bar0->general_int_mask); in s2io_msix_fifo_handle()
4255 writeq(S2IO_MINUS_ONE, &bar0->tx_traffic_int); in s2io_msix_fifo_handle()
4260 writeq(sp->general_int_mask, &bar0->general_int_mask); in s2io_msix_fifo_handle()
4284 writeq(val64, &bar0->gpio_int_reg); in s2io_txpic_intr_handle()
4288 writeq(val64, &bar0->gpio_int_mask); in s2io_txpic_intr_handle()
4294 writeq(val64, &bar0->adapter_control); in s2io_txpic_intr_handle()
4296 writeq(val64, &bar0->adapter_control); in s2io_txpic_intr_handle()
4308 writeq(val64, &bar0->gpio_int_mask); in s2io_txpic_intr_handle()
4317 writeq(val64, &bar0->gpio_int_mask); in s2io_txpic_intr_handle()
4322 writeq(val64, &bar0->adapter_control); in s2io_txpic_intr_handle()
4344 writeq(val64, addr); in do_s2io_chk_alarm_bit()
4393 writeq(val64, &bar0->mac_rmac_err_reg); in s2io_handle_errors()
4625 writeq(val64, &bar0->mc_err_reg); in s2io_handle_errors()
4696 writeq(S2IO_MINUS_ONE, &bar0->general_int_mask); in s2io_isr()
4701 writeq(S2IO_MINUS_ONE, &bar0->rx_traffic_mask); in s2io_isr()
4702 writeq(S2IO_MINUS_ONE, &bar0->rx_traffic_int); in s2io_isr()
4712 writeq(S2IO_MINUS_ONE, &bar0->rx_traffic_int); in s2io_isr()
4727 writeq(S2IO_MINUS_ONE, &bar0->tx_traffic_int); in s2io_isr()
4745 writeq(sp->general_int_mask, &bar0->general_int_mask); in s2io_isr()
4771 writeq(val64, &bar0->stat_cfg); in s2io_updt_stats()
4900 writeq(RMAC_ADDR_DATA0_MEM_ADDR(multi_mac), in s2io_set_multicast()
4902 writeq(RMAC_ADDR_DATA1_MEM_MASK(mask), in s2io_set_multicast()
4907 writeq(val64, &bar0->rmac_addr_cmd_mem); in s2io_set_multicast()
4917 writeq(RMAC_ADDR_DATA0_MEM_ADDR(dis_addr), in s2io_set_multicast()
4919 writeq(RMAC_ADDR_DATA1_MEM_MASK(0x0), in s2io_set_multicast()
4924 writeq(val64, &bar0->rmac_addr_cmd_mem); in s2io_set_multicast()
4940 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in s2io_set_multicast()
4942 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in s2io_set_multicast()
4948 writeq(val64, &bar0->rx_pa_cfg); in s2io_set_multicast()
4962 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in s2io_set_multicast()
4964 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in s2io_set_multicast()
4970 writeq(val64, &bar0->rx_pa_cfg); in s2io_set_multicast()
4995 writeq(RMAC_ADDR_DATA0_MEM_ADDR(dis_addr), in s2io_set_multicast()
4997 writeq(RMAC_ADDR_DATA1_MEM_MASK(0ULL), in s2io_set_multicast()
5003 writeq(val64, &bar0->rmac_addr_cmd_mem); in s2io_set_multicast()
5025 writeq(RMAC_ADDR_DATA0_MEM_ADDR(mac_addr), in s2io_set_multicast()
5027 writeq(RMAC_ADDR_DATA1_MEM_MASK(0ULL), in s2io_set_multicast()
5033 writeq(val64, &bar0->rmac_addr_cmd_mem); in s2io_set_multicast()
5131 writeq(RMAC_ADDR_DATA0_MEM_ADDR(addr), in do_s2io_add_mac()
5136 writeq(val64, &bar0->rmac_addr_cmd_mem); in do_s2io_add_mac()
5180 writeq(val64, &bar0->rmac_addr_cmd_mem); in do_s2io_read_unicast_mc()
5403 writeq(val64, &bar0->gpio_control); in s2io_set_led()
5411 writeq(val64, &bar0->adapter_control); in s2io_set_led()
5458 writeq(sp->adapt_ctrl_org, &bar0->gpio_control); in s2io_ethtool_set_led()
5542 writeq(val64, &bar0->rmac_pause_cfg); in s2io_ethtool_setpause_data()
5657 writeq(SPI_DATA_WRITE(data, (cnt << 3)), &bar0->spi_data); in write_eeprom()
5885 writeq(val64, &bar0->xmsi_data); in s2io_register_test()
5893 writeq(val64, &bar0->xmsi_data); in s2io_register_test()
6090 writeq(val64, &bar0->adapter_control); in s2io_rldram_test()
6107 writeq(val64, &bar0->mc_rldram_test_d0); in s2io_rldram_test()
6112 writeq(val64, &bar0->mc_rldram_test_d1); in s2io_rldram_test()
6117 writeq(val64, &bar0->mc_rldram_test_d2); in s2io_rldram_test()
6120 writeq(val64, &bar0->mc_rldram_test_add); in s2io_rldram_test()
6658 writeq(vBIT(val64, 2, 14), &bar0->rmac_max_pyld_len); in s2io_change_mtu()
6704 writeq(val64, &bar0->adapter_control); in s2io_set_link()
6709 writeq(val64, &bar0->gpio_control); in s2io_set_link()
6713 writeq(val64, &bar0->adapter_control); in s2io_set_link()
6725 writeq(val64, &bar0->adapter_control); in s2io_set_link()
6732 writeq(val64, &bar0->gpio_control); in s2io_set_link()
6738 writeq(val64, &bar0->adapter_control); in s2io_set_link()
7608 writeq(val64, &bar0->rts_ds_mem_data); in rts_ds_steer()
7614 writeq(val64, &bar0->rts_ds_mem_ctrl); in rts_ds_steer()
7940 writeq(val64, &bar0->rmac_addr_cmd_mem); in s2io_init_nic()
8008 writeq(val64, &bar0->gpio_control); in s2io_init_nic()
8010 writeq(val64, (void __iomem *)bar0 + 0x2700); in s2io_init_nic()