Lines Matching refs:outb
97 outb(EOC+offset, port + PAR_DATA); in read_nibble()
98 outb(RdAddr+offset, port + PAR_DATA); in read_nibble()
101 outb(EOC+offset, port + PAR_DATA); in read_nibble()
112 outb(Ctrl_LNibRead, ioaddr + PAR_CONTROL); in read_byte_mode0()
115 outb(Ctrl_HNibRead, ioaddr + PAR_CONTROL); in read_byte_mode0()
126 outb(Ctrl_LNibRead, ioaddr + PAR_CONTROL); in read_byte_mode2()
129 outb(Ctrl_HNibRead, ioaddr + PAR_CONTROL); in read_byte_mode2()
139 outb(RdAddr | MAR, ioaddr + PAR_DATA); in read_byte_mode4()
141 outb(RdAddr | HNib | MAR, ioaddr + PAR_DATA); in read_byte_mode4()
150 outb(RdAddr | MAR, ioaddr + PAR_DATA); in read_byte_mode6()
153 outb(RdAddr | HNib | MAR, ioaddr + PAR_DATA); in read_byte_mode6()
163 outb(EOC | reg, port + PAR_DATA); in write_reg()
165 outb(outval, port + PAR_DATA); in write_reg()
166 outb(outval, port + PAR_DATA); /* Double write for PS/2. */ in write_reg()
170 outb(outval, port + PAR_DATA); in write_reg()
172 outb(outval, port + PAR_DATA); in write_reg()
173 outb(outval, port + PAR_DATA); in write_reg()
175 outb(EOC | outval, port + PAR_DATA); in write_reg()
183 outb(outval, port + PAR_DATA); in write_reg_high()
185 outb(outval, port + PAR_DATA); in write_reg_high()
186 outb(outval, port + PAR_DATA); /* Double write for PS/2. */ in write_reg_high()
189 outb(outval, port + PAR_DATA); in write_reg_high()
191 outb(outval, port + PAR_DATA); in write_reg_high()
192 outb(outval, port + PAR_DATA); in write_reg_high()
194 outb(EOC | HNib | outval, port + PAR_DATA); in write_reg_high()
203 outb(EOC | reg, port + PAR_DATA); /* Reset the address register. */ in write_reg_byte()
205 outb(outval, port + PAR_DATA); in write_reg_byte()
206 outb(outval, port + PAR_DATA); /* Double write for PS/2. */ in write_reg_byte()
208 outb((outval & 0xf0) | (value & 0x0f), port + PAR_DATA); in write_reg_byte()
209 outb(value & 0x0f, port + PAR_DATA); in write_reg_byte()
211 outb(value, port + PAR_DATA); in write_reg_byte()
212 outb(0x10 | value, port + PAR_DATA); in write_reg_byte()
213 outb(0x10 | value, port + PAR_DATA); in write_reg_byte()
215 outb(EOC | value, port + PAR_DATA); /* Reset the address register. */ in write_reg_byte()
226 outb(value & 0x0f, ioaddr + PAR_DATA); in write_byte_mode0()
227 outb((value>>4) | 0x10, ioaddr + PAR_DATA); in write_byte_mode0()
232 outb(value & 0x0f, ioaddr + PAR_DATA); in write_byte_mode1()
233 outb(Ctrl_IRQEN | Ctrl_LNibWrite, ioaddr + PAR_CONTROL); in write_byte_mode1()
234 outb((value>>4) | 0x10, ioaddr + PAR_DATA); in write_byte_mode1()
235 outb(Ctrl_IRQEN | Ctrl_HNibWrite, ioaddr + PAR_CONTROL); in write_byte_mode1()
241 outb(value & 0x0f, ioaddr + PAR_DATA); in write_word_mode0()
243 outb((value & 0x0f) | 0x10, ioaddr + PAR_DATA); in write_word_mode0()
245 outb(value & 0x0f, ioaddr + PAR_DATA); in write_word_mode0()
247 outb((value & 0x0f) | 0x10, ioaddr + PAR_DATA); in write_word_mode0()