Lines Matching defs:stmmac_dma_ops
170 struct stmmac_dma_ops { struct
172 int (*reset)(void __iomem *ioaddr);
173 void (*init)(void __iomem *ioaddr, struct stmmac_dma_cfg *dma_cfg,
175 void (*init_chan)(void __iomem *ioaddr,
177 void (*init_rx_chan)(void __iomem *ioaddr,
180 void (*init_tx_chan)(void __iomem *ioaddr,
184 void (*axi)(void __iomem *ioaddr, struct stmmac_axi *axi);
186 void (*dump_regs)(void __iomem *ioaddr, u32 *reg_space);
187 void (*dma_rx_mode)(void __iomem *ioaddr, int mode, u32 channel,
189 void (*dma_tx_mode)(void __iomem *ioaddr, int mode, u32 channel,
192 void (*dma_diagnostic_fr) (void *data, struct stmmac_extra_stats *x,
194 void (*enable_dma_transmission) (void __iomem *ioaddr);
195 void (*enable_dma_irq)(void __iomem *ioaddr, u32 chan,
197 void (*disable_dma_irq)(void __iomem *ioaddr, u32 chan,
199 void (*start_tx)(void __iomem *ioaddr, u32 chan);
200 void (*stop_tx)(void __iomem *ioaddr, u32 chan);
201 void (*start_rx)(void __iomem *ioaddr, u32 chan);
202 void (*stop_rx)(void __iomem *ioaddr, u32 chan);
203 int (*dma_interrupt) (void __iomem *ioaddr,
206 int (*get_hw_feature)(void __iomem *ioaddr,
209 void (*rx_watchdog)(void __iomem *ioaddr, u32 riwt, u32 queue);
210 void (*set_tx_ring_len)(void __iomem *ioaddr, u32 len, u32 chan);
211 void (*set_rx_ring_len)(void __iomem *ioaddr, u32 len, u32 chan);
212 void (*set_rx_tail_ptr)(void __iomem *ioaddr, u32 tail_ptr, u32 chan);
213 void (*set_tx_tail_ptr)(void __iomem *ioaddr, u32 tail_ptr, u32 chan);
214 void (*enable_tso)(void __iomem *ioaddr, bool en, u32 chan);
215 void (*qmode)(void __iomem *ioaddr, u32 channel, u8 qmode);
216 void (*set_bfsize)(void __iomem *ioaddr, int bfsize, u32 chan);
217 void (*enable_sph)(void __iomem *ioaddr, bool en, u32 chan);
218 int (*enable_tbs)(void __iomem *ioaddr, bool en, u32 chan);