Lines Matching refs:xpcs
72 int nxp_sja1105_sgmii_pma_config(struct dw_xpcs *xpcs) in nxp_sja1105_sgmii_pma_config() argument
74 return xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_DIG_CTRL2, in nxp_sja1105_sgmii_pma_config()
78 static int nxp_sja1110_pma_config(struct dw_xpcs *xpcs, in nxp_sja1110_pma_config() argument
89 ret = xpcs_write(xpcs, MDIO_MMD_VEND2, SJA1110_TXPLL_CTRL0, in nxp_sja1110_pma_config()
94 ret = xpcs_write(xpcs, MDIO_MMD_VEND2, SJA1110_TXPLL_CTRL1, in nxp_sja1110_pma_config()
100 ret = xpcs_write(xpcs, MDIO_MMD_VEND2, SJA1110_LANE_DRIVER1_0, in nxp_sja1110_pma_config()
107 ret = xpcs_write(xpcs, MDIO_MMD_VEND2, SJA1110_LANE_DRIVER2_0, val); in nxp_sja1110_pma_config()
113 ret = xpcs_write(xpcs, MDIO_MMD_VEND2, SJA1110_LANE_DRIVER2_1, val); in nxp_sja1110_pma_config()
122 ret = xpcs_write(xpcs, MDIO_MMD_VEND2, SJA1110_LANE_TRIM, val); in nxp_sja1110_pma_config()
127 ret = xpcs_write(xpcs, MDIO_MMD_VEND2, SJA1110_LANE_DATAPATH_1, 0); in nxp_sja1110_pma_config()
134 ret = xpcs_write(xpcs, MDIO_MMD_VEND2, SJA1110_RXPLL_CTRL0, in nxp_sja1110_pma_config()
139 ret = xpcs_write(xpcs, MDIO_MMD_VEND2, SJA1110_RXPLL_CTRL1, in nxp_sja1110_pma_config()
148 ret = xpcs_write(xpcs, MDIO_MMD_VEND2, SJA1110_RX_DATA_DETECT, 0x0005); in nxp_sja1110_pma_config()
155 ret = xpcs_read(xpcs, MDIO_MMD_VEND2, SJA1110_POWERDOWN_ENABLE); in nxp_sja1110_pma_config()
164 ret = xpcs_write(xpcs, MDIO_MMD_VEND2, SJA1110_POWERDOWN_ENABLE, val); in nxp_sja1110_pma_config()
169 ret = xpcs_write(xpcs, MDIO_MMD_VEND2, SJA1110_RX_CDR_CTLE, in nxp_sja1110_pma_config()
177 int nxp_sja1110_sgmii_pma_config(struct dw_xpcs *xpcs) in nxp_sja1110_sgmii_pma_config() argument
179 return nxp_sja1110_pma_config(xpcs, 0x19, 0x1, 0x19, 0x1, 0x212a); in nxp_sja1110_sgmii_pma_config()
182 int nxp_sja1110_2500basex_pma_config(struct dw_xpcs *xpcs) in nxp_sja1110_2500basex_pma_config() argument
184 return nxp_sja1110_pma_config(xpcs, 0x7d, 0x2, 0x7d, 0x2, 0x732a); in nxp_sja1110_2500basex_pma_config()