Lines Matching defs:ath11k_hw_regs
280 struct ath11k_hw_regs { struct
281 u32 hal_tcl1_ring_base_lsb;
282 u32 hal_tcl1_ring_base_msb;
283 u32 hal_tcl1_ring_id;
284 u32 hal_tcl1_ring_misc;
285 u32 hal_tcl1_ring_tp_addr_lsb;
286 u32 hal_tcl1_ring_tp_addr_msb;
287 u32 hal_tcl1_ring_consumer_int_setup_ix0;
288 u32 hal_tcl1_ring_consumer_int_setup_ix1;
289 u32 hal_tcl1_ring_msi1_base_lsb;
290 u32 hal_tcl1_ring_msi1_base_msb;
291 u32 hal_tcl1_ring_msi1_data;
292 u32 hal_tcl2_ring_base_lsb;
293 u32 hal_tcl_ring_base_lsb;
295 u32 hal_tcl_status_ring_base_lsb;
297 u32 hal_reo1_ring_base_lsb;
298 u32 hal_reo1_ring_base_msb;
299 u32 hal_reo1_ring_id;
300 u32 hal_reo1_ring_misc;
301 u32 hal_reo1_ring_hp_addr_lsb;
302 u32 hal_reo1_ring_hp_addr_msb;
303 u32 hal_reo1_ring_producer_int_setup;
304 u32 hal_reo1_ring_msi1_base_lsb;
305 u32 hal_reo1_ring_msi1_base_msb;
306 u32 hal_reo1_ring_msi1_data;
307 u32 hal_reo2_ring_base_lsb;
308 u32 hal_reo1_aging_thresh_ix_0;
309 u32 hal_reo1_aging_thresh_ix_1;
310 u32 hal_reo1_aging_thresh_ix_2;
311 u32 hal_reo1_aging_thresh_ix_3;
313 u32 hal_reo1_ring_hp;
314 u32 hal_reo1_ring_tp;
315 u32 hal_reo2_ring_hp;
340 extern const struct ath11k_hw_regs ipq8074_regs; argument