Lines Matching refs:AR5K_PHY_AGCCTL
1602 if (ath5k_hw_reg_read(ah, AR5K_PHY_AGCCTL) & AR5K_PHY_AGCCTL_NF) { in ath5k_hw_update_noise_floor()
1634 AR5K_REG_MASKED_BITS(ah, AR5K_PHY_AGCCTL, AR5K_PHY_AGCCTL_NF, in ath5k_hw_update_noise_floor()
1637 ath5k_hw_register_timeout(ah, AR5K_PHY_AGCCTL, AR5K_PHY_AGCCTL_NF, in ath5k_hw_update_noise_floor()
1648 AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_AGCCTL, in ath5k_hw_update_noise_floor()
1741 AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_AGCCTL, AR5K_PHY_AGCCTL_CAL); in ath5k_hw_rf5110_calibrate()
1743 ret = ath5k_hw_register_timeout(ah, AR5K_PHY_AGCCTL, in ath5k_hw_rf5110_calibrate()
2220 AR5K_REG_DISABLE_BITS(ah, AR5K_PHY_AGCCTL, in ath5k_hw_set_fast_div()
2223 AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_AGCCTL, in ath5k_hw_set_fast_div()
2227 AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_AGCCTL, in ath5k_hw_set_fast_div()
3840 AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_AGCCTL, in ath5k_hw_phy_init()
3935 AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_AGCCTL, in ath5k_hw_phy_init()
3951 if (ath5k_hw_register_timeout(ah, AR5K_PHY_AGCCTL, in ath5k_hw_phy_init()