Lines Matching refs:pModal
238 struct modal_eep_4k_header *pModal = &eep->modalHeader; in ath9k_hw_4k_get_eeprom() local
243 return pModal->noiseFloorThreshCh[0]; in ath9k_hw_4k_get_eeprom()
259 return pModal->ob_0; in ath9k_hw_4k_get_eeprom()
261 return pModal->db1_1; in ath9k_hw_4k_get_eeprom()
271 return pModal->version; in ath9k_hw_4k_get_eeprom()
273 return pModal->antdiv_ctl1; in ath9k_hw_4k_get_eeprom()
277 return pModal->antennaGainCh[0]; in ath9k_hw_4k_get_eeprom()
585 struct modal_eep_4k_header *pModal = &pEepData->modalHeader; in ath9k_hw_4k_set_txpower() local
593 ht40PowerIncForPdadc = pModal->ht40PowerIncForPdadc; in ath9k_hw_4k_set_txpower()
700 struct modal_eep_4k_header *pModal, in ath9k_hw_4k_set_gain() argument
706 le32_to_cpu(pModal->antCtrlChain[0]), 0); in ath9k_hw_4k_set_gain()
709 SM(pModal->iqCalICh[0], AR_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF) | in ath9k_hw_4k_set_gain()
710 SM(pModal->iqCalQCh[0], AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF), in ath9k_hw_4k_set_gain()
714 txRxAttenLocal = pModal->txRxAttenCh[0]; in ath9k_hw_4k_set_gain()
717 AR_PHY_GAIN_2GHZ_XATTEN1_MARGIN, pModal->bswMargin[0]); in ath9k_hw_4k_set_gain()
719 AR_PHY_GAIN_2GHZ_XATTEN1_DB, pModal->bswAtten[0]); in ath9k_hw_4k_set_gain()
722 pModal->xatten2Margin[0]); in ath9k_hw_4k_set_gain()
724 AR_PHY_GAIN_2GHZ_XATTEN2_DB, pModal->xatten2Db[0]); in ath9k_hw_4k_set_gain()
729 pModal->bswMargin[0]); in ath9k_hw_4k_set_gain()
731 AR_PHY_GAIN_2GHZ_XATTEN1_DB, pModal->bswAtten[0]); in ath9k_hw_4k_set_gain()
734 pModal->xatten2Margin[0]); in ath9k_hw_4k_set_gain()
737 pModal->xatten2Db[0]); in ath9k_hw_4k_set_gain()
743 AR9280_PHY_RXGAIN_TXRX_MARGIN, pModal->rxTxMarginCh[0]); in ath9k_hw_4k_set_gain()
748 AR9280_PHY_RXGAIN_TXRX_MARGIN, pModal->rxTxMarginCh[0]); in ath9k_hw_4k_set_gain()
760 struct modal_eep_4k_header *pModal; in ath9k_hw_4k_set_board_values() local
769 pModal = &eep->modalHeader; in ath9k_hw_4k_set_board_values()
772 REG_WRITE(ah, AR_PHY_SWITCH_COM, le32_to_cpu(pModal->antCtrlCommon)); in ath9k_hw_4k_set_board_values()
775 ath9k_hw_4k_set_gain(ah, pModal, eep, txRxAttenLocal); in ath9k_hw_4k_set_board_values()
778 if (pModal->version >= 3) { in ath9k_hw_4k_set_board_values()
779 ant_div_control1 = pModal->antdiv_ctl1; in ath9k_hw_4k_set_board_values()
780 ant_div_control2 = pModal->antdiv_ctl2; in ath9k_hw_4k_set_board_values()
826 if (pModal->version >= 2) { in ath9k_hw_4k_set_board_values()
827 ob[0] = pModal->ob_0; in ath9k_hw_4k_set_board_values()
828 ob[1] = pModal->ob_1; in ath9k_hw_4k_set_board_values()
829 ob[2] = pModal->ob_2; in ath9k_hw_4k_set_board_values()
830 ob[3] = pModal->ob_3; in ath9k_hw_4k_set_board_values()
831 ob[4] = pModal->ob_4; in ath9k_hw_4k_set_board_values()
833 db1[0] = pModal->db1_0; in ath9k_hw_4k_set_board_values()
834 db1[1] = pModal->db1_1; in ath9k_hw_4k_set_board_values()
835 db1[2] = pModal->db1_2; in ath9k_hw_4k_set_board_values()
836 db1[3] = pModal->db1_3; in ath9k_hw_4k_set_board_values()
837 db1[4] = pModal->db1_4; in ath9k_hw_4k_set_board_values()
839 db2[0] = pModal->db2_0; in ath9k_hw_4k_set_board_values()
840 db2[1] = pModal->db2_1; in ath9k_hw_4k_set_board_values()
841 db2[2] = pModal->db2_2; in ath9k_hw_4k_set_board_values()
842 db2[3] = pModal->db2_3; in ath9k_hw_4k_set_board_values()
843 db2[4] = pModal->db2_4; in ath9k_hw_4k_set_board_values()
844 } else if (pModal->version == 1) { in ath9k_hw_4k_set_board_values()
845 ob[0] = pModal->ob_0; in ath9k_hw_4k_set_board_values()
846 ob[1] = ob[2] = ob[3] = ob[4] = pModal->ob_1; in ath9k_hw_4k_set_board_values()
847 db1[0] = pModal->db1_0; in ath9k_hw_4k_set_board_values()
848 db1[1] = db1[2] = db1[3] = db1[4] = pModal->db1_1; in ath9k_hw_4k_set_board_values()
849 db2[0] = pModal->db2_0; in ath9k_hw_4k_set_board_values()
850 db2[1] = db2[2] = db2[3] = db2[4] = pModal->db2_1; in ath9k_hw_4k_set_board_values()
855 ob[i] = pModal->ob_0; in ath9k_hw_4k_set_board_values()
856 db1[i] = pModal->db1_0; in ath9k_hw_4k_set_board_values()
857 db2[i] = pModal->db1_0; in ath9k_hw_4k_set_board_values()
970 pModal->switchSettling); in ath9k_hw_4k_set_board_values()
972 pModal->adcDesiredSize); in ath9k_hw_4k_set_board_values()
975 SM(pModal->txEndToXpaOff, AR_PHY_RF_CTL4_TX_END_XPAA_OFF) | in ath9k_hw_4k_set_board_values()
976 SM(pModal->txEndToXpaOff, AR_PHY_RF_CTL4_TX_END_XPAB_OFF) | in ath9k_hw_4k_set_board_values()
977 SM(pModal->txFrameToXpaOn, AR_PHY_RF_CTL4_FRAME_XPAA_ON) | in ath9k_hw_4k_set_board_values()
978 SM(pModal->txFrameToXpaOn, AR_PHY_RF_CTL4_FRAME_XPAB_ON), 0); in ath9k_hw_4k_set_board_values()
981 pModal->txEndToRxOn); in ath9k_hw_4k_set_board_values()
985 pModal->txEndToRxOn); in ath9k_hw_4k_set_board_values()
987 pModal->thresh62); in ath9k_hw_4k_set_board_values()
989 pModal->thresh62); in ath9k_hw_4k_set_board_values()
993 pModal->txFrameToDataStart); in ath9k_hw_4k_set_board_values()
995 pModal->txFrameToPaOn); in ath9k_hw_4k_set_board_values()
1002 pModal->swSettleHt40); in ath9k_hw_4k_set_board_values()
1007 bb_desired_scale = (pModal->bb_scale_smrt_antenna & in ath9k_hw_4k_set_board_values()