Lines Matching refs:trans
12 static void *_iwl_pcie_ctxt_info_dma_alloc_coherent(struct iwl_trans *trans, in _iwl_pcie_ctxt_info_dma_alloc_coherent() argument
23 result = dma_alloc_coherent(trans->dev, size, phys, GFP_KERNEL); in _iwl_pcie_ctxt_info_dma_alloc_coherent()
32 result = _iwl_pcie_ctxt_info_dma_alloc_coherent(trans, size, in _iwl_pcie_ctxt_info_dma_alloc_coherent()
35 dma_free_coherent(trans->dev, size, old, oldphys); in _iwl_pcie_ctxt_info_dma_alloc_coherent()
41 static void *iwl_pcie_ctxt_info_dma_alloc_coherent(struct iwl_trans *trans, in iwl_pcie_ctxt_info_dma_alloc_coherent() argument
45 return _iwl_pcie_ctxt_info_dma_alloc_coherent(trans, size, phys, 0); in iwl_pcie_ctxt_info_dma_alloc_coherent()
48 int iwl_pcie_ctxt_info_alloc_dma(struct iwl_trans *trans, in iwl_pcie_ctxt_info_alloc_dma() argument
52 dram->block = iwl_pcie_ctxt_info_dma_alloc_coherent(trans, len, in iwl_pcie_ctxt_info_alloc_dma()
63 void iwl_pcie_ctxt_info_free_paging(struct iwl_trans *trans) in iwl_pcie_ctxt_info_free_paging() argument
65 struct iwl_self_init_dram *dram = &trans->init_dram; in iwl_pcie_ctxt_info_free_paging()
75 dma_free_coherent(trans->dev, dram->paging[i].size, in iwl_pcie_ctxt_info_free_paging()
84 int iwl_pcie_init_fw_sec(struct iwl_trans *trans, in iwl_pcie_init_fw_sec() argument
88 struct iwl_self_init_dram *dram = &trans->init_dram; in iwl_pcie_init_fw_sec()
94 iwl_pcie_ctxt_info_free_paging(trans); in iwl_pcie_init_fw_sec()
111 ret = iwl_pcie_ctxt_info_alloc_dma(trans, fw->sec[i].data, in iwl_pcie_init_fw_sec()
124 ret = iwl_pcie_ctxt_info_alloc_dma(trans, in iwl_pcie_init_fw_sec()
149 ret = iwl_pcie_ctxt_info_alloc_dma(trans, fw->sec[fw_idx].data, in iwl_pcie_init_fw_sec()
163 int iwl_pcie_ctxt_info_init(struct iwl_trans *trans, in iwl_pcie_ctxt_info_init() argument
166 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in iwl_pcie_ctxt_info_init()
173 ctxt_info = iwl_pcie_ctxt_info_dma_alloc_coherent(trans, in iwl_pcie_ctxt_info_init()
183 cpu_to_le16((u16)iwl_read32(trans, CSR_HW_REV)); in iwl_pcie_ctxt_info_init()
205 WARN_ON(RX_QUEUE_CB_SIZE(trans->cfg->num_rbds) > 12); in iwl_pcie_ctxt_info_init()
208 u32_encode_bits(RX_QUEUE_CB_SIZE(trans->cfg->num_rbds), in iwl_pcie_ctxt_info_init()
221 cpu_to_le64(trans->txqs.txq[trans->txqs.cmd.q_id]->dma_addr); in iwl_pcie_ctxt_info_init()
226 ret = iwl_pcie_init_fw_sec(trans, fw, &ctxt_info->dram); in iwl_pcie_ctxt_info_init()
228 dma_free_coherent(trans->dev, sizeof(*trans_pcie->ctxt_info), in iwl_pcie_ctxt_info_init()
235 iwl_enable_fw_load_int_ctx_info(trans); in iwl_pcie_ctxt_info_init()
238 if (iwl_pcie_dbg_on(trans)) in iwl_pcie_ctxt_info_init()
239 iwl_pcie_apply_destination(trans); in iwl_pcie_ctxt_info_init()
242 iwl_write64(trans, CSR_CTXT_INFO_BA, trans_pcie->ctxt_info_dma_addr); in iwl_pcie_ctxt_info_init()
249 void iwl_pcie_ctxt_info_free(struct iwl_trans *trans) in iwl_pcie_ctxt_info_free() argument
251 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in iwl_pcie_ctxt_info_free()
256 dma_free_coherent(trans->dev, sizeof(*trans_pcie->ctxt_info), in iwl_pcie_ctxt_info_free()
262 iwl_pcie_ctxt_info_free_fw_img(trans); in iwl_pcie_ctxt_info_free()