Lines Matching refs:rt2x00_get_field32
96 value = rt2x00_get_field32(reg, BBPCSR_VALUE); in rt2400pci_bbp_read()
135 eeprom->reg_data_in = !!rt2x00_get_field32(reg, CSR21_EEPROM_DATA_IN); in rt2400pci_eepromregister_read()
136 eeprom->reg_data_out = !!rt2x00_get_field32(reg, CSR21_EEPROM_DATA_OUT); in rt2400pci_eepromregister_read()
138 !!rt2x00_get_field32(reg, CSR21_EEPROM_DATA_CLOCK); in rt2400pci_eepromregister_read()
140 !!rt2x00_get_field32(reg, CSR21_EEPROM_CHIP_SELECT); in rt2400pci_eepromregister_read()
198 return rt2x00_get_field32(reg, GPIOCSR_VAL0); in rt2400pci_rfkill_poll()
580 qual->rx_failed = rt2x00_get_field32(reg, CNT0_FCS_ERROR); in rt2400pci_link_stats()
722 return rt2x00_get_field32(word, RXD_W0_OWNER_NIC); in rt2400pci_get_entry_state()
726 return (rt2x00_get_field32(word, TXD_W0_OWNER_NIC) || in rt2400pci_get_entry_state()
727 rt2x00_get_field32(word, TXD_W0_VALID)); in rt2400pci_get_entry_state()
1046 bbp_state = rt2x00_get_field32(reg2, PWRCSR1_BBP_CURR_STATE); in rt2400pci_set_state()
1047 rf_state = rt2x00_get_field32(reg2, PWRCSR1_RF_CURR_STATE); in rt2400pci_set_state()
1225 if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR)) in rt2400pci_fill_rxdone()
1227 if (rt2x00_get_field32(word0, RXD_W0_PHYSICAL_ERROR)) in rt2400pci_fill_rxdone()
1240 rx_low = rt2x00_get_field32(word4, RXD_W4_RX_END_TIME); in rt2400pci_fill_rxdone()
1252 rxdesc->signal = rt2x00_get_field32(word2, RXD_W2_SIGNAL) & ~0x08; in rt2400pci_fill_rxdone()
1253 rxdesc->rssi = rt2x00_get_field32(word3, RXD_W3_RSSI) - in rt2400pci_fill_rxdone()
1255 rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT); in rt2400pci_fill_rxdone()
1258 if (rt2x00_get_field32(word0, RXD_W0_MY_BSS)) in rt2400pci_fill_rxdone()
1279 if (rt2x00_get_field32(word, TXD_W0_OWNER_NIC) || in rt2400pci_txdone()
1280 !rt2x00_get_field32(word, TXD_W0_VALID)) in rt2400pci_txdone()
1287 switch (rt2x00_get_field32(word, TXD_W0_RESULT)) { in rt2400pci_txdone()
1298 txdesc.retry = rt2x00_get_field32(word, TXD_W0_RETRY_COUNT); in rt2400pci_txdone()
1392 if (rt2x00_get_field32(reg, CSR7_TBCN_EXPIRE)) in rt2400pci_interrupt()
1395 if (rt2x00_get_field32(reg, CSR7_RXDONE)) in rt2400pci_interrupt()
1398 if (rt2x00_get_field32(reg, CSR7_TXDONE_ATIMRING) || in rt2400pci_interrupt()
1399 rt2x00_get_field32(reg, CSR7_TXDONE_PRIORING) || in rt2400pci_interrupt()
1400 rt2x00_get_field32(reg, CSR7_TXDONE_TXRING)) { in rt2400pci_interrupt()
1442 eeprom.width = rt2x00_get_field32(reg, CSR21_TYPE_93C46) ? in rt2400pci_validate_eeprom()
1484 rt2x00_get_field32(reg, CSR0_REVISION)); in rt2400pci_init_eeprom()
1690 tsf = (u64) rt2x00_get_field32(reg, CSR17_HIGH_TSFTIMER) << 32; in rt2400pci_get_tsf()
1692 tsf |= rt2x00_get_field32(reg, CSR16_LOW_TSFTIMER); in rt2400pci_get_tsf()
1703 return rt2x00_get_field32(reg, CSR15_BEACON_SENT); in rt2400pci_tx_last_beacon()