Lines Matching refs:rt2x00_get_field32
105 value = rt2x00_get_field32(reg, PHY_CSR3_VALUE); in rt61pci_bbp_read()
173 eeprom->reg_data_in = !!rt2x00_get_field32(reg, E2PROM_CSR_DATA_IN); in rt61pci_eepromregister_read()
174 eeprom->reg_data_out = !!rt2x00_get_field32(reg, E2PROM_CSR_DATA_OUT); in rt61pci_eepromregister_read()
176 !!rt2x00_get_field32(reg, E2PROM_CSR_DATA_CLOCK); in rt61pci_eepromregister_read()
178 !!rt2x00_get_field32(reg, E2PROM_CSR_CHIP_SELECT); in rt61pci_eepromregister_read()
236 return rt2x00_get_field32(reg, MAC_CSR13_VAL5); in rt61pci_rfkill_poll()
924 qual->rx_failed = rt2x00_get_field32(reg, STA_CSR0_FCS_ERROR); in rt61pci_link_stats()
930 qual->false_cca = rt2x00_get_field32(reg, STA_CSR1_FALSE_CCA_ERROR); in rt61pci_link_stats()
1249 if (rt2x00_get_field32(reg, MCU_CNTL_CSR_READY)) in rt61pci_load_firmware()
1295 return rt2x00_get_field32(word, RXD_W0_OWNER_NIC); in rt61pci_get_entry_state()
1299 return (rt2x00_get_field32(word, TXD_W0_OWNER_NIC) || in rt61pci_get_entry_state()
1300 rt2x00_get_field32(word, TXD_W0_VALID)); in rt61pci_get_entry_state()
1728 state = rt2x00_get_field32(reg2, MAC_CSR12_BBP_CURRENT_STATE); in rt61pci_set_state()
1971 lna = rt2x00_get_field32(rxd_w1, RXD_W1_RSSI_LNA); in rt61pci_agc_to_rssi()
1991 return rt2x00_get_field32(rxd_w1, RXD_W1_RSSI_AGC) * 2 - offset; in rt61pci_agc_to_rssi()
2005 if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR)) in rt61pci_fill_rxdone()
2008 rxdesc->cipher = rt2x00_get_field32(word0, RXD_W0_CIPHER_ALG); in rt61pci_fill_rxdone()
2009 rxdesc->cipher_status = rt2x00_get_field32(word0, RXD_W0_CIPHER_ERROR); in rt61pci_fill_rxdone()
2044 rxdesc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL); in rt61pci_fill_rxdone()
2046 rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT); in rt61pci_fill_rxdone()
2048 if (rt2x00_get_field32(word0, RXD_W0_OFDM)) in rt61pci_fill_rxdone()
2052 if (rt2x00_get_field32(word0, RXD_W0_MY_BSS)) in rt61pci_fill_rxdone()
2083 if (!rt2x00_get_field32(reg, STA_CSR4_VALID)) in rt61pci_txdone()
2090 type = rt2x00_get_field32(reg, STA_CSR4_PID_TYPE); in rt61pci_txdone()
2099 index = rt2x00_get_field32(reg, STA_CSR4_PID_SUBTYPE); in rt61pci_txdone()
2107 if (rt2x00_get_field32(word, TXD_W0_OWNER_NIC) || in rt61pci_txdone()
2108 !rt2x00_get_field32(word, TXD_W0_VALID)) in rt61pci_txdone()
2127 switch (rt2x00_get_field32(reg, STA_CSR4_TX_RESULT)) { in rt61pci_txdone()
2137 txdesc.retry = rt2x00_get_field32(reg, STA_CSR4_RETRY_COUNT); in rt61pci_txdone()
2257 if (rt2x00_get_field32(reg, INT_SOURCE_CSR_RXDONE)) in rt61pci_interrupt()
2260 if (rt2x00_get_field32(reg, INT_SOURCE_CSR_TXDONE)) in rt61pci_interrupt()
2263 if (rt2x00_get_field32(reg, INT_SOURCE_CSR_BEACON_DONE)) in rt61pci_interrupt()
2266 if (rt2x00_get_field32(reg_mcu, MCU_INT_SOURCE_CSR_TWAKEUP)) in rt61pci_interrupt()
2312 eeprom.width = rt2x00_get_field32(reg, E2PROM_CSR_TYPE_93C46) ? in rt61pci_validate_eeprom()
2423 rt2x00_set_chip(rt2x00dev, rt2x00_get_field32(reg, MAC_CSR0_CHIPSET), in rt61pci_init_eeprom()
2424 value, rt2x00_get_field32(reg, MAC_CSR0_REVISION)); in rt61pci_init_eeprom()
2866 tsf = (u64) rt2x00_get_field32(reg, TXRX_CSR13_HIGH_TSFTIMER) << 32; in rt61pci_get_tsf()
2868 tsf |= rt2x00_get_field32(reg, TXRX_CSR12_LOW_TSFTIMER); in rt61pci_get_tsf()