Lines Matching refs:rfpath
246 enum radio_path rfpath, u32 offset) in _rtl92d_phy_rf_serial_read() argument
251 struct bb_reg_def *pphyreg = &rtlphy->phyreg_def[rfpath]; in _rtl92d_phy_rf_serial_read()
259 if (rfpath == RF90_PATH_A) in _rtl92d_phy_rf_serial_read()
274 if (rfpath == RF90_PATH_A) in _rtl92d_phy_rf_serial_read()
277 else if (rfpath == RF90_PATH_B) in _rtl92d_phy_rf_serial_read()
287 rfpath, pphyreg->rf_rb, retvalue); in _rtl92d_phy_rf_serial_read()
292 enum radio_path rfpath, in _rtl92d_phy_rf_serial_write() argument
299 struct bb_reg_def *pphyreg = &rtlphy->phyreg_def[rfpath]; in _rtl92d_phy_rf_serial_write()
306 rfpath, pphyreg->rf3wire_offset, data_and_addr); in _rtl92d_phy_rf_serial_write()
310 enum radio_path rfpath, u32 regaddr, u32 bitmask) in rtl92d_phy_query_rf_reg() argument
317 regaddr, rfpath, bitmask); in rtl92d_phy_query_rf_reg()
319 original_value = _rtl92d_phy_rf_serial_read(hw, rfpath, regaddr); in rtl92d_phy_query_rf_reg()
325 regaddr, rfpath, bitmask, original_value); in rtl92d_phy_query_rf_reg()
329 void rtl92d_phy_set_rf_reg(struct ieee80211_hw *hw, enum radio_path rfpath, in rtl92d_phy_set_rf_reg() argument
338 regaddr, bitmask, data, rfpath); in rtl92d_phy_set_rf_reg()
345 rfpath, regaddr); in rtl92d_phy_set_rf_reg()
350 _rtl92d_phy_rf_serial_write(hw, rfpath, regaddr, data); in rtl92d_phy_set_rf_reg()
355 regaddr, bitmask, data, rfpath); in rtl92d_phy_set_rf_reg()
764 enum radio_path rfpath) in rtl92d_phy_config_rf_with_headerfile() argument
788 rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE, "Radio No %x\n", rfpath); in rtl92d_phy_config_rf_with_headerfile()
793 if ((content == radiob_txt) && (rfpath == RF90_PATH_A)) { in rtl92d_phy_config_rf_with_headerfile()
799 switch (rfpath) { in rtl92d_phy_config_rf_with_headerfile()
802 rtl_rfreg_delay(hw, rfpath, radioa_array_table[i], in rtl92d_phy_config_rf_with_headerfile()
809 rtl_rfreg_delay(hw, rfpath, radiob_array_table[i], in rtl92d_phy_config_rf_with_headerfile()
816 pr_err("switch case %#x not processed\n", rfpath); in rtl92d_phy_config_rf_with_headerfile()
1073 u8 channel, u8 rfpath) in _rtl92d_phy_reload_imr_setting() argument
1081 rtl_dbg(rtlpriv, COMP_CMD, DBG_LOUD, "====>path %d\n", rfpath); in _rtl92d_phy_reload_imr_setting()
1097 rtl_set_rfreg(hw, (enum radio_path)rfpath, in _rtl92d_phy_reload_imr_setting()
1111 rfpath); in _rtl92d_phy_reload_imr_setting()
1118 rtl_set_rfreg(hw, (enum radio_path)rfpath, in _rtl92d_phy_reload_imr_setting()
1133 u8 rfpath, u32 *pu4_regval) in _rtl92d_phy_enable_rf_env() argument
1137 struct bb_reg_def *pphyreg = &rtlphy->phyreg_def[rfpath]; in _rtl92d_phy_enable_rf_env()
1141 switch (rfpath) { in _rtl92d_phy_enable_rf_env()
1168 static void _rtl92d_phy_restore_rf_env(struct ieee80211_hw *hw, u8 rfpath, in _rtl92d_phy_restore_rf_env() argument
1173 struct bb_reg_def *pphyreg = &rtlphy->phyreg_def[rfpath]; in _rtl92d_phy_restore_rf_env()
1177 switch (rfpath) { in _rtl92d_phy_restore_rf_env()
1198 u8 index = 0, i = 0, rfpath = RF90_PATH_A; in _rtl92d_phy_switch_rf_setting() local
1276 for (rfpath = RF90_PATH_A; rfpath < rtlphy->num_total_rfpath; in _rtl92d_phy_switch_rf_setting()
1277 rfpath++) { in _rtl92d_phy_switch_rf_setting()
1283 rtlpriv->efuse.internal_pa_5g[rfpath]; in _rtl92d_phy_switch_rf_setting()
1288 rtl_set_rfreg(hw, rfpath, in _rtl92d_phy_switch_rf_setting()
1296 rfpath, index); in _rtl92d_phy_switch_rf_setting()
1299 rtl_set_rfreg(hw, (enum radio_path)rfpath, 0x0B, in _rtl92d_phy_switch_rf_setting()
2726 u8 rfpath; in _rtl92d_phy_sw_chnl_step_by_step() local
2784 for (rfpath = 0; rfpath < num_total_rfpath; rfpath++) { in _rtl92d_phy_sw_chnl_step_by_step()
2785 rtlphy->rfreg_chnlval[rfpath] = in _rtl92d_phy_sw_chnl_step_by_step()
2786 ((rtlphy->rfreg_chnlval[rfpath] & in _rtl92d_phy_sw_chnl_step_by_step()
2791 rtlphy->rfreg_chnlval[rfpath] = in _rtl92d_phy_sw_chnl_step_by_step()
2793 [rfpath] | (BIT(18)); in _rtl92d_phy_sw_chnl_step_by_step()
2795 rtlphy->rfreg_chnlval[rfpath] = in _rtl92d_phy_sw_chnl_step_by_step()
2797 [rfpath] & (~BIT(18)); in _rtl92d_phy_sw_chnl_step_by_step()
2798 rtlphy->rfreg_chnlval[rfpath] |= in _rtl92d_phy_sw_chnl_step_by_step()
2801 rtlphy->rfreg_chnlval[rfpath] &= in _rtl92d_phy_sw_chnl_step_by_step()
2804 rtl_set_rfreg(hw, (enum radio_path)rfpath, in _rtl92d_phy_sw_chnl_step_by_step()
2807 rtlphy->rfreg_chnlval[rfpath]); in _rtl92d_phy_sw_chnl_step_by_step()
2809 rfpath); in _rtl92d_phy_sw_chnl_step_by_step()
3334 u8 rfpath, i; in rtl92d_update_bbrf_configuration() local
3455 for (rfpath = RF90_PATH_A; rfpath < rtlphy->num_total_rfpath; in rtl92d_update_bbrf_configuration()
3456 rfpath++) { in rtl92d_update_bbrf_configuration()
3459 rtl_set_rfreg(hw, rfpath, RF_CHNLBW, BIT(8) | BIT(16) | in rtl92d_update_bbrf_configuration()
3462 rtl_set_rfreg(hw, (enum radio_path)rfpath, 0x0B, in rtl92d_update_bbrf_configuration()
3466 rtl_set_rfreg(hw, rfpath, RF_CHNLBW, BIT(8) | in rtl92d_update_bbrf_configuration()
3502 for (rfpath = RF90_PATH_A; rfpath < rtlphy->num_total_rfpath; in rtl92d_update_bbrf_configuration()
3503 rfpath++) { in rtl92d_update_bbrf_configuration()
3504 rtlphy->rfreg_chnlval[rfpath] = rtl_get_rfreg(hw, rfpath, in rtl92d_update_bbrf_configuration()
3506 rtlphy->reg_rf3c[rfpath] = rtl_get_rfreg(hw, rfpath, 0x3C, in rtl92d_update_bbrf_configuration()