Lines Matching refs:seq_puts
325 seq_puts(m, "\n"); in rtw89_debug_priv_rf_reg_dump_get()
327 seq_puts(m, "\n"); in rtw89_debug_priv_rf_reg_dump_get()
521 seq_puts(m, #_regd "\n"); \
560 seq_puts(m, "[Regulatory] "); in rtw89_debug_priv_txpwr_table_get()
563 seq_puts(m, "[SAR]\n"); in rtw89_debug_priv_txpwr_table_get()
566 seq_puts(m, "\n[TX power byrate]\n"); in rtw89_debug_priv_txpwr_table_get()
571 seq_puts(m, "\n[TX power limit]\n"); in rtw89_debug_priv_txpwr_table_get()
576 seq_puts(m, "\n[TX power limit_ru]\n"); in rtw89_debug_priv_txpwr_table_get()
632 seq_puts(m, "Debug selected MAC page 0x00\n"); in rtw89_debug_priv_mac_reg_dump_get()
637 seq_puts(m, "Debug selected MAC page 0x40\n"); in rtw89_debug_priv_mac_reg_dump_get()
642 seq_puts(m, "Debug selected MAC page 0x80\n"); in rtw89_debug_priv_mac_reg_dump_get()
647 seq_puts(m, "Debug selected MAC page 0xc0\n"); in rtw89_debug_priv_mac_reg_dump_get()
652 seq_puts(m, "Debug selected MAC page 0xe0\n"); in rtw89_debug_priv_mac_reg_dump_get()
657 seq_puts(m, "Debug selected BB register\n"); in rtw89_debug_priv_mac_reg_dump_get()
662 seq_puts(m, "Debug selected IQK register\n"); in rtw89_debug_priv_mac_reg_dump_get()
667 seq_puts(m, "Debug selected RFC register\n"); in rtw89_debug_priv_mac_reg_dump_get()
672 seq_puts(m, "Selected invalid register page\n"); in rtw89_debug_priv_mac_reg_dump_get()
684 seq_puts(m, "\n"); in rtw89_debug_priv_mac_reg_dump_get()
769 seq_puts(m, "\n"); in rtw89_debug_dump_mac_mem()
916 seq_puts(m, "[DLE] : DMAC not enabled\n"); in rtw89_debug_mac_dump_dle_dbg()
961 seq_puts(m, "[DMAC] : DMAC not enabled\n"); in rtw89_debug_mac_dump_dmac_dbg()
1014 seq_puts(m, "[CMAC] : CMAC 0 not enabled\n"); in rtw89_debug_mac_dump_cmac_dbg()
1037 seq_puts(m, "[CMAC] : CMAC 1 not enabled\n"); in rtw89_debug_mac_dump_cmac_dbg()
1582 seq_puts(m, "Enable PTCL C0 dbgport.\n"); in rtw89_debug_mac_dbg_port_sel()
1589 seq_puts(m, "Enable PTCL C1 dbgport.\n"); in rtw89_debug_mac_dbg_port_sel()
1596 seq_puts(m, "Enable SCH C0 dbgport.\n"); in rtw89_debug_mac_dbg_port_sel()
1603 seq_puts(m, "Enable SCH C1 dbgport.\n"); in rtw89_debug_mac_dbg_port_sel()
1620 seq_puts(m, "Enable TMAC C0 dbgport.\n"); in rtw89_debug_mac_dbg_port_sel()
1637 seq_puts(m, "Enable TMAC C1 dbgport.\n"); in rtw89_debug_mac_dbg_port_sel()
1659 seq_puts(m, "Enable RMAC C0 dbgport.\n"); in rtw89_debug_mac_dbg_port_sel()
1681 seq_puts(m, "Enable RMAC C1 dbgport.\n"); in rtw89_debug_mac_dbg_port_sel()
1685 seq_puts(m, "Enable RMAC state C0 dbgport.\n"); in rtw89_debug_mac_dbg_port_sel()
1689 seq_puts(m, "Enable RMAC state C1 dbgport.\n"); in rtw89_debug_mac_dbg_port_sel()
1693 seq_puts(m, "Enable RMAC PLCP C0 dbgport.\n"); in rtw89_debug_mac_dbg_port_sel()
1697 seq_puts(m, "Enable RMAC PLCP C1 dbgport.\n"); in rtw89_debug_mac_dbg_port_sel()
1709 seq_puts(m, "Enable TRXPTCL C0 dbgport.\n"); in rtw89_debug_mac_dbg_port_sel()
1721 seq_puts(m, "Enable TRXPTCL C1 dbgport.\n"); in rtw89_debug_mac_dbg_port_sel()
1728 seq_puts(m, "Enable tx infol dump.\n"); in rtw89_debug_mac_dbg_port_sel()
1735 seq_puts(m, "Enable tx infoh dump.\n"); in rtw89_debug_mac_dbg_port_sel()
1742 seq_puts(m, "Enable tx infol dump.\n"); in rtw89_debug_mac_dbg_port_sel()
1749 seq_puts(m, "Enable tx infoh dump.\n"); in rtw89_debug_mac_dbg_port_sel()
1756 seq_puts(m, "Enable tx tf infol dump.\n"); in rtw89_debug_mac_dbg_port_sel()
1763 seq_puts(m, "Enable tx tf infoh dump.\n"); in rtw89_debug_mac_dbg_port_sel()
1770 seq_puts(m, "Enable tx tf infol dump.\n"); in rtw89_debug_mac_dbg_port_sel()
1777 seq_puts(m, "Enable tx tf infoh dump.\n"); in rtw89_debug_mac_dbg_port_sel()
1781 seq_puts(m, "Enable wde bufmgn freepg dump.\n"); in rtw89_debug_mac_dbg_port_sel()
1785 seq_puts(m, "Enable wde bufmgn quota dump.\n"); in rtw89_debug_mac_dbg_port_sel()
1789 seq_puts(m, "Enable wde bufmgn pagellt dump.\n"); in rtw89_debug_mac_dbg_port_sel()
1793 seq_puts(m, "Enable wde bufmgn pktinfo dump.\n"); in rtw89_debug_mac_dbg_port_sel()
1797 seq_puts(m, "Enable wde quemgn prepkt dump.\n"); in rtw89_debug_mac_dbg_port_sel()
1801 seq_puts(m, "Enable wde quemgn nxtpkt dump.\n"); in rtw89_debug_mac_dbg_port_sel()
1805 seq_puts(m, "Enable wde quemgn qlnktbl dump.\n"); in rtw89_debug_mac_dbg_port_sel()
1809 seq_puts(m, "Enable wde quemgn qempty dump.\n"); in rtw89_debug_mac_dbg_port_sel()
1813 seq_puts(m, "Enable ple bufmgn freepg dump.\n"); in rtw89_debug_mac_dbg_port_sel()
1817 seq_puts(m, "Enable ple bufmgn quota dump.\n"); in rtw89_debug_mac_dbg_port_sel()
1821 seq_puts(m, "Enable ple bufmgn pagellt dump.\n"); in rtw89_debug_mac_dbg_port_sel()
1825 seq_puts(m, "Enable ple bufmgn pktinfo dump.\n"); in rtw89_debug_mac_dbg_port_sel()
1829 seq_puts(m, "Enable ple quemgn prepkt dump.\n"); in rtw89_debug_mac_dbg_port_sel()
1833 seq_puts(m, "Enable ple quemgn nxtpkt dump.\n"); in rtw89_debug_mac_dbg_port_sel()
1837 seq_puts(m, "Enable ple quemgn qlnktbl dump.\n"); in rtw89_debug_mac_dbg_port_sel()
1841 seq_puts(m, "Enable ple quemgn qempty dump.\n"); in rtw89_debug_mac_dbg_port_sel()
1845 seq_puts(m, "Enable pktinfo dump.\n"); in rtw89_debug_mac_dbg_port_sel()
1853 seq_puts(m, "Enable pcie txdma dump.\n"); in rtw89_debug_mac_dbg_port_sel()
1861 seq_puts(m, "Enable pcie rxdma dump.\n"); in rtw89_debug_mac_dbg_port_sel()
1869 seq_puts(m, "Enable pcie cvt dump.\n"); in rtw89_debug_mac_dbg_port_sel()
1877 seq_puts(m, "Enable pcie cxpl dump.\n"); in rtw89_debug_mac_dbg_port_sel()
1885 seq_puts(m, "Enable pcie io dump.\n"); in rtw89_debug_mac_dbg_port_sel()
1893 seq_puts(m, "Enable pcie misc dump.\n"); in rtw89_debug_mac_dbg_port_sel()
1901 seq_puts(m, "Enable pcie misc2 dump.\n"); in rtw89_debug_mac_dbg_port_sel()
1904 seq_puts(m, "Dbg port select err\n"); in rtw89_debug_mac_dbg_port_sel()
1954 seq_puts(m, "Dump debug port " #__sel ":\n"); \ in rtw89_debug_mac_dbg_port_dump()
2348 seq_puts(m, "RX count:\n"); in rtw89_debug_priv_phy_info_get()
2354 seq_puts(m, "]\n"); in rtw89_debug_priv_phy_info_get()