Lines Matching refs:eq
64 unsigned int eq; member
130 unsigned int eq) in iproc_msi_read_reg() argument
134 return readl_relaxed(pcie->base + msi->reg_offsets[eq][reg]); in iproc_msi_read_reg()
139 int eq, u32 val) in iproc_msi_write_reg() argument
143 writel_relaxed(val, pcie->base + msi->reg_offsets[eq][reg]); in iproc_msi_write_reg()
160 static inline unsigned int iproc_msi_eq_offset(struct iproc_msi *msi, u32 eq) in iproc_msi_eq_offset() argument
163 return eq * EQ_MEM_REGION_SIZE; in iproc_msi_eq_offset()
165 return eq * EQ_LEN * sizeof(u32); in iproc_msi_eq_offset()
303 static inline u32 decode_msi_hwirq(struct iproc_msi *msi, u32 eq, u32 head) in decode_msi_hwirq() argument
309 offs = iproc_msi_eq_offset(msi, eq) + head * sizeof(u32); in decode_msi_hwirq()
327 u32 eq, head, tail, nr_events; in iproc_msi_handler() local
334 eq = grp->eq; in iproc_msi_handler()
347 eq) & IPROC_MSI_EQ_MASK; in iproc_msi_handler()
350 eq) & IPROC_MSI_EQ_MASK; in iproc_msi_handler()
363 hwirq = decode_msi_hwirq(msi, eq, head); in iproc_msi_handler()
374 iproc_msi_write_reg(msi, IPROC_MSI_EQ_HEAD, eq, head); in iproc_msi_handler()
387 int i, eq; in iproc_msi_enable() local
410 for (eq = 0; eq < msi->nr_irqs; eq++) { in iproc_msi_enable()
414 iproc_msi_write_reg(msi, IPROC_MSI_CTRL, eq, val); in iproc_msi_enable()
421 val = iproc_msi_read_reg(msi, IPROC_MSI_INTS_EN, eq); in iproc_msi_enable()
422 val |= BIT(eq); in iproc_msi_enable()
423 iproc_msi_write_reg(msi, IPROC_MSI_INTS_EN, eq, val); in iproc_msi_enable()
430 u32 eq, val; in iproc_msi_disable() local
432 for (eq = 0; eq < msi->nr_irqs; eq++) { in iproc_msi_disable()
434 val = iproc_msi_read_reg(msi, IPROC_MSI_INTS_EN, eq); in iproc_msi_disable()
435 val &= ~BIT(eq); in iproc_msi_disable()
436 iproc_msi_write_reg(msi, IPROC_MSI_INTS_EN, eq, val); in iproc_msi_disable()
439 val = iproc_msi_read_reg(msi, IPROC_MSI_CTRL, eq); in iproc_msi_disable()
442 iproc_msi_write_reg(msi, IPROC_MSI_CTRL, eq, val); in iproc_msi_disable()
612 msi->grps[i].eq = i; in iproc_msi_init()