Lines Matching refs:dev_err
73 dev_err(dev, "missing core reset property in node\n"); in rockchip_pcie_parse_dt()
80 dev_err(dev, "missing mgmt reset property in node\n"); in rockchip_pcie_parse_dt()
88 dev_err(dev, "missing mgmt-sticky reset property in node\n"); in rockchip_pcie_parse_dt()
95 dev_err(dev, "missing pipe reset property in node\n"); in rockchip_pcie_parse_dt()
102 dev_err(dev, "missing pm reset property in node\n"); in rockchip_pcie_parse_dt()
109 dev_err(dev, "missing pclk reset property in node\n"); in rockchip_pcie_parse_dt()
116 dev_err(dev, "missing aclk reset property in node\n"); in rockchip_pcie_parse_dt()
130 dev_err(dev, "aclk clock not found\n"); in rockchip_pcie_parse_dt()
136 dev_err(dev, "aclk_perf clock not found\n"); in rockchip_pcie_parse_dt()
142 dev_err(dev, "hclk clock not found\n"); in rockchip_pcie_parse_dt()
148 dev_err(dev, "pm clock not found\n"); in rockchip_pcie_parse_dt()
164 dev_err(dev, "assert aclk_rst err %d\n", err); in rockchip_pcie_init_port()
170 dev_err(dev, "assert pclk_rst err %d\n", err); in rockchip_pcie_init_port()
176 dev_err(dev, "assert pm_rst err %d\n", err); in rockchip_pcie_init_port()
183 dev_err(dev, "init phy%d err %d\n", i, err); in rockchip_pcie_init_port()
190 dev_err(dev, "assert core_rst err %d\n", err); in rockchip_pcie_init_port()
196 dev_err(dev, "assert mgmt_rst err %d\n", err); in rockchip_pcie_init_port()
202 dev_err(dev, "assert mgmt_sticky_rst err %d\n", err); in rockchip_pcie_init_port()
208 dev_err(dev, "assert pipe_rst err %d\n", err); in rockchip_pcie_init_port()
216 dev_err(dev, "deassert pm_rst err %d\n", err); in rockchip_pcie_init_port()
222 dev_err(dev, "deassert aclk_rst err %d\n", err); in rockchip_pcie_init_port()
228 dev_err(dev, "deassert pclk_rst err %d\n", err); in rockchip_pcie_init_port()
252 dev_err(dev, "power on phy%d err %d\n", i, err); in rockchip_pcie_init_port()
263 dev_err(dev, "deassert mgmt_sticky_rst err %d\n", err); in rockchip_pcie_init_port()
269 dev_err(dev, "deassert core_rst err %d\n", err); in rockchip_pcie_init_port()
275 dev_err(dev, "deassert mgmt_rst err %d\n", err); in rockchip_pcie_init_port()
281 dev_err(dev, "deassert pipe_rst err %d\n", err); in rockchip_pcie_init_port()
327 dev_err(dev, "missing phy for lane %d: %ld\n", in rockchip_pcie_get_phys()
359 dev_err(dev, "unable to enable aclk_pcie clock\n"); in rockchip_pcie_enable_clocks()
365 dev_err(dev, "unable to enable aclk_perf_pcie clock\n"); in rockchip_pcie_enable_clocks()
371 dev_err(dev, "unable to enable hclk_pcie clock\n"); in rockchip_pcie_enable_clocks()
377 dev_err(dev, "unable to enable clk_pcie_pm clock\n"); in rockchip_pcie_enable_clocks()