Lines Matching refs:integer
176 u32 revision = fields[1].integer.value; in decode_type0_hpx_record()
186 hpx0->cache_line_size = fields[2].integer.value; in decode_type0_hpx_record()
187 hpx0->latency_timer = fields[3].integer.value; in decode_type0_hpx_record()
188 hpx0->enable_serr = fields[4].integer.value; in decode_type0_hpx_record()
189 hpx0->enable_perr = fields[5].integer.value; in decode_type0_hpx_record()
226 u32 revision = fields[1].integer.value; in decode_type1_hpx_record()
236 hpx1->max_mem_read = fields[2].integer.value; in decode_type1_hpx_record()
237 hpx1->avg_max_split = fields[3].integer.value; in decode_type1_hpx_record()
238 hpx1->tot_max_split = fields[4].integer.value; in decode_type1_hpx_record()
375 u32 revision = fields[1].integer.value; in decode_type2_hpx_record()
385 hpx2->unc_err_mask_and = fields[2].integer.value; in decode_type2_hpx_record()
386 hpx2->unc_err_mask_or = fields[3].integer.value; in decode_type2_hpx_record()
387 hpx2->unc_err_sever_and = fields[4].integer.value; in decode_type2_hpx_record()
388 hpx2->unc_err_sever_or = fields[5].integer.value; in decode_type2_hpx_record()
389 hpx2->cor_err_mask_and = fields[6].integer.value; in decode_type2_hpx_record()
390 hpx2->cor_err_mask_or = fields[7].integer.value; in decode_type2_hpx_record()
391 hpx2->adv_err_cap_and = fields[8].integer.value; in decode_type2_hpx_record()
392 hpx2->adv_err_cap_or = fields[9].integer.value; in decode_type2_hpx_record()
393 hpx2->pci_exp_devctl_and = fields[10].integer.value; in decode_type2_hpx_record()
394 hpx2->pci_exp_devctl_or = fields[11].integer.value; in decode_type2_hpx_record()
395 hpx2->pci_exp_lnkctl_and = fields[12].integer.value; in decode_type2_hpx_record()
396 hpx2->pci_exp_lnkctl_or = fields[13].integer.value; in decode_type2_hpx_record()
397 hpx2->sec_unc_err_sever_and = fields[14].integer.value; in decode_type2_hpx_record()
398 hpx2->sec_unc_err_sever_or = fields[15].integer.value; in decode_type2_hpx_record()
399 hpx2->sec_unc_err_mask_and = fields[16].integer.value; in decode_type2_hpx_record()
400 hpx2->sec_unc_err_mask_or = fields[17].integer.value; in decode_type2_hpx_record()
571 hpx3_reg->device_type = reg_fields[0].integer.value; in parse_hpx3_register()
572 hpx3_reg->function_type = reg_fields[1].integer.value; in parse_hpx3_register()
573 hpx3_reg->config_space_location = reg_fields[2].integer.value; in parse_hpx3_register()
574 hpx3_reg->pci_exp_cap_id = reg_fields[3].integer.value; in parse_hpx3_register()
575 hpx3_reg->pci_exp_cap_ver = reg_fields[4].integer.value; in parse_hpx3_register()
576 hpx3_reg->pci_exp_vendor_id = reg_fields[5].integer.value; in parse_hpx3_register()
577 hpx3_reg->dvsec_id = reg_fields[6].integer.value; in parse_hpx3_register()
578 hpx3_reg->dvsec_rev = reg_fields[7].integer.value; in parse_hpx3_register()
579 hpx3_reg->match_offset = reg_fields[8].integer.value; in parse_hpx3_register()
580 hpx3_reg->match_mask_and = reg_fields[9].integer.value; in parse_hpx3_register()
581 hpx3_reg->match_value = reg_fields[10].integer.value; in parse_hpx3_register()
582 hpx3_reg->reg_offset = reg_fields[11].integer.value; in parse_hpx3_register()
583 hpx3_reg->reg_mask_and = reg_fields[12].integer.value; in parse_hpx3_register()
584 hpx3_reg->reg_mask_or = reg_fields[13].integer.value; in parse_hpx3_register()
596 revision = fields[1].integer.value; in program_type3_hpx_record()
599 desc_count = fields[2].integer.value; in program_type3_hpx_record()
660 type = fields[0].integer.value; in acpi_run_hpx()
730 hpx0.cache_line_size = fields[0].integer.value; in acpi_run_hpp()
731 hpx0.latency_timer = fields[1].integer.value; in acpi_run_hpp()
732 hpx0.enable_serr = fields[2].integer.value; in acpi_run_hpp()
733 hpx0.enable_perr = fields[3].integer.value; in acpi_run_hpp()
1006 return obj->integer.value == 1; in acpi_pci_bridge_d3()
1159 if (obj->type == ACPI_TYPE_INTEGER && obj->integer.value == 1) { in acpi_pci_add_bus()
1323 value = (int)elements[0].integer.value / 1000; in pci_acpi_optimize_delay()
1328 value = (int)elements[3].integer.value / 1000; in pci_acpi_optimize_delay()