Lines Matching refs:smmu_pmu
102 struct smmu_pmu { struct
120 #define to_smmu_pmu(p) (container_of(p, struct smmu_pmu, pmu)) argument
136 struct smmu_pmu *smmu_pmu = to_smmu_pmu(pmu); in smmu_pmu_enable() local
139 smmu_pmu->reg_base + SMMU_PMCG_IRQ_CTRL); in smmu_pmu_enable()
140 writel(SMMU_PMCG_CR_ENABLE, smmu_pmu->reg_base + SMMU_PMCG_CR); in smmu_pmu_enable()
145 struct smmu_pmu *smmu_pmu = to_smmu_pmu(pmu); in smmu_pmu_disable() local
147 writel(0, smmu_pmu->reg_base + SMMU_PMCG_CR); in smmu_pmu_disable()
148 writel(0, smmu_pmu->reg_base + SMMU_PMCG_IRQ_CTRL); in smmu_pmu_disable()
151 static inline void smmu_pmu_counter_set_value(struct smmu_pmu *smmu_pmu, in smmu_pmu_counter_set_value() argument
154 if (smmu_pmu->counter_mask & BIT(32)) in smmu_pmu_counter_set_value()
155 writeq(value, smmu_pmu->reloc_base + SMMU_PMCG_EVCNTR(idx, 8)); in smmu_pmu_counter_set_value()
157 writel(value, smmu_pmu->reloc_base + SMMU_PMCG_EVCNTR(idx, 4)); in smmu_pmu_counter_set_value()
160 static inline u64 smmu_pmu_counter_get_value(struct smmu_pmu *smmu_pmu, u32 idx) in smmu_pmu_counter_get_value() argument
164 if (smmu_pmu->counter_mask & BIT(32)) in smmu_pmu_counter_get_value()
165 value = readq(smmu_pmu->reloc_base + SMMU_PMCG_EVCNTR(idx, 8)); in smmu_pmu_counter_get_value()
167 value = readl(smmu_pmu->reloc_base + SMMU_PMCG_EVCNTR(idx, 4)); in smmu_pmu_counter_get_value()
172 static inline void smmu_pmu_counter_enable(struct smmu_pmu *smmu_pmu, u32 idx) in smmu_pmu_counter_enable() argument
174 writeq(BIT(idx), smmu_pmu->reg_base + SMMU_PMCG_CNTENSET0); in smmu_pmu_counter_enable()
177 static inline void smmu_pmu_counter_disable(struct smmu_pmu *smmu_pmu, u32 idx) in smmu_pmu_counter_disable() argument
179 writeq(BIT(idx), smmu_pmu->reg_base + SMMU_PMCG_CNTENCLR0); in smmu_pmu_counter_disable()
182 static inline void smmu_pmu_interrupt_enable(struct smmu_pmu *smmu_pmu, u32 idx) in smmu_pmu_interrupt_enable() argument
184 writeq(BIT(idx), smmu_pmu->reg_base + SMMU_PMCG_INTENSET0); in smmu_pmu_interrupt_enable()
187 static inline void smmu_pmu_interrupt_disable(struct smmu_pmu *smmu_pmu, in smmu_pmu_interrupt_disable() argument
190 writeq(BIT(idx), smmu_pmu->reg_base + SMMU_PMCG_INTENCLR0); in smmu_pmu_interrupt_disable()
193 static inline void smmu_pmu_set_evtyper(struct smmu_pmu *smmu_pmu, u32 idx, in smmu_pmu_set_evtyper() argument
196 writel(val, smmu_pmu->reg_base + SMMU_PMCG_EVTYPER(idx)); in smmu_pmu_set_evtyper()
199 static inline void smmu_pmu_set_smr(struct smmu_pmu *smmu_pmu, u32 idx, u32 val) in smmu_pmu_set_smr() argument
201 writel(val, smmu_pmu->reg_base + SMMU_PMCG_SMR(idx)); in smmu_pmu_set_smr()
207 struct smmu_pmu *smmu_pmu = to_smmu_pmu(event->pmu); in smmu_pmu_event_update() local
213 now = smmu_pmu_counter_get_value(smmu_pmu, idx); in smmu_pmu_event_update()
218 delta &= smmu_pmu->counter_mask; in smmu_pmu_event_update()
223 static void smmu_pmu_set_period(struct smmu_pmu *smmu_pmu, in smmu_pmu_set_period() argument
229 if (smmu_pmu->options & SMMU_PMCG_EVCNTR_RDONLY) { in smmu_pmu_set_period()
237 new = smmu_pmu_counter_get_value(smmu_pmu, idx); in smmu_pmu_set_period()
245 new = smmu_pmu->counter_mask >> 1; in smmu_pmu_set_period()
246 smmu_pmu_counter_set_value(smmu_pmu, idx, new); in smmu_pmu_set_period()
255 struct smmu_pmu *smmu_pmu = to_smmu_pmu(event->pmu); in smmu_pmu_set_event_filter() local
259 smmu_pmu_set_evtyper(smmu_pmu, idx, evtyper); in smmu_pmu_set_event_filter()
260 smmu_pmu_set_smr(smmu_pmu, idx, sid); in smmu_pmu_set_event_filter()
276 static int smmu_pmu_apply_event_filter(struct smmu_pmu *smmu_pmu, in smmu_pmu_apply_event_filter() argument
280 unsigned int cur_idx, num_ctrs = smmu_pmu->num_counters; in smmu_pmu_apply_event_filter()
288 cur_idx = find_first_bit(smmu_pmu->used_counters, num_ctrs); in smmu_pmu_apply_event_filter()
293 if (!smmu_pmu->global_filter || cur_idx == num_ctrs) { in smmu_pmu_apply_event_filter()
299 if (smmu_pmu_check_global_filter(smmu_pmu->events[cur_idx], event)) { in smmu_pmu_apply_event_filter()
300 smmu_pmu_set_evtyper(smmu_pmu, idx, get_event(event)); in smmu_pmu_apply_event_filter()
307 static int smmu_pmu_get_event_idx(struct smmu_pmu *smmu_pmu, in smmu_pmu_get_event_idx() argument
311 unsigned int num_ctrs = smmu_pmu->num_counters; in smmu_pmu_get_event_idx()
313 idx = find_first_zero_bit(smmu_pmu->used_counters, num_ctrs); in smmu_pmu_get_event_idx()
318 err = smmu_pmu_apply_event_filter(smmu_pmu, event, idx); in smmu_pmu_get_event_idx()
322 set_bit(idx, smmu_pmu->used_counters); in smmu_pmu_get_event_idx()
348 struct smmu_pmu *smmu_pmu = to_smmu_pmu(event->pmu); in smmu_pmu_event_init() local
349 struct device *dev = smmu_pmu->dev; in smmu_pmu_event_init()
370 (!test_bit(event_id, smmu_pmu->supported_events))) { in smmu_pmu_event_init()
380 if (++group_num_events > smmu_pmu->num_counters) in smmu_pmu_event_init()
391 if (++group_num_events > smmu_pmu->num_counters) in smmu_pmu_event_init()
401 event->cpu = smmu_pmu->on_cpu; in smmu_pmu_event_init()
408 struct smmu_pmu *smmu_pmu = to_smmu_pmu(event->pmu); in smmu_pmu_event_start() local
414 smmu_pmu_set_period(smmu_pmu, hwc); in smmu_pmu_event_start()
416 smmu_pmu_counter_enable(smmu_pmu, idx); in smmu_pmu_event_start()
421 struct smmu_pmu *smmu_pmu = to_smmu_pmu(event->pmu); in smmu_pmu_event_stop() local
428 smmu_pmu_counter_disable(smmu_pmu, idx); in smmu_pmu_event_stop()
438 struct smmu_pmu *smmu_pmu = to_smmu_pmu(event->pmu); in smmu_pmu_event_add() local
440 idx = smmu_pmu_get_event_idx(smmu_pmu, event); in smmu_pmu_event_add()
446 smmu_pmu->events[idx] = event; in smmu_pmu_event_add()
449 smmu_pmu_interrupt_enable(smmu_pmu, idx); in smmu_pmu_event_add()
463 struct smmu_pmu *smmu_pmu = to_smmu_pmu(event->pmu); in smmu_pmu_event_del() local
467 smmu_pmu_interrupt_disable(smmu_pmu, idx); in smmu_pmu_event_del()
468 smmu_pmu->events[idx] = NULL; in smmu_pmu_event_del()
469 clear_bit(idx, smmu_pmu->used_counters); in smmu_pmu_event_del()
485 struct smmu_pmu *smmu_pmu = to_smmu_pmu(dev_get_drvdata(dev)); in smmu_pmu_cpumask_show() local
487 return cpumap_print_to_pagebuf(true, buf, cpumask_of(smmu_pmu->on_cpu)); in smmu_pmu_cpumask_show()
533 struct smmu_pmu *smmu_pmu = to_smmu_pmu(dev_get_drvdata(dev)); in smmu_pmu_event_is_visible() local
538 if (test_bit(pmu_attr->id, smmu_pmu->supported_events)) in smmu_pmu_event_is_visible()
554 struct smmu_pmu *smmu_pmu = to_smmu_pmu(dev_get_drvdata(dev)); in smmu_pmu_identifier_attr_show() local
556 return sysfs_emit(page, "0x%08x\n", smmu_pmu->iidr); in smmu_pmu_identifier_attr_show()
564 struct smmu_pmu *smmu_pmu = to_smmu_pmu(dev_get_drvdata(dev)); in smmu_pmu_identifier_attr_visible() local
566 if (!smmu_pmu->iidr) in smmu_pmu_identifier_attr_visible()
617 struct smmu_pmu *smmu_pmu; in smmu_pmu_offline_cpu() local
620 smmu_pmu = hlist_entry_safe(node, struct smmu_pmu, node); in smmu_pmu_offline_cpu()
621 if (cpu != smmu_pmu->on_cpu) in smmu_pmu_offline_cpu()
628 perf_pmu_migrate_context(&smmu_pmu->pmu, cpu, target); in smmu_pmu_offline_cpu()
629 smmu_pmu->on_cpu = target; in smmu_pmu_offline_cpu()
630 WARN_ON(irq_set_affinity(smmu_pmu->irq, cpumask_of(target))); in smmu_pmu_offline_cpu()
637 struct smmu_pmu *smmu_pmu = data; in smmu_pmu_handle_irq() local
641 ovsr = readq(smmu_pmu->reloc_base + SMMU_PMCG_OVSSET0); in smmu_pmu_handle_irq()
645 writeq(ovsr, smmu_pmu->reloc_base + SMMU_PMCG_OVSCLR0); in smmu_pmu_handle_irq()
647 for_each_set_bit(idx, (unsigned long *)&ovsr, smmu_pmu->num_counters) { in smmu_pmu_handle_irq()
648 struct perf_event *event = smmu_pmu->events[idx]; in smmu_pmu_handle_irq()
657 smmu_pmu_set_period(smmu_pmu, hwc); in smmu_pmu_handle_irq()
674 struct smmu_pmu *pmu = dev_get_drvdata(dev); in smmu_pmu_write_msi_msg()
685 static void smmu_pmu_setup_msi(struct smmu_pmu *pmu) in smmu_pmu_setup_msi()
712 static int smmu_pmu_setup_irq(struct smmu_pmu *pmu) in smmu_pmu_setup_irq()
726 static void smmu_pmu_reset(struct smmu_pmu *smmu_pmu) in smmu_pmu_reset() argument
728 u64 counter_present_mask = GENMASK_ULL(smmu_pmu->num_counters - 1, 0); in smmu_pmu_reset()
730 smmu_pmu_disable(&smmu_pmu->pmu); in smmu_pmu_reset()
734 smmu_pmu->reg_base + SMMU_PMCG_CNTENCLR0); in smmu_pmu_reset()
736 smmu_pmu->reg_base + SMMU_PMCG_INTENCLR0); in smmu_pmu_reset()
738 smmu_pmu->reloc_base + SMMU_PMCG_OVSCLR0); in smmu_pmu_reset()
741 static void smmu_pmu_get_acpi_options(struct smmu_pmu *smmu_pmu) in smmu_pmu_get_acpi_options() argument
745 model = *(u32 *)dev_get_platdata(smmu_pmu->dev); in smmu_pmu_get_acpi_options()
750 smmu_pmu->options |= SMMU_PMCG_EVCNTR_RDONLY; in smmu_pmu_get_acpi_options()
754 dev_notice(smmu_pmu->dev, "option mask 0x%x\n", smmu_pmu->options); in smmu_pmu_get_acpi_options()
759 struct smmu_pmu *smmu_pmu; in smmu_pmu_probe() local
767 smmu_pmu = devm_kzalloc(dev, sizeof(*smmu_pmu), GFP_KERNEL); in smmu_pmu_probe()
768 if (!smmu_pmu) in smmu_pmu_probe()
771 smmu_pmu->dev = dev; in smmu_pmu_probe()
772 platform_set_drvdata(pdev, smmu_pmu); in smmu_pmu_probe()
774 smmu_pmu->pmu = (struct pmu) { in smmu_pmu_probe()
789 smmu_pmu->reg_base = devm_platform_get_and_ioremap_resource(pdev, 0, &res_0); in smmu_pmu_probe()
790 if (IS_ERR(smmu_pmu->reg_base)) in smmu_pmu_probe()
791 return PTR_ERR(smmu_pmu->reg_base); in smmu_pmu_probe()
793 cfgr = readl_relaxed(smmu_pmu->reg_base + SMMU_PMCG_CFGR); in smmu_pmu_probe()
797 smmu_pmu->reloc_base = devm_platform_ioremap_resource(pdev, 1); in smmu_pmu_probe()
798 if (IS_ERR(smmu_pmu->reloc_base)) in smmu_pmu_probe()
799 return PTR_ERR(smmu_pmu->reloc_base); in smmu_pmu_probe()
801 smmu_pmu->reloc_base = smmu_pmu->reg_base; in smmu_pmu_probe()
806 smmu_pmu->irq = irq; in smmu_pmu_probe()
808 ceid_64[0] = readq_relaxed(smmu_pmu->reg_base + SMMU_PMCG_CEID0); in smmu_pmu_probe()
809 ceid_64[1] = readq_relaxed(smmu_pmu->reg_base + SMMU_PMCG_CEID1); in smmu_pmu_probe()
810 bitmap_from_arr32(smmu_pmu->supported_events, (u32 *)ceid_64, in smmu_pmu_probe()
813 smmu_pmu->num_counters = FIELD_GET(SMMU_PMCG_CFGR_NCTR, cfgr) + 1; in smmu_pmu_probe()
815 smmu_pmu->global_filter = !!(cfgr & SMMU_PMCG_CFGR_SID_FILTER_TYPE); in smmu_pmu_probe()
818 smmu_pmu->counter_mask = GENMASK_ULL(reg_size, 0); in smmu_pmu_probe()
820 smmu_pmu_reset(smmu_pmu); in smmu_pmu_probe()
822 err = smmu_pmu_setup_irq(smmu_pmu); in smmu_pmu_probe()
828 smmu_pmu->iidr = readl_relaxed(smmu_pmu->reg_base + SMMU_PMCG_IIDR); in smmu_pmu_probe()
837 smmu_pmu_get_acpi_options(smmu_pmu); in smmu_pmu_probe()
840 smmu_pmu->on_cpu = raw_smp_processor_id(); in smmu_pmu_probe()
841 WARN_ON(irq_set_affinity(smmu_pmu->irq, cpumask_of(smmu_pmu->on_cpu))); in smmu_pmu_probe()
844 &smmu_pmu->node); in smmu_pmu_probe()
851 err = perf_pmu_register(&smmu_pmu->pmu, name, -1); in smmu_pmu_probe()
859 &res_0->start, smmu_pmu->num_counters, in smmu_pmu_probe()
860 smmu_pmu->global_filter ? "Global(Counter0)" : in smmu_pmu_probe()
866 cpuhp_state_remove_instance_nocalls(cpuhp_state_num, &smmu_pmu->node); in smmu_pmu_probe()
872 struct smmu_pmu *smmu_pmu = platform_get_drvdata(pdev); in smmu_pmu_remove() local
874 perf_pmu_unregister(&smmu_pmu->pmu); in smmu_pmu_remove()
875 cpuhp_state_remove_instance_nocalls(cpuhp_state_num, &smmu_pmu->node); in smmu_pmu_remove()
882 struct smmu_pmu *smmu_pmu = platform_get_drvdata(pdev); in smmu_pmu_shutdown() local
884 smmu_pmu_disable(&smmu_pmu->pmu); in smmu_pmu_shutdown()