Lines Matching refs:eint
51 static void __iomem *mtk_eint_get_offset(struct mtk_eint *eint, in mtk_eint_get_offset() argument
58 if (eint_num >= eint->hw->ap_num) in mtk_eint_get_offset()
59 eint_base = eint->hw->ap_num; in mtk_eint_get_offset()
61 reg = eint->base + offset + ((eint_num - eint_base) / 32) * 4; in mtk_eint_get_offset()
66 static unsigned int mtk_eint_can_en_debounce(struct mtk_eint *eint, in mtk_eint_can_en_debounce() argument
71 void __iomem *reg = mtk_eint_get_offset(eint, eint_num, in mtk_eint_can_en_debounce()
72 eint->regs->sens); in mtk_eint_can_en_debounce()
79 if (eint_num < eint->hw->db_cnt && sens != MTK_EINT_EDGE_SENSITIVE) in mtk_eint_can_en_debounce()
85 static int mtk_eint_flip_edge(struct mtk_eint *eint, int hwirq) in mtk_eint_flip_edge() argument
90 u32 port = (hwirq >> 5) & eint->hw->port_mask; in mtk_eint_flip_edge()
91 void __iomem *reg = eint->base + (port << 2); in mtk_eint_flip_edge()
93 curr_level = eint->gpio_xlate->get_gpio_state(eint->pctl, hwirq); in mtk_eint_flip_edge()
98 reg_offset = eint->regs->pol_clr; in mtk_eint_flip_edge()
100 reg_offset = eint->regs->pol_set; in mtk_eint_flip_edge()
103 curr_level = eint->gpio_xlate->get_gpio_state(eint->pctl, in mtk_eint_flip_edge()
112 struct mtk_eint *eint = irq_data_get_irq_chip_data(d); in mtk_eint_mask() local
114 void __iomem *reg = mtk_eint_get_offset(eint, d->hwirq, in mtk_eint_mask()
115 eint->regs->mask_set); in mtk_eint_mask()
117 eint->cur_mask[d->hwirq >> 5] &= ~mask; in mtk_eint_mask()
124 struct mtk_eint *eint = irq_data_get_irq_chip_data(d); in mtk_eint_unmask() local
126 void __iomem *reg = mtk_eint_get_offset(eint, d->hwirq, in mtk_eint_unmask()
127 eint->regs->mask_clr); in mtk_eint_unmask()
129 eint->cur_mask[d->hwirq >> 5] |= mask; in mtk_eint_unmask()
133 if (eint->dual_edge[d->hwirq]) in mtk_eint_unmask()
134 mtk_eint_flip_edge(eint, d->hwirq); in mtk_eint_unmask()
137 static unsigned int mtk_eint_get_mask(struct mtk_eint *eint, in mtk_eint_get_mask() argument
141 void __iomem *reg = mtk_eint_get_offset(eint, eint_num, in mtk_eint_get_mask()
142 eint->regs->mask); in mtk_eint_get_mask()
149 struct mtk_eint *eint = irq_data_get_irq_chip_data(d); in mtk_eint_ack() local
151 void __iomem *reg = mtk_eint_get_offset(eint, d->hwirq, in mtk_eint_ack()
152 eint->regs->ack); in mtk_eint_ack()
159 struct mtk_eint *eint = irq_data_get_irq_chip_data(d); in mtk_eint_set_type() local
166 dev_err(eint->dev, in mtk_eint_set_type()
173 eint->dual_edge[d->hwirq] = 1; in mtk_eint_set_type()
175 eint->dual_edge[d->hwirq] = 0; in mtk_eint_set_type()
177 if (!mtk_eint_get_mask(eint, d->hwirq)) { in mtk_eint_set_type()
185 reg = mtk_eint_get_offset(eint, d->hwirq, eint->regs->pol_clr); in mtk_eint_set_type()
188 reg = mtk_eint_get_offset(eint, d->hwirq, eint->regs->pol_set); in mtk_eint_set_type()
193 reg = mtk_eint_get_offset(eint, d->hwirq, eint->regs->sens_clr); in mtk_eint_set_type()
196 reg = mtk_eint_get_offset(eint, d->hwirq, eint->regs->sens_set); in mtk_eint_set_type()
209 struct mtk_eint *eint = irq_data_get_irq_chip_data(d); in mtk_eint_irq_set_wake() local
214 eint->wake_mask[reg] |= BIT(shift); in mtk_eint_irq_set_wake()
216 eint->wake_mask[reg] &= ~BIT(shift); in mtk_eint_irq_set_wake()
221 static void mtk_eint_chip_write_mask(const struct mtk_eint *eint, in mtk_eint_chip_write_mask() argument
227 for (port = 0; port < eint->hw->ports; port++) { in mtk_eint_chip_write_mask()
229 writel_relaxed(~buf[port], reg + eint->regs->mask_set); in mtk_eint_chip_write_mask()
230 writel_relaxed(buf[port], reg + eint->regs->mask_clr); in mtk_eint_chip_write_mask()
236 struct mtk_eint *eint = irq_data_get_irq_chip_data(d); in mtk_eint_irq_request_resources() local
241 err = eint->gpio_xlate->get_gpio_n(eint->pctl, d->hwirq, in mtk_eint_irq_request_resources()
244 dev_err(eint->dev, "Can not find pin\n"); in mtk_eint_irq_request_resources()
250 dev_err(eint->dev, "unable to lock HW IRQ %lu for IRQ\n", in mtk_eint_irq_request_resources()
255 err = eint->gpio_xlate->set_gpio_as_eint(eint->pctl, d->hwirq); in mtk_eint_irq_request_resources()
257 dev_err(eint->dev, "Can not eint mode\n"); in mtk_eint_irq_request_resources()
266 struct mtk_eint *eint = irq_data_get_irq_chip_data(d); in mtk_eint_irq_release_resources() local
270 eint->gpio_xlate->get_gpio_n(eint->pctl, d->hwirq, &gpio_n, in mtk_eint_irq_release_resources()
288 static unsigned int mtk_eint_hw_init(struct mtk_eint *eint) in mtk_eint_hw_init() argument
290 void __iomem *reg = eint->base + eint->regs->dom_en; in mtk_eint_hw_init()
293 for (i = 0; i < eint->hw->ap_num; i += 32) { in mtk_eint_hw_init()
302 mtk_eint_debounce_process(struct mtk_eint *eint, int index) in mtk_eint_debounce_process() argument
307 ctrl_offset = (index / 4) * 4 + eint->regs->dbnc_ctrl; in mtk_eint_debounce_process()
308 dbnc = readl(eint->base + ctrl_offset); in mtk_eint_debounce_process()
311 ctrl_offset = (index / 4) * 4 + eint->regs->dbnc_set; in mtk_eint_debounce_process()
313 writel(rst, eint->base + ctrl_offset); in mtk_eint_debounce_process()
320 struct mtk_eint *eint = irq_desc_get_handler_data(desc); in mtk_eint_irq_handler() local
323 void __iomem *reg = mtk_eint_get_offset(eint, 0, eint->regs->stat); in mtk_eint_irq_handler()
327 for (eint_num = 0; eint_num < eint->hw->ap_num; eint_num += 32, in mtk_eint_irq_handler()
342 if (eint->wake_mask[mask_offset] & BIT(offset) && in mtk_eint_irq_handler()
343 !(eint->cur_mask[mask_offset] & BIT(offset))) { in mtk_eint_irq_handler()
345 eint->regs->stat + in mtk_eint_irq_handler()
346 eint->regs->mask_set); in mtk_eint_irq_handler()
349 dual_edge = eint->dual_edge[index]; in mtk_eint_irq_handler()
355 writel(BIT(offset), reg - eint->regs->stat + in mtk_eint_irq_handler()
356 eint->regs->soft_clr); in mtk_eint_irq_handler()
359 eint->gpio_xlate->get_gpio_state(eint->pctl, in mtk_eint_irq_handler()
363 generic_handle_domain_irq(eint->domain, index); in mtk_eint_irq_handler()
366 curr_level = mtk_eint_flip_edge(eint, index); in mtk_eint_irq_handler()
374 eint->regs->stat + in mtk_eint_irq_handler()
375 eint->regs->soft_set); in mtk_eint_irq_handler()
378 if (index < eint->hw->db_cnt) in mtk_eint_irq_handler()
379 mtk_eint_debounce_process(eint, index); in mtk_eint_irq_handler()
385 int mtk_eint_do_suspend(struct mtk_eint *eint) in mtk_eint_do_suspend() argument
387 mtk_eint_chip_write_mask(eint, eint->base, eint->wake_mask); in mtk_eint_do_suspend()
393 int mtk_eint_do_resume(struct mtk_eint *eint) in mtk_eint_do_resume() argument
395 mtk_eint_chip_write_mask(eint, eint->base, eint->cur_mask); in mtk_eint_do_resume()
401 int mtk_eint_set_debounce(struct mtk_eint *eint, unsigned long eint_num, in mtk_eint_set_debounce() argument
411 virq = irq_find_mapping(eint->domain, eint_num); in mtk_eint_set_debounce()
415 set_offset = (eint_num / 4) * 4 + eint->regs->dbnc_set; in mtk_eint_set_debounce()
416 clr_offset = (eint_num / 4) * 4 + eint->regs->dbnc_clr; in mtk_eint_set_debounce()
418 if (!mtk_eint_can_en_debounce(eint, eint_num)) in mtk_eint_set_debounce()
429 if (!mtk_eint_get_mask(eint, eint_num)) { in mtk_eint_set_debounce()
437 writel(clr_bit, eint->base + clr_offset); in mtk_eint_set_debounce()
442 writel(rst | bit, eint->base + set_offset); in mtk_eint_set_debounce()
456 int mtk_eint_find_irq(struct mtk_eint *eint, unsigned long eint_n) in mtk_eint_find_irq() argument
460 irq = irq_find_mapping(eint->domain, eint_n); in mtk_eint_find_irq()
468 int mtk_eint_do_init(struct mtk_eint *eint) in mtk_eint_do_init() argument
473 if (!eint->regs) in mtk_eint_do_init()
474 eint->regs = &mtk_generic_eint_regs; in mtk_eint_do_init()
476 eint->wake_mask = devm_kcalloc(eint->dev, eint->hw->ports, in mtk_eint_do_init()
477 sizeof(*eint->wake_mask), GFP_KERNEL); in mtk_eint_do_init()
478 if (!eint->wake_mask) in mtk_eint_do_init()
481 eint->cur_mask = devm_kcalloc(eint->dev, eint->hw->ports, in mtk_eint_do_init()
482 sizeof(*eint->cur_mask), GFP_KERNEL); in mtk_eint_do_init()
483 if (!eint->cur_mask) in mtk_eint_do_init()
486 eint->dual_edge = devm_kcalloc(eint->dev, eint->hw->ap_num, in mtk_eint_do_init()
488 if (!eint->dual_edge) in mtk_eint_do_init()
491 eint->domain = irq_domain_add_linear(eint->dev->of_node, in mtk_eint_do_init()
492 eint->hw->ap_num, in mtk_eint_do_init()
494 if (!eint->domain) in mtk_eint_do_init()
497 mtk_eint_hw_init(eint); in mtk_eint_do_init()
498 for (i = 0; i < eint->hw->ap_num; i++) { in mtk_eint_do_init()
499 int virq = irq_create_mapping(eint->domain, i); in mtk_eint_do_init()
503 irq_set_chip_data(virq, eint); in mtk_eint_do_init()
506 irq_set_chained_handler_and_data(eint->irq, mtk_eint_irq_handler, in mtk_eint_do_init()
507 eint); in mtk_eint_do_init()