Lines Matching refs:gctrl
27 struct eqbr_gpio_ctrl *gctrl = gpiochip_get_data(gc); in eqbr_gpio_disable_irq() local
31 raw_spin_lock_irqsave(&gctrl->lock, flags); in eqbr_gpio_disable_irq()
32 writel(BIT(offset), gctrl->membase + GPIO_IRNENCLR); in eqbr_gpio_disable_irq()
33 raw_spin_unlock_irqrestore(&gctrl->lock, flags); in eqbr_gpio_disable_irq()
39 struct eqbr_gpio_ctrl *gctrl = gpiochip_get_data(gc); in eqbr_gpio_enable_irq() local
44 raw_spin_lock_irqsave(&gctrl->lock, flags); in eqbr_gpio_enable_irq()
45 writel(BIT(offset), gctrl->membase + GPIO_IRNRNSET); in eqbr_gpio_enable_irq()
46 raw_spin_unlock_irqrestore(&gctrl->lock, flags); in eqbr_gpio_enable_irq()
52 struct eqbr_gpio_ctrl *gctrl = gpiochip_get_data(gc); in eqbr_gpio_ack_irq() local
56 raw_spin_lock_irqsave(&gctrl->lock, flags); in eqbr_gpio_ack_irq()
57 writel(BIT(offset), gctrl->membase + GPIO_IRNCR); in eqbr_gpio_ack_irq()
58 raw_spin_unlock_irqrestore(&gctrl->lock, flags); in eqbr_gpio_ack_irq()
77 struct eqbr_gpio_ctrl *gctrl, in eqbr_irq_type_cfg() argument
82 raw_spin_lock_irqsave(&gctrl->lock, flags); in eqbr_irq_type_cfg()
83 eqbr_cfg_bit(gctrl->membase + GPIO_IRNCFG, offset, type->trig_type); in eqbr_irq_type_cfg()
84 eqbr_cfg_bit(gctrl->membase + GPIO_EXINTCR1, offset, type->trig_type); in eqbr_irq_type_cfg()
85 eqbr_cfg_bit(gctrl->membase + GPIO_EXINTCR0, offset, type->logic_type); in eqbr_irq_type_cfg()
86 raw_spin_unlock_irqrestore(&gctrl->lock, flags); in eqbr_irq_type_cfg()
94 struct eqbr_gpio_ctrl *gctrl = gpiochip_get_data(gc); in eqbr_gpio_set_irq_type() local
138 eqbr_irq_type_cfg(&it, gctrl, offset); in eqbr_gpio_set_irq_type()
150 struct eqbr_gpio_ctrl *gctrl = gpiochip_get_data(gc); in eqbr_irq_handler() local
155 pins = readl(gctrl->membase + GPIO_IRNCR); in eqbr_irq_handler()
163 static int gpiochip_setup(struct device *dev, struct eqbr_gpio_ctrl *gctrl) in gpiochip_setup() argument
168 gc = &gctrl->chip; in gpiochip_setup()
169 gc->label = gctrl->name; in gpiochip_setup()
171 gc->of_node = gctrl->node; in gpiochip_setup()
174 if (!of_property_read_bool(gctrl->node, "interrupt-controller")) { in gpiochip_setup()
176 gctrl->name); in gpiochip_setup()
180 gctrl->ic.name = "gpio_irq"; in gpiochip_setup()
181 gctrl->ic.irq_mask = eqbr_gpio_disable_irq; in gpiochip_setup()
182 gctrl->ic.irq_unmask = eqbr_gpio_enable_irq; in gpiochip_setup()
183 gctrl->ic.irq_ack = eqbr_gpio_ack_irq; in gpiochip_setup()
184 gctrl->ic.irq_mask_ack = eqbr_gpio_mask_ack_irq; in gpiochip_setup()
185 gctrl->ic.irq_set_type = eqbr_gpio_set_irq_type; in gpiochip_setup()
187 girq = &gctrl->chip.irq; in gpiochip_setup()
188 girq->chip = &gctrl->ic; in gpiochip_setup()
197 girq->parents[0] = gctrl->virq; in gpiochip_setup()
205 struct eqbr_gpio_ctrl *gctrl; in gpiolib_reg() local
211 gctrl = drvdata->gpio_ctrls + i; in gpiolib_reg()
212 np = gctrl->node; in gpiolib_reg()
214 gctrl->name = devm_kasprintf(dev, GFP_KERNEL, "gpiochip%d", i); in gpiolib_reg()
215 if (!gctrl->name) in gpiolib_reg()
223 gctrl->membase = devm_ioremap_resource(dev, &res); in gpiolib_reg()
224 if (IS_ERR(gctrl->membase)) in gpiolib_reg()
225 return PTR_ERR(gctrl->membase); in gpiolib_reg()
227 gctrl->virq = irq_of_parse_and_map(np, 0); in gpiolib_reg()
228 if (!gctrl->virq) { in gpiolib_reg()
230 gctrl->name); in gpiolib_reg()
233 raw_spin_lock_init(&gctrl->lock); in gpiolib_reg()
235 ret = bgpio_init(&gctrl->chip, dev, gctrl->bank->nr_pins / 8, in gpiolib_reg()
236 gctrl->membase + GPIO_IN, in gpiolib_reg()
237 gctrl->membase + GPIO_OUTSET, in gpiolib_reg()
238 gctrl->membase + GPIO_OUTCLR, in gpiolib_reg()
239 gctrl->membase + GPIO_DIR, in gpiolib_reg()
246 ret = gpiochip_setup(dev, gctrl); in gpiolib_reg()
250 ret = devm_gpiochip_add_data(dev, &gctrl->chip, gctrl); in gpiolib_reg()
380 struct eqbr_gpio_ctrl *gctrl; in eqbr_pinconf_get() local
420 gctrl = get_gpio_ctrls_via_bank(pctl, bank); in eqbr_pinconf_get()
421 if (!gctrl) { in eqbr_pinconf_get()
427 val = !!(readl(gctrl->membase + GPIO_DIR) & BIT(offset)); in eqbr_pinconf_get()
443 struct eqbr_gpio_ctrl *gctrl; in eqbr_pinconf_set() local
489 gctrl = get_gpio_ctrls_via_bank(pctl, bank); in eqbr_pinconf_set()
490 if (!gctrl) { in eqbr_pinconf_set()
495 gc = &gctrl->chip; in eqbr_pinconf_set()