Lines Matching refs:kp

82 static void kona_pwmc_prepare_for_settings(struct kona_pwmc *kp,  in kona_pwmc_prepare_for_settings()  argument
85 unsigned int value = readl(kp->base + PWM_CONTROL_OFFSET); in kona_pwmc_prepare_for_settings()
89 writel(value, kp->base + PWM_CONTROL_OFFSET); in kona_pwmc_prepare_for_settings()
98 static void kona_pwmc_apply_settings(struct kona_pwmc *kp, unsigned int chan) in kona_pwmc_apply_settings() argument
100 unsigned int value = readl(kp->base + PWM_CONTROL_OFFSET); in kona_pwmc_apply_settings()
105 writel(value, kp->base + PWM_CONTROL_OFFSET); in kona_pwmc_apply_settings()
114 struct kona_pwmc *kp = to_kona_pwmc(chip); in kona_pwmc_config() local
130 rate = clk_get_rate(kp->clk); in kona_pwmc_config()
159 kona_pwmc_prepare_for_settings(kp, chan); in kona_pwmc_config()
161 value = readl(kp->base + PRESCALE_OFFSET); in kona_pwmc_config()
164 writel(value, kp->base + PRESCALE_OFFSET); in kona_pwmc_config()
166 writel(pc, kp->base + PERIOD_COUNT_OFFSET(chan)); in kona_pwmc_config()
168 writel(dc, kp->base + DUTY_CYCLE_HIGH_OFFSET(chan)); in kona_pwmc_config()
170 kona_pwmc_apply_settings(kp, chan); in kona_pwmc_config()
179 struct kona_pwmc *kp = to_kona_pwmc(chip); in kona_pwmc_set_polarity() local
184 ret = clk_prepare_enable(kp->clk); in kona_pwmc_set_polarity()
190 kona_pwmc_prepare_for_settings(kp, chan); in kona_pwmc_set_polarity()
192 value = readl(kp->base + PWM_CONTROL_OFFSET); in kona_pwmc_set_polarity()
199 writel(value, kp->base + PWM_CONTROL_OFFSET); in kona_pwmc_set_polarity()
201 kona_pwmc_apply_settings(kp, chan); in kona_pwmc_set_polarity()
203 clk_disable_unprepare(kp->clk); in kona_pwmc_set_polarity()
210 struct kona_pwmc *kp = to_kona_pwmc(chip); in kona_pwmc_enable() local
213 ret = clk_prepare_enable(kp->clk); in kona_pwmc_enable()
222 clk_disable_unprepare(kp->clk); in kona_pwmc_enable()
231 struct kona_pwmc *kp = to_kona_pwmc(chip); in kona_pwmc_disable() local
235 kona_pwmc_prepare_for_settings(kp, chan); in kona_pwmc_disable()
238 writel(0, kp->base + DUTY_CYCLE_HIGH_OFFSET(chan)); in kona_pwmc_disable()
239 writel(0, kp->base + PERIOD_COUNT_OFFSET(chan)); in kona_pwmc_disable()
242 value = readl(kp->base + PRESCALE_OFFSET); in kona_pwmc_disable()
244 writel(value, kp->base + PRESCALE_OFFSET); in kona_pwmc_disable()
246 kona_pwmc_apply_settings(kp, chan); in kona_pwmc_disable()
248 clk_disable_unprepare(kp->clk); in kona_pwmc_disable()
261 struct kona_pwmc *kp; in kona_pwmc_probe() local
266 kp = devm_kzalloc(&pdev->dev, sizeof(*kp), GFP_KERNEL); in kona_pwmc_probe()
267 if (kp == NULL) in kona_pwmc_probe()
270 kp->chip.dev = &pdev->dev; in kona_pwmc_probe()
271 kp->chip.ops = &kona_pwm_ops; in kona_pwmc_probe()
272 kp->chip.npwm = 6; in kona_pwmc_probe()
274 kp->base = devm_platform_ioremap_resource(pdev, 0); in kona_pwmc_probe()
275 if (IS_ERR(kp->base)) in kona_pwmc_probe()
276 return PTR_ERR(kp->base); in kona_pwmc_probe()
278 kp->clk = devm_clk_get(&pdev->dev, NULL); in kona_pwmc_probe()
279 if (IS_ERR(kp->clk)) { in kona_pwmc_probe()
281 PTR_ERR(kp->clk)); in kona_pwmc_probe()
282 return PTR_ERR(kp->clk); in kona_pwmc_probe()
285 ret = clk_prepare_enable(kp->clk); in kona_pwmc_probe()
292 for (chan = 0; chan < kp->chip.npwm; chan++) in kona_pwmc_probe()
295 writel(value, kp->base + PWM_CONTROL_OFFSET); in kona_pwmc_probe()
297 clk_disable_unprepare(kp->clk); in kona_pwmc_probe()
299 ret = devm_pwmchip_add(&pdev->dev, &kp->chip); in kona_pwmc_probe()