Lines Matching refs:sge
58 csio_get_flbuf_size(struct csio_hw *hw, struct csio_sge *sge, uint32_t reg) in csio_get_flbuf_size() argument
60 sge->sge_fl_buf_size[reg] = csio_rd_reg32(hw, SGE_FL_BUFFER_SIZE0_A + in csio_get_flbuf_size()
66 csio_wr_fl_bufsz(struct csio_sge *sge, struct csio_dma_buf *buf) in csio_wr_fl_bufsz() argument
68 return sge->sge_fl_buf_size[buf->paddr & 0xF]; in csio_wr_fl_bufsz()
75 return (hw->wrm.sge.sge_control & EGRSTATUSPAGESIZE_F) ? 128 : 64; in csio_wr_qstat_pgsz()
118 struct csio_sge *sge = &wrm->sge; in csio_wr_fill_fl() local
126 buf->len = sge->sge_fl_buf_size[sreg]; in csio_wr_fill_fl()
1050 struct csio_sge *sge = &wrm->sge; in csio_wr_process_fl() local
1076 bufsz = csio_wr_fl_bufsz(sge, buf); in csio_wr_process_fl()
1097 flq->un.fl.offset += ALIGN(lastlen, sge->csio_fl_align); in csio_wr_process_fl()
1313 struct csio_sge *sge = &wrm->sge; in csio_wr_fixup_host_params() local
1419 sge->csio_fl_align = fl_align; in csio_wr_fixup_host_params()
1436 struct csio_sge *sge = &wrm->sge; in csio_init_intr_coalesce_parms() local
1438 csio_sge_thresh_reg = csio_closest_thresh(sge, csio_intr_coalesce_cnt); in csio_init_intr_coalesce_parms()
1445 csio_sge_timer_reg = csio_closest_timer(sge, csio_intr_coalesce_time); in csio_init_intr_coalesce_parms()
1458 struct csio_sge *sge = &wrm->sge; in csio_wr_get_sge() local
1464 sge->sge_control = csio_rd_reg32(hw, SGE_CONTROL_A); in csio_wr_get_sge()
1466 ingpad = INGPADBOUNDARY_G(sge->sge_control); in csio_wr_get_sge()
1470 sge->csio_fl_align = 32; break; in csio_wr_get_sge()
1472 sge->csio_fl_align = 64; break; in csio_wr_get_sge()
1474 sge->csio_fl_align = 128; break; in csio_wr_get_sge()
1476 sge->csio_fl_align = 256; break; in csio_wr_get_sge()
1478 sge->csio_fl_align = 512; break; in csio_wr_get_sge()
1480 sge->csio_fl_align = 1024; break; in csio_wr_get_sge()
1482 sge->csio_fl_align = 2048; break; in csio_wr_get_sge()
1484 sge->csio_fl_align = 4096; break; in csio_wr_get_sge()
1488 csio_get_flbuf_size(hw, sge, i); in csio_wr_get_sge()
1494 sge->timer_val[0] = (uint16_t)csio_core_ticks_to_us(hw, in csio_wr_get_sge()
1496 sge->timer_val[1] = (uint16_t)csio_core_ticks_to_us(hw, in csio_wr_get_sge()
1498 sge->timer_val[2] = (uint16_t)csio_core_ticks_to_us(hw, in csio_wr_get_sge()
1500 sge->timer_val[3] = (uint16_t)csio_core_ticks_to_us(hw, in csio_wr_get_sge()
1502 sge->timer_val[4] = (uint16_t)csio_core_ticks_to_us(hw, in csio_wr_get_sge()
1504 sge->timer_val[5] = (uint16_t)csio_core_ticks_to_us(hw, in csio_wr_get_sge()
1508 sge->counter_val[0] = THRESHOLD_0_G(ingress_rx_threshold); in csio_wr_get_sge()
1509 sge->counter_val[1] = THRESHOLD_1_G(ingress_rx_threshold); in csio_wr_get_sge()
1510 sge->counter_val[2] = THRESHOLD_2_G(ingress_rx_threshold); in csio_wr_get_sge()
1511 sge->counter_val[3] = THRESHOLD_3_G(ingress_rx_threshold); in csio_wr_get_sge()
1527 struct csio_sge *sge = &wrm->sge; in csio_wr_set_sge() local
1536 sge->sge_control = csio_rd_reg32(hw, SGE_CONTROL_A); in csio_wr_set_sge()
1557 csio_wr_reg32(hw, (CSIO_SGE_FLBUF_SIZE2 + sge->csio_fl_align - 1) in csio_wr_set_sge()
1558 & ~(sge->csio_fl_align - 1), SGE_FL_BUFFER_SIZE2_A); in csio_wr_set_sge()
1559 csio_wr_reg32(hw, (CSIO_SGE_FLBUF_SIZE3 + sge->csio_fl_align - 1) in csio_wr_set_sge()
1560 & ~(sge->csio_fl_align - 1), SGE_FL_BUFFER_SIZE3_A); in csio_wr_set_sge()
1568 csio_get_flbuf_size(hw, sge, i); in csio_wr_set_sge()
1571 sge->timer_val[0] = CSIO_SGE_TIMER_VAL_0; in csio_wr_set_sge()
1572 sge->timer_val[1] = CSIO_SGE_TIMER_VAL_1; in csio_wr_set_sge()
1573 sge->timer_val[2] = CSIO_SGE_TIMER_VAL_2; in csio_wr_set_sge()
1574 sge->timer_val[3] = CSIO_SGE_TIMER_VAL_3; in csio_wr_set_sge()
1575 sge->timer_val[4] = CSIO_SGE_TIMER_VAL_4; in csio_wr_set_sge()
1576 sge->timer_val[5] = CSIO_SGE_TIMER_VAL_5; in csio_wr_set_sge()
1578 sge->counter_val[0] = CSIO_SGE_INT_CNT_VAL_0; in csio_wr_set_sge()
1579 sge->counter_val[1] = CSIO_SGE_INT_CNT_VAL_1; in csio_wr_set_sge()
1580 sge->counter_val[2] = CSIO_SGE_INT_CNT_VAL_2; in csio_wr_set_sge()
1581 sge->counter_val[3] = CSIO_SGE_INT_CNT_VAL_3; in csio_wr_set_sge()
1583 csio_wr_reg32(hw, THRESHOLD_0_V(sge->counter_val[0]) | in csio_wr_set_sge()
1584 THRESHOLD_1_V(sge->counter_val[1]) | in csio_wr_set_sge()
1585 THRESHOLD_2_V(sge->counter_val[2]) | in csio_wr_set_sge()
1586 THRESHOLD_3_V(sge->counter_val[3]), in csio_wr_set_sge()
1590 TIMERVALUE0_V(csio_us_to_core_ticks(hw, sge->timer_val[0])) | in csio_wr_set_sge()
1591 TIMERVALUE1_V(csio_us_to_core_ticks(hw, sge->timer_val[1])), in csio_wr_set_sge()
1595 TIMERVALUE2_V(csio_us_to_core_ticks(hw, sge->timer_val[2])) | in csio_wr_set_sge()
1596 TIMERVALUE3_V(csio_us_to_core_ticks(hw, sge->timer_val[3])), in csio_wr_set_sge()
1600 TIMERVALUE4_V(csio_us_to_core_ticks(hw, sge->timer_val[4])) | in csio_wr_set_sge()
1601 TIMERVALUE5_V(csio_us_to_core_ticks(hw, sge->timer_val[5])), in csio_wr_set_sge()