Lines Matching refs:mu
142 static u64 mv_outbound_read(struct hpt_iopmu_mv __iomem *mu) in mv_outbound_read() argument
144 u32 outbound_tail = readl(&mu->outbound_tail); in mv_outbound_read()
145 u32 outbound_head = readl(&mu->outbound_head); in mv_outbound_read()
150 memcpy_fromio(&p, &mu->outbound_q[mu->outbound_tail], 8); in mv_outbound_read()
155 writel(outbound_tail, &mu->outbound_tail); in mv_outbound_read()
163 u32 inbound_head = readl(&hba->u.mv.mu->inbound_head); in mv_inbound_write()
169 memcpy_toio(&hba->u.mv.mu->inbound_q[inbound_head], &p, 8); in mv_inbound_write()
170 writel(head, &hba->u.mv.mu->inbound_head); in mv_inbound_write()
213 msg = readl(&hba->u.mv.mu->outbound_msg); in iop_intr_mv()
222 while ((tag = mv_outbound_read(hba->u.mv.mu))) in iop_intr_mv()
259 writel(0, &(hba->u.mvfrey.mu->pcie_f0_int_enable)); in iop_intr_mvfrey()
261 status = readl(&(hba->u.mvfrey.mu->f0_doorbell)); in iop_intr_mvfrey()
263 writel(status, &(hba->u.mvfrey.mu->f0_doorbell)); in iop_intr_mvfrey()
265 u32 msg = readl(&(hba->u.mvfrey.mu->cpu_to_f0_msg_a)); in iop_intr_mvfrey()
272 status = readl(&(hba->u.mvfrey.mu->isr_cause)); in iop_intr_mvfrey()
274 writel(status, &(hba->u.mvfrey.mu->isr_cause)); in iop_intr_mvfrey()
293 writel(0x1010, &(hba->u.mvfrey.mu->pcie_f0_int_enable)); in iop_intr_mvfrey()
368 writel(msg, &hba->u.mv.mu->inbound_msg); in hptiop_post_msg_mv()
375 writel(msg, &(hba->u.mvfrey.mu->f0_to_cpu_msg_a)); in hptiop_post_msg_mvfrey()
376 readl(&(hba->u.mvfrey.mu->f0_to_cpu_msg_a)); in hptiop_post_msg_mvfrey()
563 writel(CPU_TO_F0_DRBL_MSG_BIT, &(hba->u.mvfrey.mu->f0_doorbell_enable)); in hptiop_enable_intr_mvfrey()
564 writel(0x1, &(hba->u.mvfrey.mu->isr_enable)); in hptiop_enable_intr_mvfrey()
565 writel(0x1010, &(hba->u.mvfrey.mu->pcie_f0_int_enable)); in hptiop_enable_intr_mvfrey()
641 hba->u.mv.mu = hptiop_map_pci_bar(hba, 2); in hptiop_map_pci_bar_mv()
642 if (hba->u.mv.mu == NULL) { in hptiop_map_pci_bar_mv()
656 hba->u.mvfrey.mu = hptiop_map_pci_bar(hba, 2); in hptiop_map_pci_bar_mvfrey()
657 if (hba->u.mvfrey.mu == NULL) { in hptiop_map_pci_bar_mvfrey()
668 iounmap(hba->u.mv.mu); in hptiop_unmap_pci_bar_mv()
674 iounmap(hba->u.mvfrey.mu); in hptiop_unmap_pci_bar_mvfrey()
951 &(hba->u.mvfrey.mu->inbound_write_ptr)); in hptiop_post_req_mvfrey()
952 readl(&(hba->u.mvfrey.mu->inbound_write_ptr)); in hptiop_post_req_mvfrey()
976 &(hba->u.mvfrey.mu->inbound_base)); in hptiop_reset_comm_mvfrey()
978 &(hba->u.mvfrey.mu->inbound_base_high)); in hptiop_reset_comm_mvfrey()
981 &(hba->u.mvfrey.mu->outbound_base)); in hptiop_reset_comm_mvfrey()
983 &(hba->u.mvfrey.mu->outbound_base_high)); in hptiop_reset_comm_mvfrey()
986 &(hba->u.mvfrey.mu->outbound_shadow_base)); in hptiop_reset_comm_mvfrey()
988 &(hba->u.mvfrey.mu->outbound_shadow_base_high)); in hptiop_reset_comm_mvfrey()
1196 u32 list_count = readl(&hba->u.mvfrey.mu->inbound_conf_ctl); in hptiop_internal_memalloc_mvfrey()
1539 writel(0, &(hba->u.mvfrey.mu->f0_doorbell_enable)); in hptiop_disable_intr_mvfrey()
1540 readl(&(hba->u.mvfrey.mu->f0_doorbell_enable)); in hptiop_disable_intr_mvfrey()
1541 writel(0, &(hba->u.mvfrey.mu->isr_enable)); in hptiop_disable_intr_mvfrey()
1542 readl(&(hba->u.mvfrey.mu->isr_enable)); in hptiop_disable_intr_mvfrey()
1543 writel(0, &(hba->u.mvfrey.mu->pcie_f0_int_enable)); in hptiop_disable_intr_mvfrey()
1544 readl(&(hba->u.mvfrey.mu->pcie_f0_int_enable)); in hptiop_disable_intr_mvfrey()