Lines Matching refs:int_reg

5648 					      u32 int_reg)  in ipr_handle_other_interrupt()  argument
5654 int_reg &= ~int_mask_reg; in ipr_handle_other_interrupt()
5659 if ((int_reg & IPR_PCII_OPER_INTERRUPTS) == 0) { in ipr_handle_other_interrupt()
5662 int_reg = readl(ioa_cfg->regs.sense_interrupt_reg) & ~int_mask_reg; in ipr_handle_other_interrupt()
5663 if (int_reg & IPR_PCII_IPL_STAGE_CHANGE) { in ipr_handle_other_interrupt()
5667 int_reg = readl(ioa_cfg->regs.sense_interrupt_reg) & ~int_mask_reg; in ipr_handle_other_interrupt()
5678 if (int_reg & IPR_PCII_IOA_TRANS_TO_OPER) { in ipr_handle_other_interrupt()
5681 int_reg = readl(ioa_cfg->regs.sense_interrupt_reg); in ipr_handle_other_interrupt()
5686 } else if ((int_reg & IPR_PCII_HRRQ_UPDATED) == int_reg) { in ipr_handle_other_interrupt()
5690 "Spurious interrupt detected. 0x%08X\n", int_reg); in ipr_handle_other_interrupt()
5692 int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32); in ipr_handle_other_interrupt()
5696 if (int_reg & IPR_PCII_IOA_UNIT_CHECKED) in ipr_handle_other_interrupt()
5698 else if (int_reg & IPR_PCII_NO_HOST_RRQ) in ipr_handle_other_interrupt()
5700 "No Host RRQ. 0x%08X\n", int_reg); in ipr_handle_other_interrupt()
5703 "Permanent IOA failure. 0x%08X\n", int_reg); in ipr_handle_other_interrupt()
5823 u32 int_reg = 0; in ipr_isr() local
5849 int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32); in ipr_isr()
5850 } while (int_reg & IPR_PCII_HRRQ_UPDATED && in ipr_isr()
5854 int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32); in ipr_isr()
5857 int_reg & IPR_PCII_HRRQ_UPDATED) { in ipr_isr()
5867 rc = ipr_handle_other_interrupt(ioa_cfg, int_reg); in ipr_isr()
8390 volatile u32 int_reg; in ipr_reset_next_stage() local
8410 int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg); in ipr_reset_next_stage()
8414 int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32); in ipr_reset_next_stage()
8415 if (int_reg & IPR_PCII_IOA_TRANS_TO_OPER) { in ipr_reset_next_stage()
8420 int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg); in ipr_reset_next_stage()
8448 volatile u32 int_reg; in ipr_reset_enable_ioa() local
8464 int_reg = readl(ioa_cfg->regs.endian_swap_reg); in ipr_reset_enable_ioa()
8467 int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32); in ipr_reset_enable_ioa()
8469 if (int_reg & IPR_PCII_IOA_TRANS_TO_OPER) { in ipr_reset_enable_ioa()
8472 int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg); in ipr_reset_enable_ioa()
8486 int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg); in ipr_reset_enable_ioa()