Lines Matching refs:pm8001_mr32
144 accum_len = pm8001_mr32(fatal_table_address, in pm80xx_get_fatal_dump()
292 pm8001_mr32(fatal_table_address, in pm80xx_get_fatal_dump()
296 if (pm8001_mr32(fatal_table_address, in pm80xx_get_fatal_dump()
315 reg_val = pm8001_mr32(fatal_table_address, in pm80xx_get_fatal_dump()
338 reg_val = pm8001_mr32(fatal_table_address, in pm80xx_get_fatal_dump()
362 length_to_read = pm8001_mr32(fatal_table_address, in pm80xx_get_fatal_dump()
448 total_len = pm8001_mr32(nonfatal_table_address, in pm80xx_get_non_fatal_dump()
476 reg_val = pm8001_mr32(nonfatal_table_address, in pm80xx_get_non_fatal_dump()
496 accum_len = pm8001_mr32(nonfatal_table_address, in pm80xx_get_non_fatal_dump()
523 pm8001_mr32(address, MAIN_SIGNATURE_OFFSET); in read_main_config_table()
525 pm8001_mr32(address, MAIN_INTERFACE_REVISION); in read_main_config_table()
527 pm8001_mr32(address, MAIN_FW_REVISION); in read_main_config_table()
529 pm8001_mr32(address, MAIN_MAX_OUTSTANDING_IO_OFFSET); in read_main_config_table()
531 pm8001_mr32(address, MAIN_MAX_SGL_OFFSET); in read_main_config_table()
533 pm8001_mr32(address, MAIN_CNTRL_CAP_OFFSET); in read_main_config_table()
535 pm8001_mr32(address, MAIN_GST_OFFSET); in read_main_config_table()
537 pm8001_mr32(address, MAIN_IBQ_OFFSET); in read_main_config_table()
539 pm8001_mr32(address, MAIN_OBQ_OFFSET); in read_main_config_table()
543 pm8001_mr32(address, MAIN_FATAL_ERROR_RDUMP0_OFFSET); in read_main_config_table()
545 pm8001_mr32(address, MAIN_FATAL_ERROR_RDUMP0_LENGTH); in read_main_config_table()
547 pm8001_mr32(address, MAIN_FATAL_ERROR_RDUMP1_OFFSET); in read_main_config_table()
549 pm8001_mr32(address, MAIN_FATAL_ERROR_RDUMP1_LENGTH); in read_main_config_table()
553 pm8001_mr32(address, MAIN_GPIO_LED_FLAGS_OFFSET); in read_main_config_table()
557 pm8001_mr32(address, MAIN_ANALOG_SETUP_OFFSET); in read_main_config_table()
560 pm8001_mr32(address, MAIN_INT_VECTOR_TABLE_OFFSET); in read_main_config_table()
562 pm8001_mr32(address, MAIN_SAS_PHY_ATTR_TABLE_OFFSET); in read_main_config_table()
565 pm8001_mr32(address, MAIN_PORT_RECOVERY_TIMER); in read_main_config_table()
568 pm8001_mr32(address, MAIN_MPI_ILA_RELEASE_TYPE); in read_main_config_table()
570 pm8001_mr32(address, MAIN_MPI_INACTIVE_FW_VERSION); in read_main_config_table()
600 pm8001_mr32(address, GST_GSTLEN_MPIS_OFFSET); in read_general_status_table()
602 pm8001_mr32(address, GST_IQ_FREEZE_STATE0_OFFSET); in read_general_status_table()
604 pm8001_mr32(address, GST_IQ_FREEZE_STATE1_OFFSET); in read_general_status_table()
606 pm8001_mr32(address, GST_MSGUTCNT_OFFSET); in read_general_status_table()
608 pm8001_mr32(address, GST_IOPTCNT_OFFSET); in read_general_status_table()
610 pm8001_mr32(address, GST_GPIO_INPUT_VAL); in read_general_status_table()
612 pm8001_mr32(address, GST_RERRINFO_OFFSET0); in read_general_status_table()
614 pm8001_mr32(address, GST_RERRINFO_OFFSET1); in read_general_status_table()
616 pm8001_mr32(address, GST_RERRINFO_OFFSET2); in read_general_status_table()
618 pm8001_mr32(address, GST_RERRINFO_OFFSET3); in read_general_status_table()
620 pm8001_mr32(address, GST_RERRINFO_OFFSET4); in read_general_status_table()
622 pm8001_mr32(address, GST_RERRINFO_OFFSET5); in read_general_status_table()
624 pm8001_mr32(address, GST_RERRINFO_OFFSET6); in read_general_status_table()
626 pm8001_mr32(address, GST_RERRINFO_OFFSET7); in read_general_status_table()
636 pm8001_mr32(address, PSPA_PHYSTATE0_OFFSET); in read_phy_attr_table()
638 pm8001_mr32(address, PSPA_PHYSTATE1_OFFSET); in read_phy_attr_table()
640 pm8001_mr32(address, PSPA_PHYSTATE2_OFFSET); in read_phy_attr_table()
642 pm8001_mr32(address, PSPA_PHYSTATE3_OFFSET); in read_phy_attr_table()
644 pm8001_mr32(address, PSPA_PHYSTATE4_OFFSET); in read_phy_attr_table()
646 pm8001_mr32(address, PSPA_PHYSTATE5_OFFSET); in read_phy_attr_table()
648 pm8001_mr32(address, PSPA_PHYSTATE6_OFFSET); in read_phy_attr_table()
650 pm8001_mr32(address, PSPA_PHYSTATE7_OFFSET); in read_phy_attr_table()
652 pm8001_mr32(address, PSPA_PHYSTATE8_OFFSET); in read_phy_attr_table()
654 pm8001_mr32(address, PSPA_PHYSTATE9_OFFSET); in read_phy_attr_table()
656 pm8001_mr32(address, PSPA_PHYSTATE10_OFFSET); in read_phy_attr_table()
658 pm8001_mr32(address, PSPA_PHYSTATE11_OFFSET); in read_phy_attr_table()
660 pm8001_mr32(address, PSPA_PHYSTATE12_OFFSET); in read_phy_attr_table()
662 pm8001_mr32(address, PSPA_PHYSTATE13_OFFSET); in read_phy_attr_table()
664 pm8001_mr32(address, PSPA_PHYSTATE14_OFFSET); in read_phy_attr_table()
666 pm8001_mr32(address, PSPA_PHYSTATE15_OFFSET); in read_phy_attr_table()
669 pm8001_mr32(address, PSPA_OB_HW_EVENT_PID0_OFFSET); in read_phy_attr_table()
671 pm8001_mr32(address, PSPA_OB_HW_EVENT_PID1_OFFSET); in read_phy_attr_table()
673 pm8001_mr32(address, PSPA_OB_HW_EVENT_PID2_OFFSET); in read_phy_attr_table()
675 pm8001_mr32(address, PSPA_OB_HW_EVENT_PID3_OFFSET); in read_phy_attr_table()
677 pm8001_mr32(address, PSPA_OB_HW_EVENT_PID4_OFFSET); in read_phy_attr_table()
679 pm8001_mr32(address, PSPA_OB_HW_EVENT_PID5_OFFSET); in read_phy_attr_table()
681 pm8001_mr32(address, PSPA_OB_HW_EVENT_PID6_OFFSET); in read_phy_attr_table()
683 pm8001_mr32(address, PSPA_OB_HW_EVENT_PID7_OFFSET); in read_phy_attr_table()
685 pm8001_mr32(address, PSPA_OB_HW_EVENT_PID8_OFFSET); in read_phy_attr_table()
687 pm8001_mr32(address, PSPA_OB_HW_EVENT_PID9_OFFSET); in read_phy_attr_table()
689 pm8001_mr32(address, PSPA_OB_HW_EVENT_PID10_OFFSET); in read_phy_attr_table()
691 pm8001_mr32(address, PSPA_OB_HW_EVENT_PID11_OFFSET); in read_phy_attr_table()
693 pm8001_mr32(address, PSPA_OB_HW_EVENT_PID12_OFFSET); in read_phy_attr_table()
695 pm8001_mr32(address, PSPA_OB_HW_EVENT_PID13_OFFSET); in read_phy_attr_table()
697 pm8001_mr32(address, PSPA_OB_HW_EVENT_PID14_OFFSET); in read_phy_attr_table()
699 pm8001_mr32(address, PSPA_OB_HW_EVENT_PID15_OFFSET); in read_phy_attr_table()
714 get_pci_bar_index(pm8001_mr32(address, in read_inbnd_queue_table()
717 pm8001_mr32(address, (offset + IB_PIPCI_BAR_OFFSET)); in read_inbnd_queue_table()
732 get_pci_bar_index(pm8001_mr32(address, in read_outbnd_queue_table()
735 pm8001_mr32(address, (offset + OB_CIPCI_BAR_OFFSET)); in read_outbnd_queue_table()
793 get_pci_bar_index(pm8001_mr32(addressib, in init_default_table_values()
796 pm8001_mr32(addressib, (offsetib + 0x18)); in init_default_table_values()
827 get_pci_bar_index(pm8001_mr32(addressob, in init_default_table_values()
830 pm8001_mr32(addressob, (offsetob + 0x18)); in init_default_table_values()
873 pm8001_mr32(address, MAIN_FATAL_ERROR_INTERRUPT)); in update_main_config_table()
886 pm8001_mr32(address, MAIN_GPIO_LED_FLAGS_OFFSET)); in update_main_config_table()
1019 pm8001_mr32(pm8001_ha->general_stat_tbl_addr, in mpi_init_check()
1128 value = pm8001_mr32(pm8001_ha->main_cfg_tbl_addr, 0); in init_pci_device_addresses()
1528 pm8001_mr32(pm8001_ha->general_stat_tbl_addr, in mpi_uninit_check()