Lines Matching refs:ha
360 qla82xx_pci_set_crbwindow_2M(struct qla_hw_data *ha, ulong off_in, in qla82xx_pci_set_crbwindow_2M() argument
364 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_pci_set_crbwindow_2M()
366 ha->crb_win = CRB_HI(off_in); in qla82xx_pci_set_crbwindow_2M()
367 writel(ha->crb_win, CRB_WINDOW_2M + ha->nx_pcibase); in qla82xx_pci_set_crbwindow_2M()
372 win_read = rd_reg_dword(CRB_WINDOW_2M + ha->nx_pcibase); in qla82xx_pci_set_crbwindow_2M()
373 if (win_read != ha->crb_win) { in qla82xx_pci_set_crbwindow_2M()
377 __func__, ha->crb_win, win_read, off_in); in qla82xx_pci_set_crbwindow_2M()
379 *off_out = (off_in & MASK(16)) + CRB_INDIRECT_2M + ha->nx_pcibase; in qla82xx_pci_set_crbwindow_2M()
383 qla82xx_pci_get_crb_addr_2M(struct qla_hw_data *ha, ulong off_in, in qla82xx_pci_get_crb_addr_2M() argument
393 QLA82XX_PCI_CAMQM_2M_BASE + ha->nx_pcibase; in qla82xx_pci_get_crb_addr_2M()
406 *off_out = off_in + m->start_2M - m->start_128M + ha->nx_pcibase; in qla82xx_pci_get_crb_addr_2M()
415 static int qla82xx_crb_win_lock(struct qla_hw_data *ha) in qla82xx_crb_win_lock() argument
421 done = qla82xx_rd_32(ha, QLA82XX_PCIE_REG(PCIE_SEM7_LOCK)); in qla82xx_crb_win_lock()
428 qla82xx_wr_32(ha, QLA82XX_CRB_WIN_LOCK_ID, ha->portnum); in qla82xx_crb_win_lock()
433 qla82xx_wr_32(struct qla_hw_data *ha, ulong off_in, u32 data) in qla82xx_wr_32() argument
439 rv = qla82xx_pci_get_crb_addr_2M(ha, off_in, &off); in qla82xx_wr_32()
445 write_lock_irqsave(&ha->hw_lock, flags); in qla82xx_wr_32()
447 qla82xx_crb_win_lock(ha); in qla82xx_wr_32()
448 qla82xx_pci_set_crbwindow_2M(ha, off_in, &off); in qla82xx_wr_32()
454 qla82xx_rd_32(ha, QLA82XX_PCIE_REG(PCIE_SEM7_UNLOCK)); in qla82xx_wr_32()
456 write_unlock_irqrestore(&ha->hw_lock, flags); in qla82xx_wr_32()
463 qla82xx_rd_32(struct qla_hw_data *ha, ulong off_in) in qla82xx_rd_32() argument
470 rv = qla82xx_pci_get_crb_addr_2M(ha, off_in, &off); in qla82xx_rd_32()
476 write_lock_irqsave(&ha->hw_lock, flags); in qla82xx_rd_32()
478 qla82xx_crb_win_lock(ha); in qla82xx_rd_32()
479 qla82xx_pci_set_crbwindow_2M(ha, off_in, &off); in qla82xx_rd_32()
484 qla82xx_rd_32(ha, QLA82XX_PCIE_REG(PCIE_SEM7_UNLOCK)); in qla82xx_rd_32()
486 write_unlock_irqrestore(&ha->hw_lock, flags); in qla82xx_rd_32()
495 int qla82xx_idc_lock(struct qla_hw_data *ha) in qla82xx_idc_lock() argument
504 done = qla82xx_rd_32(ha, QLA82XX_PCIE_REG(PCIE_SEM5_LOCK)); in qla82xx_idc_lock()
517 void qla82xx_idc_unlock(struct qla_hw_data *ha) in qla82xx_idc_unlock() argument
519 qla82xx_rd_32(ha, QLA82XX_PCIE_REG(PCIE_SEM5_UNLOCK)); in qla82xx_idc_unlock()
527 qla82xx_pci_mem_bound_check(struct qla_hw_data *ha, in qla82xx_pci_mem_bound_check() argument
543 qla82xx_pci_set_window(struct qla_hw_data *ha, unsigned long long addr) in qla82xx_pci_set_window() argument
547 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_pci_set_window()
553 ha->ddr_mn_window = window; in qla82xx_pci_set_window()
554 qla82xx_wr_32(ha, in qla82xx_pci_set_window()
555 ha->mn_win_crb | QLA82XX_PCI_CRBSPACE, window); in qla82xx_pci_set_window()
556 win_read = qla82xx_rd_32(ha, in qla82xx_pci_set_window()
557 ha->mn_win_crb | QLA82XX_PCI_CRBSPACE); in qla82xx_pci_set_window()
574 ha->ddr_mn_window = window; in qla82xx_pci_set_window()
575 qla82xx_wr_32(ha, in qla82xx_pci_set_window()
576 ha->mn_win_crb | QLA82XX_PCI_CRBSPACE, window); in qla82xx_pci_set_window()
577 win_read = qla82xx_rd_32(ha, in qla82xx_pci_set_window()
578 ha->mn_win_crb | QLA82XX_PCI_CRBSPACE); in qla82xx_pci_set_window()
592 ha->qdr_sn_window = window; in qla82xx_pci_set_window()
593 qla82xx_wr_32(ha, in qla82xx_pci_set_window()
594 ha->ms_win_crb | QLA82XX_PCI_CRBSPACE, window); in qla82xx_pci_set_window()
595 win_read = qla82xx_rd_32(ha, in qla82xx_pci_set_window()
596 ha->ms_win_crb | QLA82XX_PCI_CRBSPACE); in qla82xx_pci_set_window()
620 static int qla82xx_pci_is_same_window(struct qla_hw_data *ha, in qla82xx_pci_is_same_window() argument
641 if (ha->qdr_sn_window == window) in qla82xx_pci_is_same_window()
647 static int qla82xx_pci_mem_read_direct(struct qla_hw_data *ha, in qla82xx_pci_mem_read_direct() argument
657 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_pci_mem_read_direct()
659 write_lock_irqsave(&ha->hw_lock, flags); in qla82xx_pci_mem_read_direct()
665 start = qla82xx_pci_set_window(ha, off); in qla82xx_pci_mem_read_direct()
667 (qla82xx_pci_is_same_window(ha, off + size - 1) == 0)) { in qla82xx_pci_mem_read_direct()
668 write_unlock_irqrestore(&ha->hw_lock, flags); in qla82xx_pci_mem_read_direct()
676 write_unlock_irqrestore(&ha->hw_lock, flags); in qla82xx_pci_mem_read_direct()
677 mem_base = pci_resource_start(ha->pdev, 0); in qla82xx_pci_mem_read_direct()
692 write_lock_irqsave(&ha->hw_lock, flags); in qla82xx_pci_mem_read_direct()
711 write_unlock_irqrestore(&ha->hw_lock, flags); in qla82xx_pci_mem_read_direct()
719 qla82xx_pci_mem_write_direct(struct qla_hw_data *ha, in qla82xx_pci_mem_write_direct() argument
729 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_pci_mem_write_direct()
731 write_lock_irqsave(&ha->hw_lock, flags); in qla82xx_pci_mem_write_direct()
737 start = qla82xx_pci_set_window(ha, off); in qla82xx_pci_mem_write_direct()
739 (qla82xx_pci_is_same_window(ha, off + size - 1) == 0)) { in qla82xx_pci_mem_write_direct()
740 write_unlock_irqrestore(&ha->hw_lock, flags); in qla82xx_pci_mem_write_direct()
748 write_unlock_irqrestore(&ha->hw_lock, flags); in qla82xx_pci_mem_write_direct()
749 mem_base = pci_resource_start(ha->pdev, 0); in qla82xx_pci_mem_write_direct()
763 write_lock_irqsave(&ha->hw_lock, flags); in qla82xx_pci_mem_write_direct()
782 write_unlock_irqrestore(&ha->hw_lock, flags); in qla82xx_pci_mem_write_direct()
817 qla82xx_rom_lock(struct qla_hw_data *ha) in qla82xx_rom_lock() argument
821 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_rom_lock()
825 done = qla82xx_rd_32(ha, QLA82XX_PCIE_REG(PCIE_SEM2_LOCK)); in qla82xx_rom_lock()
829 lock_owner = qla82xx_rd_32(ha, QLA82XX_ROM_LOCK_ID); in qla82xx_rom_lock()
832 __func__, ha->portnum, lock_owner); in qla82xx_rom_lock()
837 qla82xx_wr_32(ha, QLA82XX_ROM_LOCK_ID, ha->portnum); in qla82xx_rom_lock()
842 qla82xx_rom_unlock(struct qla_hw_data *ha) in qla82xx_rom_unlock() argument
844 qla82xx_wr_32(ha, QLA82XX_ROM_LOCK_ID, 0xffffffff); in qla82xx_rom_unlock()
845 qla82xx_rd_32(ha, QLA82XX_PCIE_REG(PCIE_SEM2_UNLOCK)); in qla82xx_rom_unlock()
849 qla82xx_wait_rom_busy(struct qla_hw_data *ha) in qla82xx_wait_rom_busy() argument
853 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_wait_rom_busy()
856 done = qla82xx_rd_32(ha, QLA82XX_ROMUSB_GLB_STATUS); in qla82xx_wait_rom_busy()
870 qla82xx_wait_rom_done(struct qla_hw_data *ha) in qla82xx_wait_rom_done() argument
874 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_wait_rom_done()
877 done = qla82xx_rd_32(ha, QLA82XX_ROMUSB_GLB_STATUS); in qla82xx_wait_rom_done()
891 qla82xx_md_rw_32(struct qla_hw_data *ha, uint32_t off, u32 data, uint8_t flag) in qla82xx_md_rw_32() argument
895 wrt_reg_dword(CRB_WINDOW_2M + ha->nx_pcibase, off & 0xFFFF0000); in qla82xx_md_rw_32()
898 rd_reg_dword(CRB_WINDOW_2M + ha->nx_pcibase); in qla82xx_md_rw_32()
902 wrt_reg_dword(off_value + CRB_INDIRECT_2M + ha->nx_pcibase, in qla82xx_md_rw_32()
906 ha->nx_pcibase); in qla82xx_md_rw_32()
912 qla82xx_do_rom_fast_read(struct qla_hw_data *ha, int addr, int *valp) in qla82xx_do_rom_fast_read() argument
915 qla82xx_md_rw_32(ha, MD_DIRECT_ROM_WINDOW, (addr & 0xFFFF0000), 1); in qla82xx_do_rom_fast_read()
916 *valp = qla82xx_md_rw_32(ha, MD_DIRECT_ROM_READ_BASE + in qla82xx_do_rom_fast_read()
923 qla82xx_rom_fast_read(struct qla_hw_data *ha, int addr, int *valp) in qla82xx_rom_fast_read() argument
927 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_rom_fast_read()
929 while ((qla82xx_rom_lock(ha) != 0) && (loops < 50000)) { in qla82xx_rom_fast_read()
935 lock_owner = qla82xx_rd_32(ha, QLA82XX_ROM_LOCK_ID); in qla82xx_rom_fast_read()
941 ret = qla82xx_do_rom_fast_read(ha, addr, valp); in qla82xx_rom_fast_read()
942 qla82xx_rom_unlock(ha); in qla82xx_rom_fast_read()
947 qla82xx_read_status_reg(struct qla_hw_data *ha, uint32_t *val) in qla82xx_read_status_reg() argument
949 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_read_status_reg()
951 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_INSTR_OPCODE, M25P_INSTR_RDSR); in qla82xx_read_status_reg()
952 qla82xx_wait_rom_busy(ha); in qla82xx_read_status_reg()
953 if (qla82xx_wait_rom_done(ha)) { in qla82xx_read_status_reg()
958 *val = qla82xx_rd_32(ha, QLA82XX_ROMUSB_ROM_RDATA); in qla82xx_read_status_reg()
963 qla82xx_flash_wait_write_finish(struct qla_hw_data *ha) in qla82xx_flash_wait_write_finish() argument
967 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_flash_wait_write_finish()
969 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_ABYTE_CNT, 0); in qla82xx_flash_wait_write_finish()
971 ret = qla82xx_read_status_reg(ha, &val); in qla82xx_flash_wait_write_finish()
983 qla82xx_flash_set_write_enable(struct qla_hw_data *ha) in qla82xx_flash_set_write_enable() argument
987 qla82xx_wait_rom_busy(ha); in qla82xx_flash_set_write_enable()
988 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_ABYTE_CNT, 0); in qla82xx_flash_set_write_enable()
989 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_INSTR_OPCODE, M25P_INSTR_WREN); in qla82xx_flash_set_write_enable()
990 qla82xx_wait_rom_busy(ha); in qla82xx_flash_set_write_enable()
991 if (qla82xx_wait_rom_done(ha)) in qla82xx_flash_set_write_enable()
993 if (qla82xx_read_status_reg(ha, &val) != 0) in qla82xx_flash_set_write_enable()
1001 qla82xx_write_status_reg(struct qla_hw_data *ha, uint32_t val) in qla82xx_write_status_reg() argument
1003 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_write_status_reg()
1005 if (qla82xx_flash_set_write_enable(ha)) in qla82xx_write_status_reg()
1007 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_WDATA, val); in qla82xx_write_status_reg()
1008 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_INSTR_OPCODE, 0x1); in qla82xx_write_status_reg()
1009 if (qla82xx_wait_rom_done(ha)) { in qla82xx_write_status_reg()
1014 return qla82xx_flash_wait_write_finish(ha); in qla82xx_write_status_reg()
1018 qla82xx_write_disable_flash(struct qla_hw_data *ha) in qla82xx_write_disable_flash() argument
1020 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_write_disable_flash()
1022 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_INSTR_OPCODE, M25P_INSTR_WRDI); in qla82xx_write_disable_flash()
1023 if (qla82xx_wait_rom_done(ha)) { in qla82xx_write_disable_flash()
1032 ql82xx_rom_lock_d(struct qla_hw_data *ha) in ql82xx_rom_lock_d() argument
1036 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in ql82xx_rom_lock_d()
1038 while ((qla82xx_rom_lock(ha) != 0) && (loops < 50000)) { in ql82xx_rom_lock_d()
1044 lock_owner = qla82xx_rd_32(ha, QLA82XX_ROM_LOCK_ID); in ql82xx_rom_lock_d()
1053 qla82xx_write_flash_dword(struct qla_hw_data *ha, uint32_t flashaddr, in qla82xx_write_flash_dword() argument
1057 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_write_flash_dword()
1059 ret = ql82xx_rom_lock_d(ha); in qla82xx_write_flash_dword()
1066 ret = qla82xx_flash_set_write_enable(ha); in qla82xx_write_flash_dword()
1070 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_WDATA, data); in qla82xx_write_flash_dword()
1071 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_ADDRESS, flashaddr); in qla82xx_write_flash_dword()
1072 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_ABYTE_CNT, 3); in qla82xx_write_flash_dword()
1073 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_INSTR_OPCODE, M25P_INSTR_PP); in qla82xx_write_flash_dword()
1074 qla82xx_wait_rom_busy(ha); in qla82xx_write_flash_dword()
1075 if (qla82xx_wait_rom_done(ha)) { in qla82xx_write_flash_dword()
1082 ret = qla82xx_flash_wait_write_finish(ha); in qla82xx_write_flash_dword()
1085 qla82xx_rom_unlock(ha); in qla82xx_write_flash_dword()
1100 struct qla_hw_data *ha = vha->hw; in qla82xx_pinit_from_rom() local
1108 qla82xx_rom_lock(ha); in qla82xx_pinit_from_rom()
1111 qla82xx_wr_32(ha, QLA82XX_CRB_I2Q + 0x10, 0x0); in qla82xx_pinit_from_rom()
1112 qla82xx_wr_32(ha, QLA82XX_CRB_I2Q + 0x14, 0x0); in qla82xx_pinit_from_rom()
1113 qla82xx_wr_32(ha, QLA82XX_CRB_I2Q + 0x18, 0x0); in qla82xx_pinit_from_rom()
1114 qla82xx_wr_32(ha, QLA82XX_CRB_I2Q + 0x1c, 0x0); in qla82xx_pinit_from_rom()
1115 qla82xx_wr_32(ha, QLA82XX_CRB_I2Q + 0x20, 0x0); in qla82xx_pinit_from_rom()
1116 qla82xx_wr_32(ha, QLA82XX_CRB_I2Q + 0x24, 0x0); in qla82xx_pinit_from_rom()
1119 qla82xx_wr_32(ha, QLA82XX_CRB_NIU + 0x40, 0xff); in qla82xx_pinit_from_rom()
1121 qla82xx_wr_32(ha, QLA82XX_CRB_NIU + 0x70000, 0x00); in qla82xx_pinit_from_rom()
1123 qla82xx_wr_32(ha, QLA82XX_CRB_NIU + 0x80000, 0x00); in qla82xx_pinit_from_rom()
1125 qla82xx_wr_32(ha, QLA82XX_CRB_NIU + 0x90000, 0x00); in qla82xx_pinit_from_rom()
1127 qla82xx_wr_32(ha, QLA82XX_CRB_NIU + 0xa0000, 0x00); in qla82xx_pinit_from_rom()
1129 qla82xx_wr_32(ha, QLA82XX_CRB_NIU + 0xb0000, 0x00); in qla82xx_pinit_from_rom()
1132 val = qla82xx_rd_32(ha, QLA82XX_CRB_SRE + 0x1000); in qla82xx_pinit_from_rom()
1133 qla82xx_wr_32(ha, QLA82XX_CRB_SRE + 0x1000, val & (~(0x1))); in qla82xx_pinit_from_rom()
1136 qla82xx_wr_32(ha, QLA82XX_CRB_EPG + 0x1300, 0x1); in qla82xx_pinit_from_rom()
1139 qla82xx_wr_32(ha, QLA82XX_CRB_TIMER + 0x0, 0x0); in qla82xx_pinit_from_rom()
1140 qla82xx_wr_32(ha, QLA82XX_CRB_TIMER + 0x8, 0x0); in qla82xx_pinit_from_rom()
1141 qla82xx_wr_32(ha, QLA82XX_CRB_TIMER + 0x10, 0x0); in qla82xx_pinit_from_rom()
1142 qla82xx_wr_32(ha, QLA82XX_CRB_TIMER + 0x18, 0x0); in qla82xx_pinit_from_rom()
1143 qla82xx_wr_32(ha, QLA82XX_CRB_TIMER + 0x100, 0x0); in qla82xx_pinit_from_rom()
1144 qla82xx_wr_32(ha, QLA82XX_CRB_TIMER + 0x200, 0x0); in qla82xx_pinit_from_rom()
1147 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_0 + 0x3c, 1); in qla82xx_pinit_from_rom()
1148 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_1 + 0x3c, 1); in qla82xx_pinit_from_rom()
1149 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_2 + 0x3c, 1); in qla82xx_pinit_from_rom()
1150 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_3 + 0x3c, 1); in qla82xx_pinit_from_rom()
1151 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_4 + 0x3c, 1); in qla82xx_pinit_from_rom()
1157 qla82xx_wr_32(ha, QLA82XX_ROMUSB_GLB_SW_RESET, 0xfeffffff); in qla82xx_pinit_from_rom()
1159 qla82xx_wr_32(ha, QLA82XX_ROMUSB_GLB_SW_RESET, 0xffffffff); in qla82xx_pinit_from_rom()
1160 qla82xx_rom_unlock(ha); in qla82xx_pinit_from_rom()
1168 if (qla82xx_rom_fast_read(ha, 0, &n) != 0 || n != 0xcafecafeUL || in qla82xx_pinit_from_rom()
1169 qla82xx_rom_fast_read(ha, 4, &n) != 0) { in qla82xx_pinit_from_rom()
1199 if (qla82xx_rom_fast_read(ha, 8*i + 4*offset, &val) != 0 || in qla82xx_pinit_from_rom()
1200 qla82xx_rom_fast_read(ha, 8*i + 4*offset + 4, &addr) != 0) { in qla82xx_pinit_from_rom()
1250 qla82xx_wr_32(ha, off, buf[i].data); in qla82xx_pinit_from_rom()
1267 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_D+0xec, 0x1e); in qla82xx_pinit_from_rom()
1268 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_D+0x4c, 8); in qla82xx_pinit_from_rom()
1269 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_I+0x4c, 8); in qla82xx_pinit_from_rom()
1272 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_0+0x8, 0); in qla82xx_pinit_from_rom()
1273 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_0+0xc, 0); in qla82xx_pinit_from_rom()
1274 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_1+0x8, 0); in qla82xx_pinit_from_rom()
1275 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_1+0xc, 0); in qla82xx_pinit_from_rom()
1276 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_2+0x8, 0); in qla82xx_pinit_from_rom()
1277 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_2+0xc, 0); in qla82xx_pinit_from_rom()
1278 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_3+0x8, 0); in qla82xx_pinit_from_rom()
1279 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_3+0xc, 0); in qla82xx_pinit_from_rom()
1284 qla82xx_pci_mem_write_2M(struct qla_hw_data *ha, in qla82xx_pci_mem_write_2M() argument
1299 if (qla82xx_pci_mem_bound_check(ha, off, size) == 0) in qla82xx_pci_mem_write_2M()
1300 return qla82xx_pci_mem_write_direct(ha, in qla82xx_pci_mem_write_2M()
1315 if (qla82xx_pci_mem_read_2M(ha, off8 + in qla82xx_pci_mem_write_2M()
1350 qla82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_ADDR_LO, temp); in qla82xx_pci_mem_write_2M()
1352 qla82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_ADDR_HI, temp); in qla82xx_pci_mem_write_2M()
1354 qla82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_WRDATA_LO, temp); in qla82xx_pci_mem_write_2M()
1356 qla82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_WRDATA_HI, temp); in qla82xx_pci_mem_write_2M()
1358 qla82xx_wr_32(ha, mem_crb + in qla82xx_pci_mem_write_2M()
1361 qla82xx_wr_32(ha, mem_crb + in qla82xx_pci_mem_write_2M()
1365 qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_CTRL, temp); in qla82xx_pci_mem_write_2M()
1367 qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_CTRL, temp); in qla82xx_pci_mem_write_2M()
1370 temp = qla82xx_rd_32(ha, mem_crb + MIU_TEST_AGT_CTRL); in qla82xx_pci_mem_write_2M()
1377 dev_err(&ha->pdev->dev, in qla82xx_pci_mem_write_2M()
1388 qla82xx_fw_load_from_flash(struct qla_hw_data *ha) in qla82xx_fw_load_from_flash() argument
1392 long flashaddr = ha->flt_region_bootload << 2; in qla82xx_fw_load_from_flash()
1400 if ((qla82xx_rom_fast_read(ha, flashaddr, (int *)&low)) || in qla82xx_fw_load_from_flash()
1401 (qla82xx_rom_fast_read(ha, flashaddr + 4, (int *)&high))) { in qla82xx_fw_load_from_flash()
1405 qla82xx_pci_mem_write_2M(ha, memaddr, &data, 8); in qla82xx_fw_load_from_flash()
1413 read_lock(&ha->hw_lock); in qla82xx_fw_load_from_flash()
1414 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_0 + 0x18, 0x1020); in qla82xx_fw_load_from_flash()
1415 qla82xx_wr_32(ha, QLA82XX_ROMUSB_GLB_SW_RESET, 0x80001e); in qla82xx_fw_load_from_flash()
1416 read_unlock(&ha->hw_lock); in qla82xx_fw_load_from_flash()
1421 qla82xx_pci_mem_read_2M(struct qla_hw_data *ha, in qla82xx_pci_mem_read_2M() argument
1437 if (qla82xx_pci_mem_bound_check(ha, off, size) == 0) in qla82xx_pci_mem_read_2M()
1438 return qla82xx_pci_mem_read_direct(ha, in qla82xx_pci_mem_read_2M()
1452 qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_ADDR_LO, temp); in qla82xx_pci_mem_read_2M()
1454 qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_ADDR_HI, temp); in qla82xx_pci_mem_read_2M()
1456 qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_CTRL, temp); in qla82xx_pci_mem_read_2M()
1458 qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_CTRL, temp); in qla82xx_pci_mem_read_2M()
1461 temp = qla82xx_rd_32(ha, mem_crb + MIU_TEST_AGT_CTRL); in qla82xx_pci_mem_read_2M()
1468 dev_err(&ha->pdev->dev, in qla82xx_pci_mem_read_2M()
1476 temp = qla82xx_rd_32(ha, in qla82xx_pci_mem_read_2M()
1533 qla82xx_get_data_desc(struct qla_hw_data *ha, in qla82xx_get_data_desc() argument
1536 const u8 *unirom = ha->hablob->fw->data; in qla82xx_get_data_desc()
1537 int idx = get_unaligned_le32((u32 *)&unirom[ha->file_prd_off] + in qla82xx_get_data_desc()
1553 qla82xx_get_bootld_offset(struct qla_hw_data *ha) in qla82xx_get_bootld_offset() argument
1558 if (ha->fw_type == QLA82XX_UNIFIED_ROMIMAGE) { in qla82xx_get_bootld_offset()
1559 uri_desc = qla82xx_get_data_desc(ha, in qla82xx_get_bootld_offset()
1565 return (u8 *)&ha->hablob->fw->data[offset]; in qla82xx_get_bootld_offset()
1568 static u32 qla82xx_get_fw_size(struct qla_hw_data *ha) in qla82xx_get_fw_size() argument
1572 if (ha->fw_type == QLA82XX_UNIFIED_ROMIMAGE) { in qla82xx_get_fw_size()
1573 uri_desc = qla82xx_get_data_desc(ha, QLA82XX_URI_DIR_SECT_FW, in qla82xx_get_fw_size()
1579 return get_unaligned_le32(&ha->hablob->fw->data[FW_SIZE_OFFSET]); in qla82xx_get_fw_size()
1583 qla82xx_get_fw_offs(struct qla_hw_data *ha) in qla82xx_get_fw_offs() argument
1588 if (ha->fw_type == QLA82XX_UNIFIED_ROMIMAGE) { in qla82xx_get_fw_offs()
1589 uri_desc = qla82xx_get_data_desc(ha, QLA82XX_URI_DIR_SECT_FW, in qla82xx_get_fw_offs()
1595 return (u8 *)&ha->hablob->fw->data[offset]; in qla82xx_get_fw_offs()
1618 qla82xx_iospace_config(struct qla_hw_data *ha) in qla82xx_iospace_config() argument
1622 if (pci_request_regions(ha->pdev, QLA2XXX_DRIVER_NAME)) { in qla82xx_iospace_config()
1623 ql_log_pci(ql_log_fatal, ha->pdev, 0x000c, in qla82xx_iospace_config()
1629 if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) { in qla82xx_iospace_config()
1630 ql_log_pci(ql_log_fatal, ha->pdev, 0x000d, in qla82xx_iospace_config()
1635 len = pci_resource_len(ha->pdev, 0); in qla82xx_iospace_config()
1636 ha->nx_pcibase = ioremap(pci_resource_start(ha->pdev, 0), len); in qla82xx_iospace_config()
1637 if (!ha->nx_pcibase) { in qla82xx_iospace_config()
1638 ql_log_pci(ql_log_fatal, ha->pdev, 0x000e, in qla82xx_iospace_config()
1644 if (IS_QLA8044(ha)) { in qla82xx_iospace_config()
1645 ha->iobase = ha->nx_pcibase; in qla82xx_iospace_config()
1646 } else if (IS_QLA82XX(ha)) { in qla82xx_iospace_config()
1647 ha->iobase = ha->nx_pcibase + 0xbc000 + (ha->pdev->devfn << 11); in qla82xx_iospace_config()
1651 ha->nxdb_wr_ptr = ioremap((pci_resource_start(ha->pdev, 4) + in qla82xx_iospace_config()
1652 (ha->pdev->devfn << 12)), 4); in qla82xx_iospace_config()
1653 if (!ha->nxdb_wr_ptr) { in qla82xx_iospace_config()
1654 ql_log_pci(ql_log_fatal, ha->pdev, 0x000f, in qla82xx_iospace_config()
1662 ha->nxdb_rd_ptr = ha->nx_pcibase + (512 * 1024) + in qla82xx_iospace_config()
1663 (ha->pdev->devfn * 8); in qla82xx_iospace_config()
1665 ha->nxdb_wr_ptr = (void __iomem *)(ha->pdev->devfn == 6 ? in qla82xx_iospace_config()
1670 ha->max_req_queues = ha->max_rsp_queues = 1; in qla82xx_iospace_config()
1671 ha->msix_count = ha->max_rsp_queues + 1; in qla82xx_iospace_config()
1672 ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc006, in qla82xx_iospace_config()
1675 ha->nx_pcibase, ha->iobase, in qla82xx_iospace_config()
1676 ha->max_req_queues, ha->msix_count); in qla82xx_iospace_config()
1677 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0010, in qla82xx_iospace_config()
1680 ha->nx_pcibase, ha->iobase, in qla82xx_iospace_config()
1681 ha->max_req_queues, ha->msix_count); in qla82xx_iospace_config()
1701 struct qla_hw_data *ha = vha->hw; in qla82xx_pci_config() local
1704 pci_set_master(ha->pdev); in qla82xx_pci_config()
1705 ret = pci_set_mwi(ha->pdev); in qla82xx_pci_config()
1706 ha->chip_revision = ha->pdev->revision; in qla82xx_pci_config()
1709 ha->chip_revision, ret); in qla82xx_pci_config()
1722 struct qla_hw_data *ha = vha->hw; in qla82xx_reset_chip() local
1724 ha->isp_ops->disable_intrs(ha); in qla82xx_reset_chip()
1731 struct qla_hw_data *ha = vha->hw; in qla82xx_config_rings() local
1732 struct device_reg_82xx __iomem *reg = &ha->iobase->isp82; in qla82xx_config_rings()
1734 struct req_que *req = ha->req_q_map[0]; in qla82xx_config_rings()
1735 struct rsp_que *rsp = ha->rsp_q_map[0]; in qla82xx_config_rings()
1738 icb = (struct init_cb_81xx *)ha->init_cb; in qla82xx_config_rings()
1752 qla82xx_fw_load_from_blob(struct qla_hw_data *ha) in qla82xx_fw_load_from_blob() argument
1760 ptr64 = (u64 *)qla82xx_get_bootld_offset(ha); in qla82xx_fw_load_from_blob()
1765 if (qla82xx_pci_mem_write_2M(ha, flashaddr, &data, 8)) in qla82xx_fw_load_from_blob()
1771 size = qla82xx_get_fw_size(ha) / 8; in qla82xx_fw_load_from_blob()
1772 ptr64 = (u64 *)qla82xx_get_fw_offs(ha); in qla82xx_fw_load_from_blob()
1777 if (qla82xx_pci_mem_write_2M(ha, flashaddr, &data, 8)) in qla82xx_fw_load_from_blob()
1788 qla82xx_wr_32(ha, QLA82XX_CAM_RAM(0x1fc), QLA82XX_BDINFO_MAGIC); in qla82xx_fw_load_from_blob()
1790 read_lock(&ha->hw_lock); in qla82xx_fw_load_from_blob()
1791 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_0 + 0x18, 0x1020); in qla82xx_fw_load_from_blob()
1792 qla82xx_wr_32(ha, QLA82XX_ROMUSB_GLB_SW_RESET, 0x80001e); in qla82xx_fw_load_from_blob()
1793 read_unlock(&ha->hw_lock); in qla82xx_fw_load_from_blob()
1798 qla82xx_set_product_offset(struct qla_hw_data *ha) in qla82xx_set_product_offset() argument
1801 const uint8_t *unirom = ha->hablob->fw->data; in qla82xx_set_product_offset()
1805 uint8_t chiprev = ha->chip_revision; in qla82xx_set_product_offset()
1828 ha->file_prd_off = offset; in qla82xx_set_product_offset()
1840 struct qla_hw_data *ha = vha->hw; in qla82xx_validate_firmware_blob() local
1841 const struct firmware *fw = ha->hablob->fw; in qla82xx_validate_firmware_blob()
1843 ha->fw_type = fw_type; in qla82xx_validate_firmware_blob()
1846 if (qla82xx_set_product_offset(ha)) in qla82xx_validate_firmware_blob()
1864 qla82xx_check_cmdpeg_state(struct qla_hw_data *ha) in qla82xx_check_cmdpeg_state() argument
1868 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_check_cmdpeg_state()
1871 read_lock(&ha->hw_lock); in qla82xx_check_cmdpeg_state()
1872 val = qla82xx_rd_32(ha, CRB_CMDPEG_STATE); in qla82xx_check_cmdpeg_state()
1873 read_unlock(&ha->hw_lock); in qla82xx_check_cmdpeg_state()
1895 val = qla82xx_rd_32(ha, QLA82XX_ROMUSB_GLB_PEGTUNE_DONE); in qla82xx_check_cmdpeg_state()
1896 read_lock(&ha->hw_lock); in qla82xx_check_cmdpeg_state()
1897 qla82xx_wr_32(ha, CRB_CMDPEG_STATE, PHAN_INITIALIZE_FAILED); in qla82xx_check_cmdpeg_state()
1898 read_unlock(&ha->hw_lock); in qla82xx_check_cmdpeg_state()
1903 qla82xx_check_rcvpeg_state(struct qla_hw_data *ha) in qla82xx_check_rcvpeg_state() argument
1907 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_check_rcvpeg_state()
1910 read_lock(&ha->hw_lock); in qla82xx_check_rcvpeg_state()
1911 val = qla82xx_rd_32(ha, CRB_RCVPEG_STATE); in qla82xx_check_rcvpeg_state()
1912 read_unlock(&ha->hw_lock); in qla82xx_check_rcvpeg_state()
1933 read_lock(&ha->hw_lock); in qla82xx_check_rcvpeg_state()
1934 qla82xx_wr_32(ha, CRB_RCVPEG_STATE, PHAN_INITIALIZE_FAILED); in qla82xx_check_rcvpeg_state()
1935 read_unlock(&ha->hw_lock); in qla82xx_check_rcvpeg_state()
1953 struct qla_hw_data *ha = vha->hw; in qla82xx_mbx_completion() local
1954 struct device_reg_82xx __iomem *reg = &ha->iobase->isp82; in qla82xx_mbx_completion()
1959 ha->flags.mbox_int = 1; in qla82xx_mbx_completion()
1960 ha->mailbox_out[0] = mb0; in qla82xx_mbx_completion()
1962 for (cnt = 1; cnt < ha->mbx_count; cnt++) { in qla82xx_mbx_completion()
1963 ha->mailbox_out[cnt] = rd_reg_word(wptr); in qla82xx_mbx_completion()
1967 if (!ha->mcp) in qla82xx_mbx_completion()
1985 struct qla_hw_data *ha; in qla82xx_intr_handler() local
2000 ha = rsp->hw; in qla82xx_intr_handler()
2002 if (!ha->flags.msi_enabled) { in qla82xx_intr_handler()
2003 status = qla82xx_rd_32(ha, ISR_INT_VECTOR); in qla82xx_intr_handler()
2004 if (!(status & ha->nx_legacy_intr.int_vec_bit)) in qla82xx_intr_handler()
2007 status1 = qla82xx_rd_32(ha, ISR_INT_STATE_REG); in qla82xx_intr_handler()
2013 qla82xx_wr_32(ha, ha->nx_legacy_intr.tgt_status_reg, 0xffffffff); in qla82xx_intr_handler()
2016 qla82xx_rd_32(ha, ISR_INT_VECTOR); in qla82xx_intr_handler()
2017 qla82xx_rd_32(ha, ISR_INT_VECTOR); in qla82xx_intr_handler()
2019 reg = &ha->iobase->isp82; in qla82xx_intr_handler()
2021 spin_lock_irqsave(&ha->hardware_lock, flags); in qla82xx_intr_handler()
2022 vha = pci_get_drvdata(ha->pdev); in qla82xx_intr_handler()
2056 qla2x00_handle_mbx_completion(ha, status); in qla82xx_intr_handler()
2057 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla82xx_intr_handler()
2059 if (!ha->flags.msi_enabled) in qla82xx_intr_handler()
2060 qla82xx_wr_32(ha, ha->nx_legacy_intr.tgt_mask_reg, 0xfbff); in qla82xx_intr_handler()
2069 struct qla_hw_data *ha; in qla82xx_msix_default() local
2084 ha = rsp->hw; in qla82xx_msix_default()
2086 reg = &ha->iobase->isp82; in qla82xx_msix_default()
2088 spin_lock_irqsave(&ha->hardware_lock, flags); in qla82xx_msix_default()
2089 vha = pci_get_drvdata(ha->pdev); in qla82xx_msix_default()
2125 qla2x00_handle_mbx_completion(ha, status); in qla82xx_msix_default()
2126 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla82xx_msix_default()
2135 struct qla_hw_data *ha; in qla82xx_msix_rsp_q() local
2148 ha = rsp->hw; in qla82xx_msix_rsp_q()
2149 reg = &ha->iobase->isp82; in qla82xx_msix_rsp_q()
2150 spin_lock_irqsave(&ha->hardware_lock, flags); in qla82xx_msix_rsp_q()
2151 vha = pci_get_drvdata(ha->pdev); in qla82xx_msix_rsp_q()
2158 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla82xx_msix_rsp_q()
2166 struct qla_hw_data *ha; in qla82xx_poll() local
2180 ha = rsp->hw; in qla82xx_poll()
2182 reg = &ha->iobase->isp82; in qla82xx_poll()
2183 spin_lock_irqsave(&ha->hardware_lock, flags); in qla82xx_poll()
2184 vha = pci_get_drvdata(ha->pdev); in qla82xx_poll()
2217 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla82xx_poll()
2221 qla82xx_enable_intrs(struct qla_hw_data *ha) in qla82xx_enable_intrs() argument
2223 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_enable_intrs()
2226 spin_lock_irq(&ha->hardware_lock); in qla82xx_enable_intrs()
2227 if (IS_QLA8044(ha)) in qla82xx_enable_intrs()
2228 qla8044_wr_reg(ha, LEG_INTR_MASK_OFFSET, 0); in qla82xx_enable_intrs()
2230 qla82xx_wr_32(ha, ha->nx_legacy_intr.tgt_mask_reg, 0xfbff); in qla82xx_enable_intrs()
2231 spin_unlock_irq(&ha->hardware_lock); in qla82xx_enable_intrs()
2232 ha->interrupts_on = 1; in qla82xx_enable_intrs()
2236 qla82xx_disable_intrs(struct qla_hw_data *ha) in qla82xx_disable_intrs() argument
2238 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_disable_intrs()
2240 if (ha->interrupts_on) in qla82xx_disable_intrs()
2243 spin_lock_irq(&ha->hardware_lock); in qla82xx_disable_intrs()
2244 if (IS_QLA8044(ha)) in qla82xx_disable_intrs()
2245 qla8044_wr_reg(ha, LEG_INTR_MASK_OFFSET, 1); in qla82xx_disable_intrs()
2247 qla82xx_wr_32(ha, ha->nx_legacy_intr.tgt_mask_reg, 0x0400); in qla82xx_disable_intrs()
2248 spin_unlock_irq(&ha->hardware_lock); in qla82xx_disable_intrs()
2249 ha->interrupts_on = 0; in qla82xx_disable_intrs()
2252 void qla82xx_init_flags(struct qla_hw_data *ha) in qla82xx_init_flags() argument
2257 rwlock_init(&ha->hw_lock); in qla82xx_init_flags()
2258 ha->qdr_sn_window = -1; in qla82xx_init_flags()
2259 ha->ddr_mn_window = -1; in qla82xx_init_flags()
2260 ha->curr_window = 255; in qla82xx_init_flags()
2261 ha->portnum = PCI_FUNC(ha->pdev->devfn); in qla82xx_init_flags()
2262 nx_legacy_intr = &legacy_intr[ha->portnum]; in qla82xx_init_flags()
2263 ha->nx_legacy_intr.int_vec_bit = nx_legacy_intr->int_vec_bit; in qla82xx_init_flags()
2264 ha->nx_legacy_intr.tgt_status_reg = nx_legacy_intr->tgt_status_reg; in qla82xx_init_flags()
2265 ha->nx_legacy_intr.tgt_mask_reg = nx_legacy_intr->tgt_mask_reg; in qla82xx_init_flags()
2266 ha->nx_legacy_intr.pci_int_reg = nx_legacy_intr->pci_int_reg; in qla82xx_init_flags()
2274 struct qla_hw_data *ha = vha->hw; in qla82xx_set_idc_version() local
2276 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE); in qla82xx_set_idc_version()
2277 if (drv_active == (QLA82XX_DRV_ACTIVE << (ha->portnum * 4))) { in qla82xx_set_idc_version()
2278 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_IDC_VERSION, in qla82xx_set_idc_version()
2283 idc_ver = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_IDC_VERSION); in qla82xx_set_idc_version()
2296 struct qla_hw_data *ha = vha->hw; in qla82xx_set_drv_active() local
2298 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE); in qla82xx_set_drv_active()
2302 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_ACTIVE, in qla82xx_set_drv_active()
2304 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE); in qla82xx_set_drv_active()
2306 drv_active |= (QLA82XX_DRV_ACTIVE << (ha->portnum * 4)); in qla82xx_set_drv_active()
2307 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_ACTIVE, drv_active); in qla82xx_set_drv_active()
2311 qla82xx_clear_drv_active(struct qla_hw_data *ha) in qla82xx_clear_drv_active() argument
2315 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE); in qla82xx_clear_drv_active()
2316 drv_active &= ~(QLA82XX_DRV_ACTIVE << (ha->portnum * 4)); in qla82xx_clear_drv_active()
2317 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_ACTIVE, drv_active); in qla82xx_clear_drv_active()
2321 qla82xx_need_reset(struct qla_hw_data *ha) in qla82xx_need_reset() argument
2326 if (ha->flags.nic_core_reset_owner) in qla82xx_need_reset()
2329 drv_state = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_STATE); in qla82xx_need_reset()
2330 rval = drv_state & (QLA82XX_DRVST_RST_RDY << (ha->portnum * 4)); in qla82xx_need_reset()
2336 qla82xx_set_rst_ready(struct qla_hw_data *ha) in qla82xx_set_rst_ready() argument
2339 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_set_rst_ready()
2341 drv_state = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_STATE); in qla82xx_set_rst_ready()
2345 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, QLA82XX_DRVST_NOT_RDY); in qla82xx_set_rst_ready()
2346 drv_state = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_STATE); in qla82xx_set_rst_ready()
2348 drv_state |= (QLA82XX_DRVST_RST_RDY << (ha->portnum * 4)); in qla82xx_set_rst_ready()
2351 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, drv_state); in qla82xx_set_rst_ready()
2355 qla82xx_clear_rst_ready(struct qla_hw_data *ha) in qla82xx_clear_rst_ready() argument
2359 drv_state = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_STATE); in qla82xx_clear_rst_ready()
2360 drv_state &= ~(QLA82XX_DRVST_RST_RDY << (ha->portnum * 4)); in qla82xx_clear_rst_ready()
2361 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, drv_state); in qla82xx_clear_rst_ready()
2365 qla82xx_set_qsnt_ready(struct qla_hw_data *ha) in qla82xx_set_qsnt_ready() argument
2369 qsnt_state = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_STATE); in qla82xx_set_qsnt_ready()
2370 qsnt_state |= (QLA82XX_DRVST_QSNT_RDY << (ha->portnum * 4)); in qla82xx_set_qsnt_ready()
2371 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, qsnt_state); in qla82xx_set_qsnt_ready()
2377 struct qla_hw_data *ha = vha->hw; in qla82xx_clear_qsnt_ready() local
2380 qsnt_state = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_STATE); in qla82xx_clear_qsnt_ready()
2381 qsnt_state &= ~(QLA82XX_DRVST_QSNT_RDY << (ha->portnum * 4)); in qla82xx_clear_qsnt_ready()
2382 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, qsnt_state); in qla82xx_clear_qsnt_ready()
2390 struct qla_hw_data *ha = vha->hw; in qla82xx_load_fw() local
2400 rst = qla82xx_rd_32(ha, QLA82XX_ROMUSB_GLB_SW_RESET); in qla82xx_load_fw()
2402 qla82xx_wr_32(ha, QLA82XX_ROMUSB_GLB_SW_RESET, rst); in qla82xx_load_fw()
2415 if (qla82xx_fw_load_from_flash(ha) == QLA_SUCCESS) { in qla82xx_load_fw()
2429 blob = ha->hablob = qla2x00_request_firmware(vha); in qla82xx_load_fw()
2448 if (qla82xx_fw_load_from_blob(ha) == QLA_SUCCESS) { in qla82xx_load_fw()
2467 struct qla_hw_data *ha = vha->hw; in qla82xx_start_firmware() local
2470 qla82xx_wr_32(ha, CRB_DMA_SHIFT, QLA82XX_DMA_SHIFT_VALUE); in qla82xx_start_firmware()
2475 qla82xx_wr_32(ha, CRB_CMDPEG_STATE, 0); in qla82xx_start_firmware()
2476 qla82xx_wr_32(ha, CRB_RCVPEG_STATE, 0); in qla82xx_start_firmware()
2479 qla82xx_wr_32(ha, QLA82XX_PEG_HALT_STATUS1, 0); in qla82xx_start_firmware()
2480 qla82xx_wr_32(ha, QLA82XX_PEG_HALT_STATUS2, 0); in qla82xx_start_firmware()
2489 if (qla82xx_check_cmdpeg_state(ha) != QLA_SUCCESS) { in qla82xx_start_firmware()
2496 pcie_capability_read_word(ha->pdev, PCI_EXP_LNKSTA, &lnk); in qla82xx_start_firmware()
2497 ha->link_width = (lnk >> 4) & 0x3f; in qla82xx_start_firmware()
2500 return qla82xx_check_rcvpeg_state(ha); in qla82xx_start_firmware()
2509 struct qla_hw_data *ha = vha->hw; in qla82xx_read_flash_data() local
2513 if (qla82xx_rom_fast_read(ha, faddr, &val)) { in qla82xx_read_flash_data()
2525 qla82xx_unprotect_flash(struct qla_hw_data *ha) in qla82xx_unprotect_flash() argument
2529 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_unprotect_flash()
2531 ret = ql82xx_rom_lock_d(ha); in qla82xx_unprotect_flash()
2538 ret = qla82xx_read_status_reg(ha, &val); in qla82xx_unprotect_flash()
2543 ret = qla82xx_write_status_reg(ha, val); in qla82xx_unprotect_flash()
2546 qla82xx_write_status_reg(ha, val); in qla82xx_unprotect_flash()
2549 if (qla82xx_write_disable_flash(ha) != 0) in qla82xx_unprotect_flash()
2554 qla82xx_rom_unlock(ha); in qla82xx_unprotect_flash()
2559 qla82xx_protect_flash(struct qla_hw_data *ha) in qla82xx_protect_flash() argument
2563 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_protect_flash()
2565 ret = ql82xx_rom_lock_d(ha); in qla82xx_protect_flash()
2572 ret = qla82xx_read_status_reg(ha, &val); in qla82xx_protect_flash()
2578 ret = qla82xx_write_status_reg(ha, val); in qla82xx_protect_flash()
2583 if (qla82xx_write_disable_flash(ha) != 0) in qla82xx_protect_flash()
2587 qla82xx_rom_unlock(ha); in qla82xx_protect_flash()
2592 qla82xx_erase_sector(struct qla_hw_data *ha, int addr) in qla82xx_erase_sector() argument
2595 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_erase_sector()
2597 ret = ql82xx_rom_lock_d(ha); in qla82xx_erase_sector()
2604 qla82xx_flash_set_write_enable(ha); in qla82xx_erase_sector()
2605 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_ADDRESS, addr); in qla82xx_erase_sector()
2606 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_ABYTE_CNT, 3); in qla82xx_erase_sector()
2607 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_INSTR_OPCODE, M25P_INSTR_SE); in qla82xx_erase_sector()
2609 if (qla82xx_wait_rom_done(ha)) { in qla82xx_erase_sector()
2615 ret = qla82xx_flash_wait_write_finish(ha); in qla82xx_erase_sector()
2617 qla82xx_rom_unlock(ha); in qla82xx_erase_sector()
2644 struct qla_hw_data *ha = vha->hw; in qla82xx_write_flash_data() local
2651 optrom = dma_alloc_coherent(&ha->pdev->dev, OPTROM_BURST_SIZE, in qla82xx_write_flash_data()
2661 rest_addr = ha->fdt_block_size - 1; in qla82xx_write_flash_data()
2663 ret = qla82xx_unprotect_flash(ha); in qla82xx_write_flash_data()
2674 ret = qla82xx_erase_sector(ha, faddr); in qla82xx_write_flash_data()
2689 (ha->flash_data_off | faddr), in qla82xx_write_flash_data()
2695 (ha->flash_data_off | faddr), in qla82xx_write_flash_data()
2700 dma_free_coherent(&ha->pdev->dev, in qla82xx_write_flash_data()
2711 ret = qla82xx_write_flash_dword(ha, faddr, in qla82xx_write_flash_data()
2721 ret = qla82xx_protect_flash(ha); in qla82xx_write_flash_data()
2727 dma_free_coherent(&ha->pdev->dev, in qla82xx_write_flash_data()
2754 struct qla_hw_data *ha = vha->hw; in qla82xx_start_iocbs() local
2755 struct req_que *req = ha->req_q_map[0]; in qla82xx_start_iocbs()
2766 dbval = 0x04 | (ha->portnum << 5); in qla82xx_start_iocbs()
2770 qla82xx_wr_32(ha, (unsigned long)ha->nxdb_wr_ptr, dbval); in qla82xx_start_iocbs()
2772 wrt_reg_dword(ha->nxdb_wr_ptr, dbval); in qla82xx_start_iocbs()
2774 while (rd_reg_dword(ha->nxdb_rd_ptr) != dbval) { in qla82xx_start_iocbs()
2775 wrt_reg_dword(ha->nxdb_wr_ptr, dbval); in qla82xx_start_iocbs()
2782 qla82xx_rom_lock_recovery(struct qla_hw_data *ha) in qla82xx_rom_lock_recovery() argument
2784 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_rom_lock_recovery()
2787 if (qla82xx_rom_lock(ha)) { in qla82xx_rom_lock_recovery()
2788 lock_owner = qla82xx_rd_32(ha, QLA82XX_ROM_LOCK_ID); in qla82xx_rom_lock_recovery()
2798 qla82xx_rom_unlock(ha); in qla82xx_rom_lock_recovery()
2818 struct qla_hw_data *ha = vha->hw; in qla82xx_device_bootstrap() local
2821 need_reset = qla82xx_need_reset(ha); in qla82xx_device_bootstrap()
2825 if (ha->flags.isp82xx_fw_hung) in qla82xx_device_bootstrap()
2826 qla82xx_rom_lock_recovery(ha); in qla82xx_device_bootstrap()
2828 old_count = qla82xx_rd_32(ha, QLA82XX_PEG_ALIVE_COUNTER); in qla82xx_device_bootstrap()
2831 count = qla82xx_rd_32(ha, QLA82XX_PEG_ALIVE_COUNTER); in qla82xx_device_bootstrap()
2837 qla82xx_rom_lock_recovery(ha); in qla82xx_device_bootstrap()
2843 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, QLA8XXX_DEV_INITIALIZING); in qla82xx_device_bootstrap()
2845 qla82xx_idc_unlock(ha); in qla82xx_device_bootstrap()
2847 qla82xx_idc_lock(ha); in qla82xx_device_bootstrap()
2852 qla82xx_clear_drv_active(ha); in qla82xx_device_bootstrap()
2853 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, QLA8XXX_DEV_FAILED); in qla82xx_device_bootstrap()
2860 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, QLA8XXX_DEV_READY); in qla82xx_device_bootstrap()
2878 struct qla_hw_data *ha = vha->hw; in qla82xx_need_qsnt_handler() local
2888 qla82xx_set_qsnt_ready(ha); in qla82xx_need_qsnt_handler()
2893 drv_state = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_STATE); in qla82xx_need_qsnt_handler()
2894 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE); in qla82xx_need_qsnt_handler()
2908 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, in qla82xx_need_qsnt_handler()
2912 qla82xx_idc_unlock(ha); in qla82xx_need_qsnt_handler()
2914 qla82xx_idc_lock(ha); in qla82xx_need_qsnt_handler()
2920 qla82xx_idc_unlock(ha); in qla82xx_need_qsnt_handler()
2922 qla82xx_idc_lock(ha); in qla82xx_need_qsnt_handler()
2924 drv_state = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_STATE); in qla82xx_need_qsnt_handler()
2925 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE); in qla82xx_need_qsnt_handler()
2928 dev_state = qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE); in qla82xx_need_qsnt_handler()
2933 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, QLA8XXX_DEV_QUIESCENT); in qla82xx_need_qsnt_handler()
2950 struct qla_hw_data *ha = vha->hw; in qla82xx_wait_for_state_change() local
2955 qla82xx_idc_lock(ha); in qla82xx_wait_for_state_change()
2956 dev_state = qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE); in qla82xx_wait_for_state_change()
2957 qla82xx_idc_unlock(ha); in qla82xx_wait_for_state_change()
2966 struct qla_hw_data *ha = vha->hw; in qla8xxx_dev_failed_handler() local
2972 if (IS_QLA82XX(ha)) { in qla8xxx_dev_failed_handler()
2973 qla82xx_clear_drv_active(ha); in qla8xxx_dev_failed_handler()
2974 qla82xx_idc_unlock(ha); in qla8xxx_dev_failed_handler()
2975 } else if (IS_QLA8044(ha)) { in qla8xxx_dev_failed_handler()
2976 qla8044_clear_drv_active(ha); in qla8xxx_dev_failed_handler()
2977 qla8044_idc_unlock(ha); in qla8xxx_dev_failed_handler()
3005 struct qla_hw_data *ha = vha->hw; in qla82xx_need_reset_handler() local
3006 struct req_que *req = ha->req_q_map[0]; in qla82xx_need_reset_handler()
3009 qla82xx_idc_unlock(ha); in qla82xx_need_reset_handler()
3011 ha->isp_ops->get_flash_version(vha, req->ring); in qla82xx_need_reset_handler()
3012 ha->isp_ops->nvram_config(vha); in qla82xx_need_reset_handler()
3013 qla82xx_idc_lock(ha); in qla82xx_need_reset_handler()
3016 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE); in qla82xx_need_reset_handler()
3017 if (!ha->flags.nic_core_reset_owner) { in qla82xx_need_reset_handler()
3019 "reset_acknowledged by 0x%x\n", ha->portnum); in qla82xx_need_reset_handler()
3020 qla82xx_set_rst_ready(ha); in qla82xx_need_reset_handler()
3022 active_mask = ~(QLA82XX_DRV_ACTIVE << (ha->portnum * 4)); in qla82xx_need_reset_handler()
3029 reset_timeout = jiffies + (ha->fcoe_reset_timeout * HZ); in qla82xx_need_reset_handler()
3031 drv_state = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_STATE); in qla82xx_need_reset_handler()
3032 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE); in qla82xx_need_reset_handler()
3033 dev_state = qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE); in qla82xx_need_reset_handler()
3047 qla82xx_idc_unlock(ha); in qla82xx_need_reset_handler()
3049 qla82xx_idc_lock(ha); in qla82xx_need_reset_handler()
3050 drv_state = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_STATE); in qla82xx_need_reset_handler()
3051 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE); in qla82xx_need_reset_handler()
3052 if (ha->flags.nic_core_reset_owner) in qla82xx_need_reset_handler()
3054 dev_state = qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE); in qla82xx_need_reset_handler()
3072 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, QLA8XXX_DEV_COLD); in qla82xx_need_reset_handler()
3073 qla82xx_set_rst_ready(ha); in qla82xx_need_reset_handler()
3087 struct qla_hw_data *ha = vha->hw; in qla82xx_check_md_needed() local
3091 fw_major_version = ha->fw_major_version; in qla82xx_check_md_needed()
3092 fw_minor_version = ha->fw_minor_version; in qla82xx_check_md_needed()
3093 fw_subminor_version = ha->fw_subminor_version; in qla82xx_check_md_needed()
3100 if (!ha->fw_dumped) { in qla82xx_check_md_needed()
3101 if ((fw_major_version != ha->fw_major_version || in qla82xx_check_md_needed()
3102 fw_minor_version != ha->fw_minor_version || in qla82xx_check_md_needed()
3103 fw_subminor_version != ha->fw_subminor_version) || in qla82xx_check_md_needed()
3104 (ha->prev_minidump_failed)) { in qla82xx_check_md_needed()
3109 ha->fw_major_version, in qla82xx_check_md_needed()
3110 ha->fw_minor_version, in qla82xx_check_md_needed()
3111 ha->fw_subminor_version, in qla82xx_check_md_needed()
3112 ha->prev_minidump_failed); in qla82xx_check_md_needed()
3175 struct qla_hw_data *ha = vha->hw; in qla82xx_device_state_handler() local
3178 qla82xx_idc_lock(ha); in qla82xx_device_state_handler()
3184 dev_state = qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE); in qla82xx_device_state_handler()
3192 dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout * HZ); in qla82xx_device_state_handler()
3202 dev_state = qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE); in qla82xx_device_state_handler()
3217 ha->flags.nic_core_reset_owner = 0; in qla82xx_device_state_handler()
3223 qla82xx_idc_unlock(ha); in qla82xx_device_state_handler()
3225 qla82xx_idc_lock(ha); in qla82xx_device_state_handler()
3231 qla82xx_idc_unlock(ha); in qla82xx_device_state_handler()
3233 qla82xx_idc_lock(ha); in qla82xx_device_state_handler()
3236 (ha->fcoe_dev_init_timeout * HZ); in qla82xx_device_state_handler()
3241 dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout in qla82xx_device_state_handler()
3248 if (ha->flags.quiesce_owner) in qla82xx_device_state_handler()
3251 qla82xx_idc_unlock(ha); in qla82xx_device_state_handler()
3253 qla82xx_idc_lock(ha); in qla82xx_device_state_handler()
3256 dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout in qla82xx_device_state_handler()
3264 qla82xx_idc_unlock(ha); in qla82xx_device_state_handler()
3266 qla82xx_idc_lock(ha); in qla82xx_device_state_handler()
3271 qla82xx_idc_unlock(ha); in qla82xx_device_state_handler()
3279 struct qla_hw_data *ha = vha->hw; in qla82xx_check_temp() local
3281 temp = qla82xx_rd_32(ha, CRB_TEMP_STATE); in qla82xx_check_temp()
3310 struct qla_hw_data *ha = vha->hw; in qla82xx_clear_pending_mbx() local
3312 if (ha->flags.mbox_busy) { in qla82xx_clear_pending_mbx()
3313 ha->flags.mbox_int = 1; in qla82xx_clear_pending_mbx()
3314 ha->flags.mbox_busy = 0; in qla82xx_clear_pending_mbx()
3317 if (test_and_clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags)) in qla82xx_clear_pending_mbx()
3318 complete(&ha->mbx_intr_comp); in qla82xx_clear_pending_mbx()
3325 struct qla_hw_data *ha = vha->hw; in qla82xx_watchdog() local
3328 if (!ha->flags.nic_core_reset_hdlr_active) { in qla82xx_watchdog()
3329 dev_state = qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE); in qla82xx_watchdog()
3332 ha->flags.isp82xx_fw_hung = 1; in qla82xx_watchdog()
3350 ha->flags.isp82xx_fw_hung = 1; in qla82xx_watchdog()
3356 qla82xx_wr_32(ha, QLA82XX_CRB_NIU + 0x98, in qla82xx_watchdog()
3358 halt_status = qla82xx_rd_32(ha, in qla82xx_watchdog()
3366 qla82xx_rd_32(ha, QLA82XX_PEG_HALT_STATUS2), in qla82xx_watchdog()
3367 qla82xx_rd_32(ha, in qla82xx_watchdog()
3369 qla82xx_rd_32(ha, in qla82xx_watchdog()
3371 qla82xx_rd_32(ha, in qla82xx_watchdog()
3373 qla82xx_rd_32(ha, in qla82xx_watchdog()
3375 qla82xx_rd_32(ha, in qla82xx_watchdog()
3391 ha->flags.isp82xx_fw_hung = 1; in qla82xx_watchdog()
3402 struct qla_hw_data *ha = vha->hw; in qla82xx_load_risc() local
3404 if (IS_QLA82XX(ha)) in qla82xx_load_risc()
3406 else if (IS_QLA8044(ha)) { in qla82xx_load_risc()
3407 qla8044_idc_lock(ha); in qla82xx_load_risc()
3410 qla8044_idc_unlock(ha); in qla82xx_load_risc()
3419 struct qla_hw_data *ha = vha->hw; in qla82xx_set_reset_owner() local
3422 if (IS_QLA82XX(ha)) in qla82xx_set_reset_owner()
3423 dev_state = qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE); in qla82xx_set_reset_owner()
3424 else if (IS_QLA8044(ha)) in qla82xx_set_reset_owner()
3430 if (IS_QLA82XX(ha)) { in qla82xx_set_reset_owner()
3431 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, in qla82xx_set_reset_owner()
3433 ha->flags.nic_core_reset_owner = 1; in qla82xx_set_reset_owner()
3435 "reset_owner is 0x%x\n", ha->portnum); in qla82xx_set_reset_owner()
3436 } else if (IS_QLA8044(ha)) in qla82xx_set_reset_owner()
3460 struct qla_hw_data *ha = vha->hw; in qla82xx_abort_isp() local
3467 ha->flags.nic_core_reset_hdlr_active = 1; in qla82xx_abort_isp()
3469 qla82xx_idc_lock(ha); in qla82xx_abort_isp()
3471 qla82xx_idc_unlock(ha); in qla82xx_abort_isp()
3473 if (IS_QLA82XX(ha)) in qla82xx_abort_isp()
3475 else if (IS_QLA8044(ha)) { in qla82xx_abort_isp()
3476 qla8044_idc_lock(ha); in qla82xx_abort_isp()
3479 qla8044_idc_unlock(ha); in qla82xx_abort_isp()
3483 qla82xx_idc_lock(ha); in qla82xx_abort_isp()
3484 qla82xx_clear_rst_ready(ha); in qla82xx_abort_isp()
3485 qla82xx_idc_unlock(ha); in qla82xx_abort_isp()
3488 ha->flags.isp82xx_fw_hung = 0; in qla82xx_abort_isp()
3489 ha->flags.nic_core_reset_hdlr_active = 0; in qla82xx_abort_isp()
3496 if (ha->isp_abort_cnt == 0) { in qla82xx_abort_isp()
3504 ha->isp_ops->reset_adapter(vha); in qla82xx_abort_isp()
3510 ha->isp_abort_cnt--; in qla82xx_abort_isp()
3513 ha->isp_abort_cnt); in qla82xx_abort_isp()
3517 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT; in qla82xx_abort_isp()
3520 ha->isp_abort_cnt); in qla82xx_abort_isp()
3603 struct qla_hw_data *ha = vha->hw; in qla82xx_chip_reset_cleanup() local
3609 if (!ha->flags.isp82xx_fw_hung) { in qla82xx_chip_reset_cleanup()
3612 if (IS_QLA82XX(ha)) in qla82xx_chip_reset_cleanup()
3614 else if (IS_QLA8044(ha)) in qla82xx_chip_reset_cleanup()
3617 ha->flags.isp82xx_fw_hung = 1; in qla82xx_chip_reset_cleanup()
3625 __func__, ha->flags.isp82xx_fw_hung); in qla82xx_chip_reset_cleanup()
3628 if (!ha->flags.isp82xx_fw_hung) { in qla82xx_chip_reset_cleanup()
3633 spin_lock_irqsave(&ha->hardware_lock, flags); in qla82xx_chip_reset_cleanup()
3634 for (que = 0; que < ha->max_req_queues; que++) { in qla82xx_chip_reset_cleanup()
3635 req = ha->req_q_map[que]; in qla82xx_chip_reset_cleanup()
3644 !ha->flags.isp82xx_fw_hung) { in qla82xx_chip_reset_cleanup()
3646 &ha->hardware_lock, flags); in qla82xx_chip_reset_cleanup()
3647 if (ha->isp_ops->abort_command(sp)) { in qla82xx_chip_reset_cleanup()
3656 spin_lock_irqsave(&ha->hardware_lock, flags); in qla82xx_chip_reset_cleanup()
3661 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla82xx_chip_reset_cleanup()
3680 struct qla_hw_data *ha = vha->hw; in qla82xx_minidump_process_control() local
3689 tmplt_hdr = (struct qla82xx_md_template_hdr *)ha->md_tmplt_hdr; in qla82xx_minidump_process_control()
3696 qla82xx_md_rw_32(ha, crb_addr, in qla82xx_minidump_process_control()
3702 read_value = qla82xx_md_rw_32(ha, crb_addr, 0, 0); in qla82xx_minidump_process_control()
3703 qla82xx_md_rw_32(ha, crb_addr, read_value, 1); in qla82xx_minidump_process_control()
3708 read_value = qla82xx_md_rw_32(ha, crb_addr, 0, 0); in qla82xx_minidump_process_control()
3715 qla82xx_md_rw_32(ha, crb_addr, read_value, 1); in qla82xx_minidump_process_control()
3719 read_value = qla82xx_md_rw_32(ha, crb_addr, 0, 0); in qla82xx_minidump_process_control()
3721 qla82xx_md_rw_32(ha, crb_addr, read_value, 1); in qla82xx_minidump_process_control()
3728 read_value = qla82xx_md_rw_32(ha, crb_addr, 0, 0); in qla82xx_minidump_process_control()
3739 read_value = qla82xx_md_rw_32(ha, in qla82xx_minidump_process_control()
3752 read_value = qla82xx_md_rw_32(ha, addr, 0, 0); in qla82xx_minidump_process_control()
3772 qla82xx_md_rw_32(ha, addr, read_value, 1); in qla82xx_minidump_process_control()
3797 struct qla_hw_data *ha = vha->hw; in qla82xx_minidump_process_rdocm() local
3808 r_value = rd_reg_dword(r_addr + ha->nx_pcibase); in qla82xx_minidump_process_rdocm()
3819 struct qla_hw_data *ha = vha->hw; in qla82xx_minidump_process_rdmux() local
3832 qla82xx_md_rw_32(ha, s_addr, s_value, 1); in qla82xx_minidump_process_rdmux()
3833 r_value = qla82xx_md_rw_32(ha, r_addr, 0, 0); in qla82xx_minidump_process_rdmux()
3845 struct qla_hw_data *ha = vha->hw; in qla82xx_minidump_process_rdcrb() local
3856 r_value = qla82xx_md_rw_32(ha, r_addr, 0, 0); in qla82xx_minidump_process_rdcrb()
3868 struct qla_hw_data *ha = vha->hw; in qla82xx_minidump_process_l2tag() local
3890 qla82xx_md_rw_32(ha, t_r_addr, t_value, 1); in qla82xx_minidump_process_l2tag()
3892 qla82xx_md_rw_32(ha, c_addr, c_value_w, 1); in qla82xx_minidump_process_l2tag()
3897 c_value_r = qla82xx_md_rw_32(ha, c_addr, 0, 0); in qla82xx_minidump_process_l2tag()
3913 r_value = qla82xx_md_rw_32(ha, addr, 0, 0); in qla82xx_minidump_process_l2tag()
3927 struct qla_hw_data *ha = vha->hw; in qla82xx_minidump_process_l1cache() local
3945 qla82xx_md_rw_32(ha, t_r_addr, t_value, 1); in qla82xx_minidump_process_l1cache()
3946 qla82xx_md_rw_32(ha, c_addr, c_value_w, 1); in qla82xx_minidump_process_l1cache()
3949 r_value = qla82xx_md_rw_32(ha, addr, 0, 0); in qla82xx_minidump_process_l1cache()
3962 struct qla_hw_data *ha = vha->hw; in qla82xx_minidump_process_queue() local
3976 qla82xx_md_rw_32(ha, s_addr, qid, 1); in qla82xx_minidump_process_queue()
3979 r_value = qla82xx_md_rw_32(ha, r_addr, 0, 0); in qla82xx_minidump_process_queue()
3992 struct qla_hw_data *ha = vha->hw; in qla82xx_minidump_process_rdrom() local
4003 qla82xx_md_rw_32(ha, MD_DIRECT_ROM_WINDOW, in qla82xx_minidump_process_rdrom()
4005 r_value = qla82xx_md_rw_32(ha, in qla82xx_minidump_process_rdrom()
4018 struct qla_hw_data *ha = vha->hw; in qla82xx_minidump_process_rdmem() local
4047 write_lock_irqsave(&ha->hw_lock, flags); in qla82xx_minidump_process_rdmem()
4049 qla82xx_md_rw_32(ha, MD_MIU_TEST_AGT_ADDR_LO, r_addr, 1); in qla82xx_minidump_process_rdmem()
4051 qla82xx_md_rw_32(ha, MD_MIU_TEST_AGT_ADDR_HI, r_value, 1); in qla82xx_minidump_process_rdmem()
4053 qla82xx_md_rw_32(ha, MD_MIU_TEST_AGT_CTRL, r_value, 1); in qla82xx_minidump_process_rdmem()
4055 qla82xx_md_rw_32(ha, MD_MIU_TEST_AGT_CTRL, r_value, 1); in qla82xx_minidump_process_rdmem()
4058 r_value = qla82xx_md_rw_32(ha, in qla82xx_minidump_process_rdmem()
4067 write_unlock_irqrestore(&ha->hw_lock, flags); in qla82xx_minidump_process_rdmem()
4072 r_data = qla82xx_md_rw_32(ha, in qla82xx_minidump_process_rdmem()
4078 write_unlock_irqrestore(&ha->hw_lock, flags); in qla82xx_minidump_process_rdmem()
4086 struct qla_hw_data *ha = vha->hw; in qla82xx_validate_template_chksum() local
4088 uint32_t *d_ptr = (uint32_t *)ha->md_tmplt_hdr; in qla82xx_validate_template_chksum()
4089 int count = ha->md_template_size/sizeof(uint32_t); in qla82xx_validate_template_chksum()
4113 struct qla_hw_data *ha = vha->hw; in qla82xx_md_collect() local
4121 tmplt_hdr = (struct qla82xx_md_template_hdr *)ha->md_tmplt_hdr; in qla82xx_md_collect()
4122 data_ptr = ha->md_dump; in qla82xx_md_collect()
4124 if (ha->fw_dumped) { in qla82xx_md_collect()
4127 "-- ignoring request.\n", ha->fw_dump); in qla82xx_md_collect()
4131 ha->fw_dumped = false; in qla82xx_md_collect()
4133 if (!ha->md_tmplt_hdr || !ha->md_dump) { in qla82xx_md_collect()
4139 if (ha->flags.isp82xx_no_md_cap) { in qla82xx_md_collect()
4143 ha->flags.isp82xx_no_md_cap = 0; in qla82xx_md_collect()
4176 total_data_size = ha->md_dump_size; in qla82xx_md_collect()
4190 (((uint8_t *)ha->md_tmplt_hdr) + tmplt_hdr->first_entry_offset); in qla82xx_md_collect()
4223 data_collected, (ha->md_dump_size - data_collected)); in qla82xx_md_collect()
4294 (uint8_t *)ha->md_dump; in qla82xx_md_collect()
4310 vha->host_no, ha->md_tmplt_hdr, vha->host_no, ha->md_dump); in qla82xx_md_collect()
4311 ha->fw_dumped = true; in qla82xx_md_collect()
4321 struct qla_hw_data *ha = vha->hw; in qla82xx_md_alloc() local
4325 tmplt_hdr = (struct qla82xx_md_template_hdr *)ha->md_tmplt_hdr; in qla82xx_md_alloc()
4336 ha->md_dump_size += tmplt_hdr->capture_size_array[k]; in qla82xx_md_alloc()
4339 if (ha->md_dump) { in qla82xx_md_alloc()
4345 ha->md_dump = vmalloc(ha->md_dump_size); in qla82xx_md_alloc()
4346 if (ha->md_dump == NULL) { in qla82xx_md_alloc()
4349 "(0x%x).\n", ha->md_dump_size); in qla82xx_md_alloc()
4358 struct qla_hw_data *ha = vha->hw; in qla82xx_md_free() local
4361 if (ha->md_tmplt_hdr) { in qla82xx_md_free()
4364 ha->md_tmplt_hdr, ha->md_template_size / 1024); in qla82xx_md_free()
4365 dma_free_coherent(&ha->pdev->dev, ha->md_template_size, in qla82xx_md_free()
4366 ha->md_tmplt_hdr, ha->md_tmplt_hdr_dma); in qla82xx_md_free()
4367 ha->md_tmplt_hdr = NULL; in qla82xx_md_free()
4371 if (ha->md_dump) { in qla82xx_md_free()
4374 ha->md_dump, ha->md_dump_size / 1024); in qla82xx_md_free()
4375 vfree(ha->md_dump); in qla82xx_md_free()
4376 ha->md_dump_size = 0; in qla82xx_md_free()
4377 ha->md_dump = NULL; in qla82xx_md_free()
4384 struct qla_hw_data *ha = vha->hw; in qla82xx_md_prep() local
4392 ha->md_template_size / 1024); in qla82xx_md_prep()
4395 if (IS_QLA8044(ha)) in qla82xx_md_prep()
4409 ha->md_dump_size / 1024); in qla82xx_md_prep()
4413 ha->md_tmplt_hdr, in qla82xx_md_prep()
4414 ha->md_template_size / 1024); in qla82xx_md_prep()
4415 dma_free_coherent(&ha->pdev->dev, in qla82xx_md_prep()
4416 ha->md_template_size, in qla82xx_md_prep()
4417 ha->md_tmplt_hdr, ha->md_tmplt_hdr_dma); in qla82xx_md_prep()
4418 ha->md_tmplt_hdr = NULL; in qla82xx_md_prep()
4430 struct qla_hw_data *ha = vha->hw; in qla82xx_beacon_on() local
4432 qla82xx_idc_lock(ha); in qla82xx_beacon_on()
4440 ha->beacon_blink_led = 1; in qla82xx_beacon_on()
4442 qla82xx_idc_unlock(ha); in qla82xx_beacon_on()
4451 struct qla_hw_data *ha = vha->hw; in qla82xx_beacon_off() local
4453 qla82xx_idc_lock(ha); in qla82xx_beacon_off()
4461 ha->beacon_blink_led = 0; in qla82xx_beacon_off()
4463 qla82xx_idc_unlock(ha); in qla82xx_beacon_off()
4470 struct qla_hw_data *ha = vha->hw; in qla82xx_fw_dump() local
4472 if (!ha->allow_cna_fw_dump) in qla82xx_fw_dump()
4476 ha->flags.isp82xx_no_md_cap = 1; in qla82xx_fw_dump()
4477 qla82xx_idc_lock(ha); in qla82xx_fw_dump()
4479 qla82xx_idc_unlock(ha); in qla82xx_fw_dump()