Lines Matching refs:pwrc_domain
71 bool (*is_powered_off)(struct meson_ee_pwrc_domain *pwrc_domain);
243 static bool pwrc_ee_is_powered_off(struct meson_ee_pwrc_domain *pwrc_domain);
317 static bool pwrc_ee_is_powered_off(struct meson_ee_pwrc_domain *pwrc_domain) in pwrc_ee_is_powered_off() argument
321 regmap_read(pwrc_domain->pwrc->regmap_ao, in pwrc_ee_is_powered_off()
322 pwrc_domain->desc.top_pd->sleep_reg, ®); in pwrc_ee_is_powered_off()
324 return (reg & pwrc_domain->desc.top_pd->sleep_mask); in pwrc_ee_is_powered_off()
329 struct meson_ee_pwrc_domain *pwrc_domain = in meson_ee_pwrc_off() local
333 if (pwrc_domain->desc.top_pd) in meson_ee_pwrc_off()
334 regmap_update_bits(pwrc_domain->pwrc->regmap_ao, in meson_ee_pwrc_off()
335 pwrc_domain->desc.top_pd->sleep_reg, in meson_ee_pwrc_off()
336 pwrc_domain->desc.top_pd->sleep_mask, in meson_ee_pwrc_off()
337 pwrc_domain->desc.top_pd->sleep_mask); in meson_ee_pwrc_off()
340 for (i = 0 ; i < pwrc_domain->desc.mem_pd_count ; ++i) in meson_ee_pwrc_off()
341 regmap_update_bits(pwrc_domain->pwrc->regmap_hhi, in meson_ee_pwrc_off()
342 pwrc_domain->desc.mem_pd[i].reg, in meson_ee_pwrc_off()
343 pwrc_domain->desc.mem_pd[i].mask, in meson_ee_pwrc_off()
344 pwrc_domain->desc.mem_pd[i].mask); in meson_ee_pwrc_off()
348 if (pwrc_domain->desc.top_pd) in meson_ee_pwrc_off()
349 regmap_update_bits(pwrc_domain->pwrc->regmap_ao, in meson_ee_pwrc_off()
350 pwrc_domain->desc.top_pd->iso_reg, in meson_ee_pwrc_off()
351 pwrc_domain->desc.top_pd->iso_mask, in meson_ee_pwrc_off()
352 pwrc_domain->desc.top_pd->iso_mask); in meson_ee_pwrc_off()
354 if (pwrc_domain->num_clks) { in meson_ee_pwrc_off()
356 clk_bulk_disable_unprepare(pwrc_domain->num_clks, in meson_ee_pwrc_off()
357 pwrc_domain->clks); in meson_ee_pwrc_off()
365 struct meson_ee_pwrc_domain *pwrc_domain = in meson_ee_pwrc_on() local
369 if (pwrc_domain->desc.top_pd) in meson_ee_pwrc_on()
370 regmap_update_bits(pwrc_domain->pwrc->regmap_ao, in meson_ee_pwrc_on()
371 pwrc_domain->desc.top_pd->sleep_reg, in meson_ee_pwrc_on()
372 pwrc_domain->desc.top_pd->sleep_mask, 0); in meson_ee_pwrc_on()
375 for (i = 0 ; i < pwrc_domain->desc.mem_pd_count ; ++i) in meson_ee_pwrc_on()
376 regmap_update_bits(pwrc_domain->pwrc->regmap_hhi, in meson_ee_pwrc_on()
377 pwrc_domain->desc.mem_pd[i].reg, in meson_ee_pwrc_on()
378 pwrc_domain->desc.mem_pd[i].mask, 0); in meson_ee_pwrc_on()
382 ret = reset_control_assert(pwrc_domain->rstc); in meson_ee_pwrc_on()
386 if (pwrc_domain->desc.top_pd) in meson_ee_pwrc_on()
387 regmap_update_bits(pwrc_domain->pwrc->regmap_ao, in meson_ee_pwrc_on()
388 pwrc_domain->desc.top_pd->iso_reg, in meson_ee_pwrc_on()
389 pwrc_domain->desc.top_pd->iso_mask, 0); in meson_ee_pwrc_on()
391 ret = reset_control_deassert(pwrc_domain->rstc); in meson_ee_pwrc_on()
395 return clk_bulk_prepare_enable(pwrc_domain->num_clks, in meson_ee_pwrc_on()
396 pwrc_domain->clks); in meson_ee_pwrc_on()