Lines Matching refs:reg_read

157 	int (*reg_read)(struct qcom_swrm_ctrl *ctrl, int reg, u32 *val);  member
260 		swrm->reg_read(swrm, SWRM_CMD_FIFO_STATUS, &value);  in swrm_wait_for_rd_fifo_avail()
285 		swrm->reg_read(swrm, SWRM_CMD_FIFO_STATUS, &value);  in swrm_wait_for_wr_fifo_avail()
366 		swrm->reg_read(swrm, SWRM_CMD_FIFO_RD_FIFO_ADDR, &cmd_data);  in qcom_swrm_cmd_fifo_rd_cmd()
397 	ctrl->reg_read(ctrl, SWRM_MCP_SLV_STATUS, &val);  in qcom_swrm_get_alert_slave_dev_num()
416 	ctrl->reg_read(ctrl, SWRM_MCP_SLV_STATUS, &val);  in qcom_swrm_get_device_status()
434 	ctrl->reg_read(ctrl, SWRM_MCP_SLV_STATUS, &status);  in qcom_swrm_set_slave_dev_num()
460 		ctrl->reg_read(ctrl, SWRM_ENUMERATOR_SLAVE_DEV_ID_1(i), &val1);  in qcom_swrm_enumerate()
463 		ctrl->reg_read(ctrl, SWRM_ENUMERATOR_SLAVE_DEV_ID_2(i), &val2);  in qcom_swrm_enumerate()
501 	swrm->reg_read(swrm, SWRM_INTERRUPT_STATUS, &intr_sts);  in qcom_swrm_irq_handler()
525 				swrm->reg_read(swrm, SWRM_MCP_SLV_STATUS, &slave_status);  in qcom_swrm_irq_handler()
543 				swrm->reg_read(swrm, SWRM_CMD_FIFO_STATUS, &value);  in qcom_swrm_irq_handler()
549 				swrm->reg_read(swrm, SWRM_CMD_FIFO_STATUS, &value);  in qcom_swrm_irq_handler()
555 				swrm->reg_read(swrm, SWRM_CMD_FIFO_STATUS, &value);  in qcom_swrm_irq_handler()
562 				swrm->reg_read(swrm, SWRM_CMD_FIFO_STATUS, &value);  in qcom_swrm_irq_handler()
603 		swrm->reg_read(swrm, SWRM_INTERRUPT_STATUS, &intr_sts);  in qcom_swrm_irq_handler()
629 	ctrl->reg_read(ctrl, SWRM_MCP_CFG_ADDR, &val);  in qcom_swrm_init()
656 	ctrl->reg_read(ctrl, SWRM_COMP_PARAMS, &val);  in qcom_swrm_init()
703 	ctrl->reg_read(ctrl, reg, &val);  in qcom_swrm_pre_bank_switch()
789 	ctrl->reg_read(ctrl, reg, &val);  in qcom_swrm_port_enable()
1113 	ctrl->reg_read(ctrl, SWRM_COMP_PARAMS, &val);  in qcom_swrm_get_port_config()
1161 		ctrl->reg_read(ctrl, SWRM_COMP_HW_VERSION, &version);  in qcom_swrm_get_port_config()
1207 		swrm->reg_read(swrm, reg, &reg_val);  in swrm_reg_show()
1238 		ctrl->reg_read = qcom_swrm_ahb_reg_read;
1244 		ctrl->reg_read = qcom_swrm_cpu_reg_read;
1284 	ctrl->reg_read(ctrl, SWRM_MCP_STATUS, &val);
1296 	ctrl->reg_read(ctrl, SWRM_COMP_HW_VERSION, &ctrl->version);