Lines Matching refs:sp
48 static inline u32 ath79_spi_rr(struct ath79_spi *sp, unsigned int reg) in ath79_spi_rr() argument
50 return ioread32(sp->base + reg); in ath79_spi_rr()
53 static inline void ath79_spi_wr(struct ath79_spi *sp, unsigned int reg, u32 val) in ath79_spi_wr() argument
55 iowrite32(val, sp->base + reg); in ath79_spi_wr()
63 static inline void ath79_spi_delay(struct ath79_spi *sp, unsigned int nsecs) in ath79_spi_delay() argument
65 if (nsecs > sp->rrw_delay) in ath79_spi_delay()
66 ndelay(nsecs - sp->rrw_delay); in ath79_spi_delay()
71 struct ath79_spi *sp = ath79_spidev_to_sp(spi); in ath79_spi_chipselect() local
76 sp->ioc_base |= cs_bit; in ath79_spi_chipselect()
78 sp->ioc_base &= ~cs_bit; in ath79_spi_chipselect()
80 ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base); in ath79_spi_chipselect()
83 static void ath79_spi_enable(struct ath79_spi *sp) in ath79_spi_enable() argument
86 ath79_spi_wr(sp, AR71XX_SPI_REG_FS, AR71XX_SPI_FS_GPIO); in ath79_spi_enable()
89 sp->reg_ctrl = ath79_spi_rr(sp, AR71XX_SPI_REG_CTRL); in ath79_spi_enable()
90 sp->ioc_base = ath79_spi_rr(sp, AR71XX_SPI_REG_IOC); in ath79_spi_enable()
93 sp->ioc_base &= ~(AR71XX_SPI_IOC_DO | AR71XX_SPI_IOC_CLK); in ath79_spi_enable()
96 ath79_spi_wr(sp, AR71XX_SPI_REG_CTRL, 0x43); in ath79_spi_enable()
99 static void ath79_spi_disable(struct ath79_spi *sp) in ath79_spi_disable() argument
102 ath79_spi_wr(sp, AR71XX_SPI_REG_CTRL, sp->reg_ctrl); in ath79_spi_disable()
104 ath79_spi_wr(sp, AR71XX_SPI_REG_FS, 0); in ath79_spi_disable()
110 struct ath79_spi *sp = ath79_spidev_to_sp(spi); in ath79_spi_txrx_mode0() local
111 u32 ioc = sp->ioc_base; in ath79_spi_txrx_mode0()
123 ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, out); in ath79_spi_txrx_mode0()
124 ath79_spi_delay(sp, nsecs); in ath79_spi_txrx_mode0()
125 ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, out | AR71XX_SPI_IOC_CLK); in ath79_spi_txrx_mode0()
126 ath79_spi_delay(sp, nsecs); in ath79_spi_txrx_mode0()
128 ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, out); in ath79_spi_txrx_mode0()
133 return ath79_spi_rr(sp, AR71XX_SPI_REG_RDS); in ath79_spi_txrx_mode0()
139 struct ath79_spi *sp; in ath79_spi_probe() local
143 master = spi_alloc_master(&pdev->dev, sizeof(*sp)); in ath79_spi_probe()
149 sp = spi_master_get_devdata(master); in ath79_spi_probe()
151 platform_set_drvdata(pdev, sp); in ath79_spi_probe()
158 sp->bitbang.master = master; in ath79_spi_probe()
159 sp->bitbang.chipselect = ath79_spi_chipselect; in ath79_spi_probe()
160 sp->bitbang.txrx_word[SPI_MODE_0] = ath79_spi_txrx_mode0; in ath79_spi_probe()
161 sp->bitbang.flags = SPI_CS_HIGH; in ath79_spi_probe()
163 sp->base = devm_platform_ioremap_resource(pdev, 0); in ath79_spi_probe()
164 if (IS_ERR(sp->base)) { in ath79_spi_probe()
165 ret = PTR_ERR(sp->base); in ath79_spi_probe()
169 sp->clk = devm_clk_get(&pdev->dev, "ahb"); in ath79_spi_probe()
170 if (IS_ERR(sp->clk)) { in ath79_spi_probe()
171 ret = PTR_ERR(sp->clk); in ath79_spi_probe()
175 ret = clk_prepare_enable(sp->clk); in ath79_spi_probe()
179 rate = DIV_ROUND_UP(clk_get_rate(sp->clk), MHZ); in ath79_spi_probe()
185 sp->rrw_delay = ATH79_SPI_RRW_DELAY_FACTOR / rate; in ath79_spi_probe()
187 sp->rrw_delay); in ath79_spi_probe()
189 ath79_spi_enable(sp); in ath79_spi_probe()
190 ret = spi_bitbang_start(&sp->bitbang); in ath79_spi_probe()
197 ath79_spi_disable(sp); in ath79_spi_probe()
199 clk_disable_unprepare(sp->clk); in ath79_spi_probe()
201 spi_master_put(sp->bitbang.master); in ath79_spi_probe()
208 struct ath79_spi *sp = platform_get_drvdata(pdev); in ath79_spi_remove() local
210 spi_bitbang_stop(&sp->bitbang); in ath79_spi_remove()
211 ath79_spi_disable(sp); in ath79_spi_remove()
212 clk_disable_unprepare(sp->clk); in ath79_spi_remove()
213 spi_master_put(sp->bitbang.master); in ath79_spi_remove()