Lines Matching refs:sport
327 static inline bool is_layerscape_lpuart(struct lpuart_port *sport) in is_layerscape_lpuart() argument
329 return (sport->devtype == LS1021A_LPUART || in is_layerscape_lpuart()
330 sport->devtype == LS1028A_LPUART); in is_layerscape_lpuart()
333 static inline bool is_imx7ulp_lpuart(struct lpuart_port *sport) in is_imx7ulp_lpuart() argument
335 return sport->devtype == IMX7ULP_LPUART; in is_imx7ulp_lpuart()
338 static inline bool is_imx8qxp_lpuart(struct lpuart_port *sport) in is_imx8qxp_lpuart() argument
340 return sport->devtype == IMX8QXP_LPUART; in is_imx8qxp_lpuart()
368 static int __lpuart_enable_clks(struct lpuart_port *sport, bool is_en) in __lpuart_enable_clks() argument
373 ret = clk_prepare_enable(sport->ipg_clk); in __lpuart_enable_clks()
377 ret = clk_prepare_enable(sport->baud_clk); in __lpuart_enable_clks()
379 clk_disable_unprepare(sport->ipg_clk); in __lpuart_enable_clks()
383 clk_disable_unprepare(sport->baud_clk); in __lpuart_enable_clks()
384 clk_disable_unprepare(sport->ipg_clk); in __lpuart_enable_clks()
390 static unsigned int lpuart_get_baud_clk_rate(struct lpuart_port *sport) in lpuart_get_baud_clk_rate() argument
392 if (is_imx8qxp_lpuart(sport)) in lpuart_get_baud_clk_rate()
393 return clk_get_rate(sport->baud_clk); in lpuart_get_baud_clk_rate()
395 return clk_get_rate(sport->ipg_clk); in lpuart_get_baud_clk_rate()
401 static int lpuart_global_reset(struct lpuart_port *sport) in lpuart_global_reset() argument
403 struct uart_port *port = &sport->port; in lpuart_global_reset()
410 ret = clk_prepare_enable(sport->ipg_clk); in lpuart_global_reset()
412 dev_err(sport->port.dev, "failed to enable uart ipg clk: %d\n", ret); in lpuart_global_reset()
416 if (is_imx7ulp_lpuart(sport) || is_imx8qxp_lpuart(sport)) { in lpuart_global_reset()
424 clk_disable_unprepare(sport->ipg_clk); in lpuart_global_reset()
462 static void lpuart_dma_tx(struct lpuart_port *sport) in lpuart_dma_tx() argument
464 struct circ_buf *xmit = &sport->port.state->xmit; in lpuart_dma_tx()
465 struct scatterlist *sgl = sport->tx_sgl; in lpuart_dma_tx()
466 struct device *dev = sport->port.dev; in lpuart_dma_tx()
467 struct dma_chan *chan = sport->dma_tx_chan; in lpuart_dma_tx()
470 if (sport->dma_tx_in_progress) in lpuart_dma_tx()
473 sport->dma_tx_bytes = uart_circ_chars_pending(xmit); in lpuart_dma_tx()
476 sport->dma_tx_nents = 1; in lpuart_dma_tx()
477 sg_init_one(sgl, xmit->buf + xmit->tail, sport->dma_tx_bytes); in lpuart_dma_tx()
479 sport->dma_tx_nents = 2; in lpuart_dma_tx()
486 ret = dma_map_sg(chan->device->dev, sgl, sport->dma_tx_nents, in lpuart_dma_tx()
493 sport->dma_tx_desc = dmaengine_prep_slave_sg(chan, sgl, in lpuart_dma_tx()
496 if (!sport->dma_tx_desc) { in lpuart_dma_tx()
497 dma_unmap_sg(chan->device->dev, sgl, sport->dma_tx_nents, in lpuart_dma_tx()
503 sport->dma_tx_desc->callback = lpuart_dma_tx_complete; in lpuart_dma_tx()
504 sport->dma_tx_desc->callback_param = sport; in lpuart_dma_tx()
505 sport->dma_tx_in_progress = true; in lpuart_dma_tx()
506 sport->dma_tx_cookie = dmaengine_submit(sport->dma_tx_desc); in lpuart_dma_tx()
517 struct lpuart_port *sport = arg; in lpuart_dma_tx_complete() local
518 struct scatterlist *sgl = &sport->tx_sgl[0]; in lpuart_dma_tx_complete()
519 struct circ_buf *xmit = &sport->port.state->xmit; in lpuart_dma_tx_complete()
520 struct dma_chan *chan = sport->dma_tx_chan; in lpuart_dma_tx_complete()
523 spin_lock_irqsave(&sport->port.lock, flags); in lpuart_dma_tx_complete()
524 if (!sport->dma_tx_in_progress) { in lpuart_dma_tx_complete()
525 spin_unlock_irqrestore(&sport->port.lock, flags); in lpuart_dma_tx_complete()
529 dma_unmap_sg(chan->device->dev, sgl, sport->dma_tx_nents, in lpuart_dma_tx_complete()
532 xmit->tail = (xmit->tail + sport->dma_tx_bytes) & (UART_XMIT_SIZE - 1); in lpuart_dma_tx_complete()
534 sport->port.icount.tx += sport->dma_tx_bytes; in lpuart_dma_tx_complete()
535 sport->dma_tx_in_progress = false; in lpuart_dma_tx_complete()
536 spin_unlock_irqrestore(&sport->port.lock, flags); in lpuart_dma_tx_complete()
539 uart_write_wakeup(&sport->port); in lpuart_dma_tx_complete()
541 if (waitqueue_active(&sport->dma_wait)) { in lpuart_dma_tx_complete()
542 wake_up(&sport->dma_wait); in lpuart_dma_tx_complete()
546 spin_lock_irqsave(&sport->port.lock, flags); in lpuart_dma_tx_complete()
548 if (!lpuart_stopped_or_empty(&sport->port)) in lpuart_dma_tx_complete()
549 lpuart_dma_tx(sport); in lpuart_dma_tx_complete()
551 spin_unlock_irqrestore(&sport->port.lock, flags); in lpuart_dma_tx_complete()
554 static dma_addr_t lpuart_dma_datareg_addr(struct lpuart_port *sport) in lpuart_dma_datareg_addr() argument
556 switch (sport->port.iotype) { in lpuart_dma_datareg_addr()
558 return sport->port.mapbase + UARTDATA; in lpuart_dma_datareg_addr()
560 return sport->port.mapbase + UARTDATA + sizeof(u32) - 1; in lpuart_dma_datareg_addr()
562 return sport->port.mapbase + UARTDR; in lpuart_dma_datareg_addr()
567 struct lpuart_port *sport = container_of(port, in lpuart_dma_tx_request() local
572 dma_tx_sconfig.dst_addr = lpuart_dma_datareg_addr(sport); in lpuart_dma_tx_request()
576 ret = dmaengine_slave_config(sport->dma_tx_chan, &dma_tx_sconfig); in lpuart_dma_tx_request()
579 dev_err(sport->port.dev, in lpuart_dma_tx_request()
587 static bool lpuart_is_32(struct lpuart_port *sport) in lpuart_is_32() argument
589 return sport->port.iotype == UPIO_MEM32 || in lpuart_is_32()
590 sport->port.iotype == UPIO_MEM32BE; in lpuart_is_32()
595 struct lpuart_port *sport = container_of(port, struct lpuart_port, port); in lpuart_flush_buffer() local
596 struct dma_chan *chan = sport->dma_tx_chan; in lpuart_flush_buffer()
599 if (sport->lpuart_dma_tx_use) { in lpuart_flush_buffer()
600 if (sport->dma_tx_in_progress) { in lpuart_flush_buffer()
601 dma_unmap_sg(chan->device->dev, &sport->tx_sgl[0], in lpuart_flush_buffer()
602 sport->dma_tx_nents, DMA_TO_DEVICE); in lpuart_flush_buffer()
603 sport->dma_tx_in_progress = false; in lpuart_flush_buffer()
608 if (lpuart_is_32(sport)) { in lpuart_flush_buffer()
609 val = lpuart32_read(&sport->port, UARTFIFO); in lpuart_flush_buffer()
611 lpuart32_write(&sport->port, val, UARTFIFO); in lpuart_flush_buffer()
613 val = readb(sport->port.membase + UARTCFIFO); in lpuart_flush_buffer()
615 writeb(val, sport->port.membase + UARTCFIFO); in lpuart_flush_buffer()
637 struct lpuart_port *sport = container_of(port, in lpuart_poll_init() local
642 sport->port.fifosize = 0; in lpuart_poll_init()
644 spin_lock_irqsave(&sport->port.lock, flags); in lpuart_poll_init()
646 writeb(0, sport->port.membase + UARTCR2); in lpuart_poll_init()
648 temp = readb(sport->port.membase + UARTPFIFO); in lpuart_poll_init()
651 sport->port.membase + UARTPFIFO); in lpuart_poll_init()
655 sport->port.membase + UARTCFIFO); in lpuart_poll_init()
658 if (readb(sport->port.membase + UARTSR1) & UARTSR1_RDRF) { in lpuart_poll_init()
659 readb(sport->port.membase + UARTDR); in lpuart_poll_init()
660 writeb(UARTSFIFO_RXUF, sport->port.membase + UARTSFIFO); in lpuart_poll_init()
663 writeb(0, sport->port.membase + UARTTWFIFO); in lpuart_poll_init()
664 writeb(1, sport->port.membase + UARTRWFIFO); in lpuart_poll_init()
667 writeb(UARTCR2_RE | UARTCR2_TE, sport->port.membase + UARTCR2); in lpuart_poll_init()
668 spin_unlock_irqrestore(&sport->port.lock, flags); in lpuart_poll_init()
691 struct lpuart_port *sport = container_of(port, struct lpuart_port, port); in lpuart32_poll_init() local
694 sport->port.fifosize = 0; in lpuart32_poll_init()
696 spin_lock_irqsave(&sport->port.lock, flags); in lpuart32_poll_init()
699 lpuart32_write(&sport->port, 0, UARTCTRL); in lpuart32_poll_init()
701 temp = lpuart32_read(&sport->port, UARTFIFO); in lpuart32_poll_init()
704 lpuart32_write(&sport->port, temp | UARTFIFO_RXFE | UARTFIFO_TXFE, UARTFIFO); in lpuart32_poll_init()
707 lpuart32_write(&sport->port, UARTFIFO_TXFLUSH | UARTFIFO_RXFLUSH, UARTFIFO); in lpuart32_poll_init()
710 if (lpuart32_read(&sport->port, UARTSTAT) & UARTSTAT_RDRF) { in lpuart32_poll_init()
711 lpuart32_read(&sport->port, UARTDATA); in lpuart32_poll_init()
712 lpuart32_write(&sport->port, UARTFIFO_RXUF, UARTFIFO); in lpuart32_poll_init()
716 lpuart32_write(&sport->port, UARTCTRL_RE | UARTCTRL_TE, UARTCTRL); in lpuart32_poll_init()
717 spin_unlock_irqrestore(&sport->port.lock, flags); in lpuart32_poll_init()
737 static inline void lpuart_transmit_buffer(struct lpuart_port *sport) in lpuart_transmit_buffer() argument
739 struct circ_buf *xmit = &sport->port.state->xmit; in lpuart_transmit_buffer()
741 if (sport->port.x_char) { in lpuart_transmit_buffer()
742 writeb(sport->port.x_char, sport->port.membase + UARTDR); in lpuart_transmit_buffer()
743 sport->port.icount.tx++; in lpuart_transmit_buffer()
744 sport->port.x_char = 0; in lpuart_transmit_buffer()
748 if (lpuart_stopped_or_empty(&sport->port)) { in lpuart_transmit_buffer()
749 lpuart_stop_tx(&sport->port); in lpuart_transmit_buffer()
754 (readb(sport->port.membase + UARTTCFIFO) < sport->txfifo_size)) { in lpuart_transmit_buffer()
755 writeb(xmit->buf[xmit->tail], sport->port.membase + UARTDR); in lpuart_transmit_buffer()
757 sport->port.icount.tx++; in lpuart_transmit_buffer()
761 uart_write_wakeup(&sport->port); in lpuart_transmit_buffer()
764 lpuart_stop_tx(&sport->port); in lpuart_transmit_buffer()
767 static inline void lpuart32_transmit_buffer(struct lpuart_port *sport) in lpuart32_transmit_buffer() argument
769 struct circ_buf *xmit = &sport->port.state->xmit; in lpuart32_transmit_buffer()
772 if (sport->port.x_char) { in lpuart32_transmit_buffer()
773 lpuart32_write(&sport->port, sport->port.x_char, UARTDATA); in lpuart32_transmit_buffer()
774 sport->port.icount.tx++; in lpuart32_transmit_buffer()
775 sport->port.x_char = 0; in lpuart32_transmit_buffer()
779 if (lpuart_stopped_or_empty(&sport->port)) { in lpuart32_transmit_buffer()
780 lpuart32_stop_tx(&sport->port); in lpuart32_transmit_buffer()
784 txcnt = lpuart32_read(&sport->port, UARTWATER); in lpuart32_transmit_buffer()
787 while (!uart_circ_empty(xmit) && (txcnt < sport->txfifo_size)) { in lpuart32_transmit_buffer()
788 lpuart32_write(&sport->port, xmit->buf[xmit->tail], UARTDATA); in lpuart32_transmit_buffer()
790 sport->port.icount.tx++; in lpuart32_transmit_buffer()
791 txcnt = lpuart32_read(&sport->port, UARTWATER); in lpuart32_transmit_buffer()
797 uart_write_wakeup(&sport->port); in lpuart32_transmit_buffer()
800 lpuart32_stop_tx(&sport->port); in lpuart32_transmit_buffer()
805 struct lpuart_port *sport = container_of(port, in lpuart_start_tx() local
812 if (sport->lpuart_dma_tx_use) { in lpuart_start_tx()
814 lpuart_dma_tx(sport); in lpuart_start_tx()
817 lpuart_transmit_buffer(sport); in lpuart_start_tx()
823 struct lpuart_port *sport = container_of(port, struct lpuart_port, port); in lpuart32_start_tx() local
826 if (sport->lpuart_dma_tx_use) { in lpuart32_start_tx()
828 lpuart_dma_tx(sport); in lpuart32_start_tx()
834 lpuart32_transmit_buffer(sport); in lpuart32_start_tx()
841 struct lpuart_port *sport = container_of(port, in lpuart_tx_empty() local
846 if (sport->dma_tx_in_progress) in lpuart_tx_empty()
857 struct lpuart_port *sport = container_of(port, in lpuart32_tx_empty() local
862 if (sport->dma_tx_in_progress) in lpuart32_tx_empty()
871 static void lpuart_txint(struct lpuart_port *sport) in lpuart_txint() argument
873 spin_lock(&sport->port.lock); in lpuart_txint()
874 lpuart_transmit_buffer(sport); in lpuart_txint()
875 spin_unlock(&sport->port.lock); in lpuart_txint()
878 static void lpuart_rxint(struct lpuart_port *sport) in lpuart_rxint() argument
881 struct tty_port *port = &sport->port.state->port; in lpuart_rxint()
884 spin_lock(&sport->port.lock); in lpuart_rxint()
886 while (!(readb(sport->port.membase + UARTSFIFO) & UARTSFIFO_RXEMPT)) { in lpuart_rxint()
888 sport->port.icount.rx++; in lpuart_rxint()
893 sr = readb(sport->port.membase + UARTSR1); in lpuart_rxint()
894 rx = readb(sport->port.membase + UARTDR); in lpuart_rxint()
896 if (uart_prepare_sysrq_char(&sport->port, rx)) in lpuart_rxint()
901 sport->port.icount.parity++; in lpuart_rxint()
903 sport->port.icount.frame++; in lpuart_rxint()
908 if (sr & sport->port.ignore_status_mask) { in lpuart_rxint()
914 sr &= sport->port.read_status_mask; in lpuart_rxint()
924 sport->port.sysrq = 0; in lpuart_rxint()
932 sport->port.icount.overrun += overrun; in lpuart_rxint()
938 writeb(UARTCFIFO_RXFLUSH, sport->port.membase + UARTCFIFO); in lpuart_rxint()
939 writeb(UARTSFIFO_RXOF, sport->port.membase + UARTSFIFO); in lpuart_rxint()
942 uart_unlock_and_check_sysrq(&sport->port); in lpuart_rxint()
947 static void lpuart32_txint(struct lpuart_port *sport) in lpuart32_txint() argument
949 spin_lock(&sport->port.lock); in lpuart32_txint()
950 lpuart32_transmit_buffer(sport); in lpuart32_txint()
951 spin_unlock(&sport->port.lock); in lpuart32_txint()
954 static void lpuart32_rxint(struct lpuart_port *sport) in lpuart32_rxint() argument
957 struct tty_port *port = &sport->port.state->port; in lpuart32_rxint()
961 spin_lock(&sport->port.lock); in lpuart32_rxint()
963 while (!(lpuart32_read(&sport->port, UARTFIFO) & UARTFIFO_RXEMPT)) { in lpuart32_rxint()
965 sport->port.icount.rx++; in lpuart32_rxint()
970 sr = lpuart32_read(&sport->port, UARTSTAT); in lpuart32_rxint()
971 rx = lpuart32_read(&sport->port, UARTDATA); in lpuart32_rxint()
980 if (is_break && uart_handle_break(&sport->port)) in lpuart32_rxint()
983 if (uart_prepare_sysrq_char(&sport->port, rx)) in lpuart32_rxint()
989 sport->port.icount.brk++; in lpuart32_rxint()
991 sport->port.icount.parity++; in lpuart32_rxint()
993 sport->port.icount.frame++; in lpuart32_rxint()
997 sport->port.icount.overrun++; in lpuart32_rxint()
999 if (sr & sport->port.ignore_status_mask) { in lpuart32_rxint()
1005 sr &= sport->port.read_status_mask; in lpuart32_rxint()
1024 uart_unlock_and_check_sysrq(&sport->port); in lpuart32_rxint()
1031 struct lpuart_port *sport = dev_id; in lpuart_int() local
1034 sts = readb(sport->port.membase + UARTSR1); in lpuart_int()
1037 if (sts & UARTSR1_FE && sport->lpuart_dma_rx_use) { in lpuart_int()
1038 readb(sport->port.membase + UARTDR); in lpuart_int()
1039 uart_handle_break(&sport->port); in lpuart_int()
1041 writeb(UARTCFIFO_RXFLUSH, sport->port.membase + UARTCFIFO); in lpuart_int()
1045 if (sts & UARTSR1_RDRF && !sport->lpuart_dma_rx_use) in lpuart_int()
1046 lpuart_rxint(sport); in lpuart_int()
1048 if (sts & UARTSR1_TDRE && !sport->lpuart_dma_tx_use) in lpuart_int()
1049 lpuart_txint(sport); in lpuart_int()
1056 struct lpuart_port *sport = dev_id; in lpuart32_int() local
1059 sts = lpuart32_read(&sport->port, UARTSTAT); in lpuart32_int()
1060 rxcount = lpuart32_read(&sport->port, UARTWATER); in lpuart32_int()
1063 if ((sts & UARTSTAT_RDRF || rxcount > 0) && !sport->lpuart_dma_rx_use) in lpuart32_int()
1064 lpuart32_rxint(sport); in lpuart32_int()
1066 if ((sts & UARTSTAT_TDRE) && !sport->lpuart_dma_tx_use) in lpuart32_int()
1067 lpuart32_txint(sport); in lpuart32_int()
1069 lpuart32_write(&sport->port, sts, UARTSTAT); in lpuart32_int()
1084 static void lpuart_handle_sysrq(struct lpuart_port *sport) in lpuart_handle_sysrq() argument
1086 struct circ_buf *ring = &sport->rx_ring; in lpuart_handle_sysrq()
1090 count = sport->rx_sgl.length - ring->tail; in lpuart_handle_sysrq()
1091 lpuart_handle_sysrq_chars(&sport->port, in lpuart_handle_sysrq()
1098 lpuart_handle_sysrq_chars(&sport->port, in lpuart_handle_sysrq()
1104 static void lpuart_copy_rx_to_tty(struct lpuart_port *sport) in lpuart_copy_rx_to_tty() argument
1106 struct tty_port *port = &sport->port.state->port; in lpuart_copy_rx_to_tty()
1109 struct dma_chan *chan = sport->dma_rx_chan; in lpuart_copy_rx_to_tty()
1110 struct circ_buf *ring = &sport->rx_ring; in lpuart_copy_rx_to_tty()
1114 if (lpuart_is_32(sport)) { in lpuart_copy_rx_to_tty()
1115 unsigned long sr = lpuart32_read(&sport->port, UARTSTAT); in lpuart_copy_rx_to_tty()
1119 lpuart32_read(&sport->port, UARTDATA); in lpuart_copy_rx_to_tty()
1122 sport->port.icount.parity++; in lpuart_copy_rx_to_tty()
1124 sport->port.icount.frame++; in lpuart_copy_rx_to_tty()
1127 unsigned char sr = readb(sport->port.membase + UARTSR1); in lpuart_copy_rx_to_tty()
1133 cr2 = readb(sport->port.membase + UARTCR2); in lpuart_copy_rx_to_tty()
1135 writeb(cr2, sport->port.membase + UARTCR2); in lpuart_copy_rx_to_tty()
1138 readb(sport->port.membase + UARTDR); in lpuart_copy_rx_to_tty()
1141 sport->port.icount.parity++; in lpuart_copy_rx_to_tty()
1143 sport->port.icount.frame++; in lpuart_copy_rx_to_tty()
1153 if (readb(sport->port.membase + UARTSFIFO) & in lpuart_copy_rx_to_tty()
1156 sport->port.membase + UARTSFIFO); in lpuart_copy_rx_to_tty()
1158 sport->port.membase + UARTCFIFO); in lpuart_copy_rx_to_tty()
1162 writeb(cr2, sport->port.membase + UARTCR2); in lpuart_copy_rx_to_tty()
1166 async_tx_ack(sport->dma_rx_desc); in lpuart_copy_rx_to_tty()
1168 spin_lock_irqsave(&sport->port.lock, flags); in lpuart_copy_rx_to_tty()
1170 dmastat = dmaengine_tx_status(chan, sport->dma_rx_cookie, &state); in lpuart_copy_rx_to_tty()
1172 dev_err(sport->port.dev, "Rx DMA transfer failed!\n"); in lpuart_copy_rx_to_tty()
1173 spin_unlock_irqrestore(&sport->port.lock, flags); in lpuart_copy_rx_to_tty()
1178 dma_sync_sg_for_cpu(chan->device->dev, &sport->rx_sgl, 1, in lpuart_copy_rx_to_tty()
1188 ring->head = sport->rx_sgl.length - state.residue; in lpuart_copy_rx_to_tty()
1189 BUG_ON(ring->head > sport->rx_sgl.length); in lpuart_copy_rx_to_tty()
1194 if (sport->port.sysrq) { in lpuart_copy_rx_to_tty()
1195 lpuart_handle_sysrq(sport); in lpuart_copy_rx_to_tty()
1212 count = sport->rx_sgl.length - ring->tail; in lpuart_copy_rx_to_tty()
1216 sport->port.icount.rx += count; in lpuart_copy_rx_to_tty()
1224 if (ring->head >= sport->rx_sgl.length) in lpuart_copy_rx_to_tty()
1227 sport->port.icount.rx += count; in lpuart_copy_rx_to_tty()
1231 dma_sync_sg_for_device(chan->device->dev, &sport->rx_sgl, 1, in lpuart_copy_rx_to_tty()
1234 spin_unlock_irqrestore(&sport->port.lock, flags); in lpuart_copy_rx_to_tty()
1237 mod_timer(&sport->lpuart_timer, jiffies + sport->dma_rx_timeout); in lpuart_copy_rx_to_tty()
1242 struct lpuart_port *sport = arg; in lpuart_dma_rx_complete() local
1244 lpuart_copy_rx_to_tty(sport); in lpuart_dma_rx_complete()
1249 struct lpuart_port *sport = from_timer(sport, t, lpuart_timer); in lpuart_timer_func() local
1251 lpuart_copy_rx_to_tty(sport); in lpuart_timer_func()
1254 static inline int lpuart_start_rx_dma(struct lpuart_port *sport) in lpuart_start_rx_dma() argument
1257 struct circ_buf *ring = &sport->rx_ring; in lpuart_start_rx_dma()
1260 struct tty_port *port = &sport->port.state->port; in lpuart_start_rx_dma()
1263 struct dma_chan *chan = sport->dma_rx_chan; in lpuart_start_rx_dma()
1275 sport->rx_dma_rng_buf_len = (DMA_RX_TIMEOUT * baud / bits / 1000) * 2; in lpuart_start_rx_dma()
1276 sport->rx_dma_rng_buf_len = (1 << (fls(sport->rx_dma_rng_buf_len) - 1)); in lpuart_start_rx_dma()
1277 if (sport->rx_dma_rng_buf_len < 16) in lpuart_start_rx_dma()
1278 sport->rx_dma_rng_buf_len = 16; in lpuart_start_rx_dma()
1280 ring->buf = kzalloc(sport->rx_dma_rng_buf_len, GFP_ATOMIC); in lpuart_start_rx_dma()
1284 sg_init_one(&sport->rx_sgl, ring->buf, sport->rx_dma_rng_buf_len); in lpuart_start_rx_dma()
1285 nent = dma_map_sg(chan->device->dev, &sport->rx_sgl, 1, in lpuart_start_rx_dma()
1289 dev_err(sport->port.dev, "DMA Rx mapping error\n"); in lpuart_start_rx_dma()
1293 dma_rx_sconfig.src_addr = lpuart_dma_datareg_addr(sport); in lpuart_start_rx_dma()
1300 dev_err(sport->port.dev, in lpuart_start_rx_dma()
1305 sport->dma_rx_desc = dmaengine_prep_dma_cyclic(chan, in lpuart_start_rx_dma()
1306 sg_dma_address(&sport->rx_sgl), in lpuart_start_rx_dma()
1307 sport->rx_sgl.length, in lpuart_start_rx_dma()
1308 sport->rx_sgl.length / 2, in lpuart_start_rx_dma()
1311 if (!sport->dma_rx_desc) { in lpuart_start_rx_dma()
1312 dev_err(sport->port.dev, "Cannot prepare cyclic DMA\n"); in lpuart_start_rx_dma()
1316 sport->dma_rx_desc->callback = lpuart_dma_rx_complete; in lpuart_start_rx_dma()
1317 sport->dma_rx_desc->callback_param = sport; in lpuart_start_rx_dma()
1318 sport->dma_rx_cookie = dmaengine_submit(sport->dma_rx_desc); in lpuart_start_rx_dma()
1321 if (lpuart_is_32(sport)) { in lpuart_start_rx_dma()
1322 unsigned long temp = lpuart32_read(&sport->port, UARTBAUD); in lpuart_start_rx_dma()
1324 lpuart32_write(&sport->port, temp | UARTBAUD_RDMAE, UARTBAUD); in lpuart_start_rx_dma()
1326 writeb(readb(sport->port.membase + UARTCR5) | UARTCR5_RDMAS, in lpuart_start_rx_dma()
1327 sport->port.membase + UARTCR5); in lpuart_start_rx_dma()
1335 struct lpuart_port *sport = container_of(port, in lpuart_dma_rx_free() local
1337 struct dma_chan *chan = sport->dma_rx_chan; in lpuart_dma_rx_free()
1340 dma_unmap_sg(chan->device->dev, &sport->rx_sgl, 1, DMA_FROM_DEVICE); in lpuart_dma_rx_free()
1341 kfree(sport->rx_ring.buf); in lpuart_dma_rx_free()
1342 sport->rx_ring.tail = 0; in lpuart_dma_rx_free()
1343 sport->rx_ring.head = 0; in lpuart_dma_rx_free()
1344 sport->dma_rx_desc = NULL; in lpuart_dma_rx_free()
1345 sport->dma_rx_cookie = -EINVAL; in lpuart_dma_rx_free()
1351 struct lpuart_port *sport = container_of(port, in lpuart_config_rs485() local
1354 u8 modem = readb(sport->port.membase + UARTMODEM) & in lpuart_config_rs485()
1356 writeb(modem, sport->port.membase + UARTMODEM); in lpuart_config_rs485()
1393 sport->port.rs485 = *rs485; in lpuart_config_rs485()
1395 writeb(modem, sport->port.membase + UARTMODEM); in lpuart_config_rs485()
1402 struct lpuart_port *sport = container_of(port, in lpuart32_config_rs485() local
1405 unsigned long modem = lpuart32_read(&sport->port, UARTMODIR) in lpuart32_config_rs485()
1407 lpuart32_write(&sport->port, modem, UARTMODIR); in lpuart32_config_rs485()
1444 sport->port.rs485 = *rs485; in lpuart32_config_rs485()
1446 lpuart32_write(&sport->port, modem, UARTMODIR); in lpuart32_config_rs485()
1526 static void lpuart_setup_watermark(struct lpuart_port *sport) in lpuart_setup_watermark() argument
1531 cr2 = readb(sport->port.membase + UARTCR2); in lpuart_setup_watermark()
1535 writeb(cr2, sport->port.membase + UARTCR2); in lpuart_setup_watermark()
1537 val = readb(sport->port.membase + UARTPFIFO); in lpuart_setup_watermark()
1539 sport->port.membase + UARTPFIFO); in lpuart_setup_watermark()
1543 sport->port.membase + UARTCFIFO); in lpuart_setup_watermark()
1546 if (readb(sport->port.membase + UARTSR1) & UARTSR1_RDRF) { in lpuart_setup_watermark()
1547 readb(sport->port.membase + UARTDR); in lpuart_setup_watermark()
1548 writeb(UARTSFIFO_RXUF, sport->port.membase + UARTSFIFO); in lpuart_setup_watermark()
1551 writeb(0, sport->port.membase + UARTTWFIFO); in lpuart_setup_watermark()
1552 writeb(1, sport->port.membase + UARTRWFIFO); in lpuart_setup_watermark()
1555 writeb(cr2_saved, sport->port.membase + UARTCR2); in lpuart_setup_watermark()
1558 static void lpuart_setup_watermark_enable(struct lpuart_port *sport) in lpuart_setup_watermark_enable() argument
1562 lpuart_setup_watermark(sport); in lpuart_setup_watermark_enable()
1564 cr2 = readb(sport->port.membase + UARTCR2); in lpuart_setup_watermark_enable()
1566 writeb(cr2, sport->port.membase + UARTCR2); in lpuart_setup_watermark_enable()
1569 static void lpuart32_setup_watermark(struct lpuart_port *sport) in lpuart32_setup_watermark() argument
1574 ctrl = lpuart32_read(&sport->port, UARTCTRL); in lpuart32_setup_watermark()
1578 lpuart32_write(&sport->port, ctrl, UARTCTRL); in lpuart32_setup_watermark()
1581 val = lpuart32_read(&sport->port, UARTFIFO); in lpuart32_setup_watermark()
1584 lpuart32_write(&sport->port, val, UARTFIFO); in lpuart32_setup_watermark()
1588 lpuart32_write(&sport->port, val, UARTWATER); in lpuart32_setup_watermark()
1591 lpuart32_write(&sport->port, ctrl_saved, UARTCTRL); in lpuart32_setup_watermark()
1594 static void lpuart32_setup_watermark_enable(struct lpuart_port *sport) in lpuart32_setup_watermark_enable() argument
1598 lpuart32_setup_watermark(sport); in lpuart32_setup_watermark_enable()
1600 temp = lpuart32_read(&sport->port, UARTCTRL); in lpuart32_setup_watermark_enable()
1602 lpuart32_write(&sport->port, temp, UARTCTRL); in lpuart32_setup_watermark_enable()
1605 static void rx_dma_timer_init(struct lpuart_port *sport) in rx_dma_timer_init() argument
1607 timer_setup(&sport->lpuart_timer, lpuart_timer_func, 0); in rx_dma_timer_init()
1608 sport->lpuart_timer.expires = jiffies + sport->dma_rx_timeout; in rx_dma_timer_init()
1609 add_timer(&sport->lpuart_timer); in rx_dma_timer_init()
1612 static void lpuart_request_dma(struct lpuart_port *sport) in lpuart_request_dma() argument
1614 sport->dma_tx_chan = dma_request_chan(sport->port.dev, "tx"); in lpuart_request_dma()
1615 if (IS_ERR(sport->dma_tx_chan)) { in lpuart_request_dma()
1616 dev_dbg_once(sport->port.dev, in lpuart_request_dma()
1618 PTR_ERR(sport->dma_tx_chan)); in lpuart_request_dma()
1619 sport->dma_tx_chan = NULL; in lpuart_request_dma()
1622 sport->dma_rx_chan = dma_request_chan(sport->port.dev, "rx"); in lpuart_request_dma()
1623 if (IS_ERR(sport->dma_rx_chan)) { in lpuart_request_dma()
1624 dev_dbg_once(sport->port.dev, in lpuart_request_dma()
1626 PTR_ERR(sport->dma_rx_chan)); in lpuart_request_dma()
1627 sport->dma_rx_chan = NULL; in lpuart_request_dma()
1631 static void lpuart_tx_dma_startup(struct lpuart_port *sport) in lpuart_tx_dma_startup() argument
1636 if (uart_console(&sport->port)) in lpuart_tx_dma_startup()
1639 if (!sport->dma_tx_chan) in lpuart_tx_dma_startup()
1642 ret = lpuart_dma_tx_request(&sport->port); in lpuart_tx_dma_startup()
1646 init_waitqueue_head(&sport->dma_wait); in lpuart_tx_dma_startup()
1647 sport->lpuart_dma_tx_use = true; in lpuart_tx_dma_startup()
1648 if (lpuart_is_32(sport)) { in lpuart_tx_dma_startup()
1649 uartbaud = lpuart32_read(&sport->port, UARTBAUD); in lpuart_tx_dma_startup()
1650 lpuart32_write(&sport->port, in lpuart_tx_dma_startup()
1653 writeb(readb(sport->port.membase + UARTCR5) | in lpuart_tx_dma_startup()
1654 UARTCR5_TDMAS, sport->port.membase + UARTCR5); in lpuart_tx_dma_startup()
1660 sport->lpuart_dma_tx_use = false; in lpuart_tx_dma_startup()
1663 static void lpuart_rx_dma_startup(struct lpuart_port *sport) in lpuart_rx_dma_startup() argument
1668 if (uart_console(&sport->port)) in lpuart_rx_dma_startup()
1671 if (!sport->dma_rx_chan) in lpuart_rx_dma_startup()
1674 ret = lpuart_start_rx_dma(sport); in lpuart_rx_dma_startup()
1679 sport->dma_rx_timeout = msecs_to_jiffies(DMA_RX_TIMEOUT); in lpuart_rx_dma_startup()
1680 if (!sport->dma_rx_timeout) in lpuart_rx_dma_startup()
1681 sport->dma_rx_timeout = 1; in lpuart_rx_dma_startup()
1683 sport->lpuart_dma_rx_use = true; in lpuart_rx_dma_startup()
1684 rx_dma_timer_init(sport); in lpuart_rx_dma_startup()
1686 if (sport->port.has_sysrq && !lpuart_is_32(sport)) { in lpuart_rx_dma_startup()
1687 cr3 = readb(sport->port.membase + UARTCR3); in lpuart_rx_dma_startup()
1689 writeb(cr3, sport->port.membase + UARTCR3); in lpuart_rx_dma_startup()
1695 sport->lpuart_dma_rx_use = false; in lpuart_rx_dma_startup()
1700 struct lpuart_port *sport = container_of(port, struct lpuart_port, port); in lpuart_startup() local
1705 temp = readb(sport->port.membase + UARTPFIFO); in lpuart_startup()
1707 sport->txfifo_size = UARTFIFO_DEPTH((temp >> UARTPFIFO_TXSIZE_OFF) & in lpuart_startup()
1709 sport->port.fifosize = sport->txfifo_size; in lpuart_startup()
1711 sport->rxfifo_size = UARTFIFO_DEPTH((temp >> UARTPFIFO_RXSIZE_OFF) & in lpuart_startup()
1714 lpuart_request_dma(sport); in lpuart_startup()
1716 spin_lock_irqsave(&sport->port.lock, flags); in lpuart_startup()
1718 lpuart_setup_watermark_enable(sport); in lpuart_startup()
1720 lpuart_rx_dma_startup(sport); in lpuart_startup()
1721 lpuart_tx_dma_startup(sport); in lpuart_startup()
1723 spin_unlock_irqrestore(&sport->port.lock, flags); in lpuart_startup()
1728 static void lpuart32_configure(struct lpuart_port *sport) in lpuart32_configure() argument
1732 if (sport->lpuart_dma_rx_use) { in lpuart32_configure()
1734 temp = lpuart32_read(&sport->port, UARTWATER); in lpuart32_configure()
1736 lpuart32_write(&sport->port, temp, UARTWATER); in lpuart32_configure()
1738 temp = lpuart32_read(&sport->port, UARTCTRL); in lpuart32_configure()
1739 if (!sport->lpuart_dma_rx_use) in lpuart32_configure()
1741 if (!sport->lpuart_dma_tx_use) in lpuart32_configure()
1743 lpuart32_write(&sport->port, temp, UARTCTRL); in lpuart32_configure()
1748 struct lpuart_port *sport = container_of(port, struct lpuart_port, port); in lpuart32_startup() local
1753 temp = lpuart32_read(&sport->port, UARTFIFO); in lpuart32_startup()
1755 sport->txfifo_size = UARTFIFO_DEPTH((temp >> UARTFIFO_TXSIZE_OFF) & in lpuart32_startup()
1757 sport->port.fifosize = sport->txfifo_size; in lpuart32_startup()
1759 sport->rxfifo_size = UARTFIFO_DEPTH((temp >> UARTFIFO_RXSIZE_OFF) & in lpuart32_startup()
1767 if (is_layerscape_lpuart(sport)) { in lpuart32_startup()
1768 sport->rxfifo_size = 16; in lpuart32_startup()
1769 sport->txfifo_size = 16; in lpuart32_startup()
1770 sport->port.fifosize = sport->txfifo_size; in lpuart32_startup()
1773 lpuart_request_dma(sport); in lpuart32_startup()
1775 spin_lock_irqsave(&sport->port.lock, flags); in lpuart32_startup()
1777 lpuart32_setup_watermark_enable(sport); in lpuart32_startup()
1779 lpuart_rx_dma_startup(sport); in lpuart32_startup()
1780 lpuart_tx_dma_startup(sport); in lpuart32_startup()
1782 lpuart32_configure(sport); in lpuart32_startup()
1784 spin_unlock_irqrestore(&sport->port.lock, flags); in lpuart32_startup()
1788 static void lpuart_dma_shutdown(struct lpuart_port *sport) in lpuart_dma_shutdown() argument
1790 if (sport->lpuart_dma_rx_use) { in lpuart_dma_shutdown()
1791 del_timer_sync(&sport->lpuart_timer); in lpuart_dma_shutdown()
1792 lpuart_dma_rx_free(&sport->port); in lpuart_dma_shutdown()
1795 if (sport->lpuart_dma_tx_use) { in lpuart_dma_shutdown()
1796 if (wait_event_interruptible(sport->dma_wait, in lpuart_dma_shutdown()
1797 !sport->dma_tx_in_progress) != false) { in lpuart_dma_shutdown()
1798 sport->dma_tx_in_progress = false; in lpuart_dma_shutdown()
1799 dmaengine_terminate_all(sport->dma_tx_chan); in lpuart_dma_shutdown()
1803 if (sport->dma_tx_chan) in lpuart_dma_shutdown()
1804 dma_release_channel(sport->dma_tx_chan); in lpuart_dma_shutdown()
1805 if (sport->dma_rx_chan) in lpuart_dma_shutdown()
1806 dma_release_channel(sport->dma_rx_chan); in lpuart_dma_shutdown()
1811 struct lpuart_port *sport = container_of(port, struct lpuart_port, port); in lpuart_shutdown() local
1825 lpuart_dma_shutdown(sport); in lpuart_shutdown()
1830 struct lpuart_port *sport = in lpuart32_shutdown() local
1845 lpuart_dma_shutdown(sport); in lpuart32_shutdown()
1852 struct lpuart_port *sport = container_of(port, struct lpuart_port, port); in lpuart_set_termios() local
1859 cr1 = old_cr1 = readb(sport->port.membase + UARTCR1); in lpuart_set_termios()
1860 old_cr2 = readb(sport->port.membase + UARTCR2); in lpuart_set_termios()
1861 cr3 = readb(sport->port.membase + UARTCR3); in lpuart_set_termios()
1862 cr4 = readb(sport->port.membase + UARTCR4); in lpuart_set_termios()
1863 bdh = readb(sport->port.membase + UARTBDH); in lpuart_set_termios()
1864 modem = readb(sport->port.membase + UARTMODEM); in lpuart_set_termios()
1896 if (sport->port.rs485.flags & SER_RS485_ENABLED) in lpuart_set_termios()
1940 if (old && sport->lpuart_dma_rx_use) { in lpuart_set_termios()
1941 del_timer_sync(&sport->lpuart_timer); in lpuart_set_termios()
1942 lpuart_dma_rx_free(&sport->port); in lpuart_set_termios()
1945 spin_lock_irqsave(&sport->port.lock, flags); in lpuart_set_termios()
1947 sport->port.read_status_mask = 0; in lpuart_set_termios()
1949 sport->port.read_status_mask |= UARTSR1_FE | UARTSR1_PE; in lpuart_set_termios()
1951 sport->port.read_status_mask |= UARTSR1_FE; in lpuart_set_termios()
1954 sport->port.ignore_status_mask = 0; in lpuart_set_termios()
1956 sport->port.ignore_status_mask |= UARTSR1_PE; in lpuart_set_termios()
1958 sport->port.ignore_status_mask |= UARTSR1_FE; in lpuart_set_termios()
1964 sport->port.ignore_status_mask |= UARTSR1_OR; in lpuart_set_termios()
1971 lpuart_wait_bit_set(&sport->port, UARTSR1, UARTSR1_TC); in lpuart_set_termios()
1975 sport->port.membase + UARTCR2); in lpuart_set_termios()
1977 sbr = sport->port.uartclk / (16 * baud); in lpuart_set_termios()
1978 brfa = ((sport->port.uartclk - (16 * sbr * baud)) * 2) / baud; in lpuart_set_termios()
1983 writeb(cr4 | brfa, sport->port.membase + UARTCR4); in lpuart_set_termios()
1984 writeb(bdh, sport->port.membase + UARTBDH); in lpuart_set_termios()
1985 writeb(sbr & 0xFF, sport->port.membase + UARTBDL); in lpuart_set_termios()
1986 writeb(cr3, sport->port.membase + UARTCR3); in lpuart_set_termios()
1987 writeb(cr1, sport->port.membase + UARTCR1); in lpuart_set_termios()
1988 writeb(modem, sport->port.membase + UARTMODEM); in lpuart_set_termios()
1991 writeb(old_cr2, sport->port.membase + UARTCR2); in lpuart_set_termios()
1993 if (old && sport->lpuart_dma_rx_use) { in lpuart_set_termios()
1994 if (!lpuart_start_rx_dma(sport)) in lpuart_set_termios()
1995 rx_dma_timer_init(sport); in lpuart_set_termios()
1997 sport->lpuart_dma_rx_use = false; in lpuart_set_termios()
2000 spin_unlock_irqrestore(&sport->port.lock, flags); in lpuart_set_termios()
2079 static void lpuart32_serial_setbrg(struct lpuart_port *sport, in lpuart32_serial_setbrg() argument
2082 __lpuart32_serial_setbrg(&sport->port, baudrate, in lpuart32_serial_setbrg()
2083 sport->lpuart_dma_rx_use, in lpuart32_serial_setbrg()
2084 sport->lpuart_dma_tx_use); in lpuart32_serial_setbrg()
2092 struct lpuart_port *sport = container_of(port, struct lpuart_port, port); in lpuart32_set_termios() local
2098 ctrl = old_ctrl = lpuart32_read(&sport->port, UARTCTRL); in lpuart32_set_termios()
2099 bd = lpuart32_read(&sport->port, UARTBAUD); in lpuart32_set_termios()
2100 modem = lpuart32_read(&sport->port, UARTMODIR); in lpuart32_set_termios()
2132 if (sport->port.rs485.flags & SER_RS485_ENABLED) in lpuart32_set_termios()
2178 if (old && sport->lpuart_dma_rx_use) { in lpuart32_set_termios()
2179 del_timer_sync(&sport->lpuart_timer); in lpuart32_set_termios()
2180 lpuart_dma_rx_free(&sport->port); in lpuart32_set_termios()
2183 spin_lock_irqsave(&sport->port.lock, flags); in lpuart32_set_termios()
2185 sport->port.read_status_mask = 0; in lpuart32_set_termios()
2187 sport->port.read_status_mask |= UARTSTAT_FE | UARTSTAT_PE; in lpuart32_set_termios()
2189 sport->port.read_status_mask |= UARTSTAT_FE; in lpuart32_set_termios()
2192 sport->port.ignore_status_mask = 0; in lpuart32_set_termios()
2194 sport->port.ignore_status_mask |= UARTSTAT_PE; in lpuart32_set_termios()
2196 sport->port.ignore_status_mask |= UARTSTAT_FE; in lpuart32_set_termios()
2202 sport->port.ignore_status_mask |= UARTSTAT_OR; in lpuart32_set_termios()
2209 lpuart32_wait_bit_set(&sport->port, UARTSTAT, UARTSTAT_TC); in lpuart32_set_termios()
2212 lpuart32_write(&sport->port, old_ctrl & ~(UARTCTRL_TE | UARTCTRL_RE), in lpuart32_set_termios()
2215 lpuart32_write(&sport->port, bd, UARTBAUD); in lpuart32_set_termios()
2216 lpuart32_serial_setbrg(sport, baud); in lpuart32_set_termios()
2217 lpuart32_write(&sport->port, modem, UARTMODIR); in lpuart32_set_termios()
2218 lpuart32_write(&sport->port, ctrl, UARTCTRL); in lpuart32_set_termios()
2221 if (old && sport->lpuart_dma_rx_use) { in lpuart32_set_termios()
2222 if (!lpuart_start_rx_dma(sport)) in lpuart32_set_termios()
2223 rx_dma_timer_init(sport); in lpuart32_set_termios()
2225 sport->lpuart_dma_rx_use = false; in lpuart32_set_termios()
2228 spin_unlock_irqrestore(&sport->port.lock, flags); in lpuart32_set_termios()
2338 struct lpuart_port *sport = lpuart_ports[co->index]; in lpuart_console_write() local
2344 locked = spin_trylock_irqsave(&sport->port.lock, flags); in lpuart_console_write()
2346 spin_lock_irqsave(&sport->port.lock, flags); in lpuart_console_write()
2349 cr2 = old_cr2 = readb(sport->port.membase + UARTCR2); in lpuart_console_write()
2352 writeb(cr2, sport->port.membase + UARTCR2); in lpuart_console_write()
2354 uart_console_write(&sport->port, s, count, lpuart_console_putchar); in lpuart_console_write()
2357 lpuart_wait_bit_set(&sport->port, UARTSR1, UARTSR1_TC); in lpuart_console_write()
2359 writeb(old_cr2, sport->port.membase + UARTCR2); in lpuart_console_write()
2362 spin_unlock_irqrestore(&sport->port.lock, flags); in lpuart_console_write()
2368 struct lpuart_port *sport = lpuart_ports[co->index]; in lpuart32_console_write() local
2374 locked = spin_trylock_irqsave(&sport->port.lock, flags); in lpuart32_console_write()
2376 spin_lock_irqsave(&sport->port.lock, flags); in lpuart32_console_write()
2379 cr = old_cr = lpuart32_read(&sport->port, UARTCTRL); in lpuart32_console_write()
2382 lpuart32_write(&sport->port, cr, UARTCTRL); in lpuart32_console_write()
2384 uart_console_write(&sport->port, s, count, lpuart32_console_putchar); in lpuart32_console_write()
2387 lpuart32_wait_bit_set(&sport->port, UARTSTAT, UARTSTAT_TC); in lpuart32_console_write()
2389 lpuart32_write(&sport->port, old_cr, UARTCTRL); in lpuart32_console_write()
2392 spin_unlock_irqrestore(&sport->port.lock, flags); in lpuart32_console_write()
2400 lpuart_console_get_options(struct lpuart_port *sport, int *baud, in lpuart_console_get_options() argument
2406 cr = readb(sport->port.membase + UARTCR2); in lpuart_console_get_options()
2413 cr = readb(sport->port.membase + UARTCR1); in lpuart_console_get_options()
2428 bdh = readb(sport->port.membase + UARTBDH); in lpuart_console_get_options()
2430 bdl = readb(sport->port.membase + UARTBDL); in lpuart_console_get_options()
2434 brfa = readb(sport->port.membase + UARTCR4); in lpuart_console_get_options()
2437 uartclk = lpuart_get_baud_clk_rate(sport); in lpuart_console_get_options()
2444 dev_info(sport->port.dev, "Serial: Console lpuart rounded baud rate" in lpuart_console_get_options()
2449 lpuart32_console_get_options(struct lpuart_port *sport, int *baud, in lpuart32_console_get_options() argument
2455 cr = lpuart32_read(&sport->port, UARTCTRL); in lpuart32_console_get_options()
2462 cr = lpuart32_read(&sport->port, UARTCTRL); in lpuart32_console_get_options()
2477 bd = lpuart32_read(&sport->port, UARTBAUD); in lpuart32_console_get_options()
2483 uartclk = lpuart_get_baud_clk_rate(sport); in lpuart32_console_get_options()
2490 dev_info(sport->port.dev, "Serial: Console lpuart rounded baud rate" in lpuart32_console_get_options()
2496 struct lpuart_port *sport; in lpuart_console_setup() local
2510 sport = lpuart_ports[co->index]; in lpuart_console_setup()
2511 if (sport == NULL) in lpuart_console_setup()
2517 if (lpuart_is_32(sport)) in lpuart_console_setup()
2518 lpuart32_console_get_options(sport, &baud, &parity, &bits); in lpuart_console_setup()
2520 lpuart_console_get_options(sport, &baud, &parity, &bits); in lpuart_console_setup()
2522 if (lpuart_is_32(sport)) in lpuart_console_setup()
2523 lpuart32_setup_watermark(sport); in lpuart_console_setup()
2525 lpuart_setup_watermark(sport); in lpuart_console_setup()
2527 return uart_set_options(&sport->port, co, baud, parity, bits, flow); in lpuart_console_setup()
2651 struct lpuart_port *sport; in lpuart_probe() local
2655 sport = devm_kzalloc(&pdev->dev, sizeof(*sport), GFP_KERNEL); in lpuart_probe()
2656 if (!sport) in lpuart_probe()
2660 sport->port.membase = devm_ioremap_resource(&pdev->dev, res); in lpuart_probe()
2661 if (IS_ERR(sport->port.membase)) in lpuart_probe()
2662 return PTR_ERR(sport->port.membase); in lpuart_probe()
2664 sport->port.membase += sdata->reg_off; in lpuart_probe()
2665 sport->port.mapbase = res->start + sdata->reg_off; in lpuart_probe()
2666 sport->port.dev = &pdev->dev; in lpuart_probe()
2667 sport->port.type = PORT_LPUART; in lpuart_probe()
2668 sport->devtype = sdata->devtype; in lpuart_probe()
2672 sport->port.irq = ret; in lpuart_probe()
2673 sport->port.iotype = sdata->iotype; in lpuart_probe()
2674 if (lpuart_is_32(sport)) in lpuart_probe()
2675 sport->port.ops = &lpuart32_pops; in lpuart_probe()
2677 sport->port.ops = &lpuart_pops; in lpuart_probe()
2678 sport->port.has_sysrq = IS_ENABLED(CONFIG_SERIAL_FSL_LPUART_CONSOLE); in lpuart_probe()
2679 sport->port.flags = UPF_BOOT_AUTOCONF; in lpuart_probe()
2681 if (lpuart_is_32(sport)) in lpuart_probe()
2682 sport->port.rs485_config = lpuart32_config_rs485; in lpuart_probe()
2684 sport->port.rs485_config = lpuart_config_rs485; in lpuart_probe()
2686 sport->ipg_clk = devm_clk_get(&pdev->dev, "ipg"); in lpuart_probe()
2687 if (IS_ERR(sport->ipg_clk)) { in lpuart_probe()
2688 ret = PTR_ERR(sport->ipg_clk); in lpuart_probe()
2693 sport->baud_clk = NULL; in lpuart_probe()
2694 if (is_imx8qxp_lpuart(sport)) { in lpuart_probe()
2695 sport->baud_clk = devm_clk_get(&pdev->dev, "baud"); in lpuart_probe()
2696 if (IS_ERR(sport->baud_clk)) { in lpuart_probe()
2697 ret = PTR_ERR(sport->baud_clk); in lpuart_probe()
2710 sport->id_allocated = true; in lpuart_probe()
2717 sport->port.line = ret; in lpuart_probe()
2719 ret = lpuart_enable_clks(sport); in lpuart_probe()
2722 sport->port.uartclk = lpuart_get_baud_clk_rate(sport); in lpuart_probe()
2724 lpuart_ports[sport->port.line] = sport; in lpuart_probe()
2726 platform_set_drvdata(pdev, &sport->port); in lpuart_probe()
2728 if (lpuart_is_32(sport)) { in lpuart_probe()
2730 ret = devm_request_irq(&pdev->dev, sport->port.irq, lpuart32_int, 0, in lpuart_probe()
2731 DRIVER_NAME, sport); in lpuart_probe()
2734 ret = devm_request_irq(&pdev->dev, sport->port.irq, lpuart_int, 0, in lpuart_probe()
2735 DRIVER_NAME, sport); in lpuart_probe()
2741 ret = uart_add_one_port(&lpuart_reg, &sport->port); in lpuart_probe()
2745 ret = lpuart_global_reset(sport); in lpuart_probe()
2749 ret = uart_get_rs485_mode(&sport->port); in lpuart_probe()
2753 if (sport->port.rs485.flags & SER_RS485_RX_DURING_TX) in lpuart_probe()
2756 if (sport->port.rs485.delay_rts_before_send || in lpuart_probe()
2757 sport->port.rs485.delay_rts_after_send) in lpuart_probe()
2760 sport->port.rs485_config(&sport->port, &sport->port.rs485); in lpuart_probe()
2766 uart_remove_one_port(&lpuart_reg, &sport->port); in lpuart_probe()
2769 lpuart_disable_clks(sport); in lpuart_probe()
2772 if (sport->id_allocated) in lpuart_probe()
2773 ida_simple_remove(&fsl_lpuart_ida, sport->port.line); in lpuart_probe()
2779 struct lpuart_port *sport = platform_get_drvdata(pdev); in lpuart_remove() local
2781 uart_remove_one_port(&lpuart_reg, &sport->port); in lpuart_remove()
2783 if (sport->id_allocated) in lpuart_remove()
2784 ida_simple_remove(&fsl_lpuart_ida, sport->port.line); in lpuart_remove()
2786 lpuart_disable_clks(sport); in lpuart_remove()
2788 if (sport->dma_tx_chan) in lpuart_remove()
2789 dma_release_channel(sport->dma_tx_chan); in lpuart_remove()
2791 if (sport->dma_rx_chan) in lpuart_remove()
2792 dma_release_channel(sport->dma_rx_chan); in lpuart_remove()
2799 struct lpuart_port *sport = dev_get_drvdata(dev); in lpuart_suspend() local
2803 if (lpuart_is_32(sport)) { in lpuart_suspend()
2805 temp = lpuart32_read(&sport->port, UARTCTRL); in lpuart_suspend()
2807 lpuart32_write(&sport->port, temp, UARTCTRL); in lpuart_suspend()
2810 temp = readb(sport->port.membase + UARTCR2); in lpuart_suspend()
2812 writeb(temp, sport->port.membase + UARTCR2); in lpuart_suspend()
2815 uart_suspend_port(&lpuart_reg, &sport->port); in lpuart_suspend()
2818 irq_wake = irqd_is_wakeup_set(irq_get_irq_data(sport->port.irq)); in lpuart_suspend()
2820 if (sport->lpuart_dma_rx_use) { in lpuart_suspend()
2829 del_timer_sync(&sport->lpuart_timer); in lpuart_suspend()
2830 lpuart_dma_rx_free(&sport->port); in lpuart_suspend()
2834 if (lpuart_is_32(sport)) { in lpuart_suspend()
2835 temp = lpuart32_read(&sport->port, UARTBAUD); in lpuart_suspend()
2836 lpuart32_write(&sport->port, temp & ~UARTBAUD_RDMAE, in lpuart_suspend()
2839 writeb(readb(sport->port.membase + UARTCR5) & in lpuart_suspend()
2840 ~UARTCR5_RDMAS, sport->port.membase + UARTCR5); in lpuart_suspend()
2844 if (sport->lpuart_dma_tx_use) { in lpuart_suspend()
2845 sport->dma_tx_in_progress = false; in lpuart_suspend()
2846 dmaengine_terminate_all(sport->dma_tx_chan); in lpuart_suspend()
2849 if (sport->port.suspended && !irq_wake) in lpuart_suspend()
2850 lpuart_disable_clks(sport); in lpuart_suspend()
2857 struct lpuart_port *sport = dev_get_drvdata(dev); in lpuart_resume() local
2858 bool irq_wake = irqd_is_wakeup_set(irq_get_irq_data(sport->port.irq)); in lpuart_resume()
2860 if (sport->port.suspended && !irq_wake) in lpuart_resume()
2861 lpuart_enable_clks(sport); in lpuart_resume()
2863 if (lpuart_is_32(sport)) in lpuart_resume()
2864 lpuart32_setup_watermark_enable(sport); in lpuart_resume()
2866 lpuart_setup_watermark_enable(sport); in lpuart_resume()
2868 if (sport->lpuart_dma_rx_use) { in lpuart_resume()
2870 if (!lpuart_start_rx_dma(sport)) in lpuart_resume()
2871 rx_dma_timer_init(sport); in lpuart_resume()
2873 sport->lpuart_dma_rx_use = false; in lpuart_resume()
2877 lpuart_tx_dma_startup(sport); in lpuart_resume()
2879 if (lpuart_is_32(sport)) in lpuart_resume()
2880 lpuart32_configure(sport); in lpuart_resume()
2882 uart_resume_port(&lpuart_reg, &sport->port); in lpuart_resume()