Lines Matching refs:ci
101 struct ci_hdrc *ci; member
260 static inline struct ci_role_driver *ci_role(struct ci_hdrc *ci) in ci_role() argument
262 BUG_ON(ci->role >= CI_ROLE_END || !ci->roles[ci->role]); in ci_role()
263 return ci->roles[ci->role]; in ci_role()
266 static inline int ci_role_start(struct ci_hdrc *ci, enum ci_role role) in ci_role_start() argument
273 if (!ci->roles[role]) in ci_role_start()
276 ret = ci->roles[role]->start(ci); in ci_role_start()
278 ci->role = role; in ci_role_start()
282 static inline void ci_role_stop(struct ci_hdrc *ci) in ci_role_stop() argument
284 enum ci_role role = ci->role; in ci_role_stop()
289 ci->role = CI_ROLE_END; in ci_role_stop()
291 ci->roles[role]->stop(ci); in ci_role_stop()
294 static inline enum usb_role ci_role_to_usb_role(struct ci_hdrc *ci) in ci_role_to_usb_role() argument
296 if (ci->role == CI_ROLE_HOST) in ci_role_to_usb_role()
298 else if (ci->role == CI_ROLE_GADGET && ci->vbus_active) in ci_role_to_usb_role()
322 static inline u32 hw_read_id_reg(struct ci_hdrc *ci, u32 offset, u32 mask) in hw_read_id_reg() argument
324 return ioread32(ci->hw_bank.abs + offset) & mask; in hw_read_id_reg()
334 static inline void hw_write_id_reg(struct ci_hdrc *ci, u32 offset, in hw_write_id_reg() argument
338 data = (ioread32(ci->hw_bank.abs + offset) & ~mask) in hw_write_id_reg()
341 iowrite32(data, ci->hw_bank.abs + offset); in hw_write_id_reg()
352 static inline u32 hw_read(struct ci_hdrc *ci, enum ci_hw_regs reg, u32 mask) in hw_read() argument
354 return ioread32(ci->hw_bank.regmap[reg]) & mask; in hw_read()
368 static inline void __hw_write(struct ci_hdrc *ci, u32 val, in __hw_write() argument
371 if (ci->imx28_write_fix) in __hw_write()
384 static inline void hw_write(struct ci_hdrc *ci, enum ci_hw_regs reg, in hw_write() argument
388 data = (ioread32(ci->hw_bank.regmap[reg]) & ~mask) in hw_write()
391 __hw_write(ci, data, ci->hw_bank.regmap[reg]); in hw_write()
402 static inline u32 hw_test_and_clear(struct ci_hdrc *ci, enum ci_hw_regs reg, in hw_test_and_clear() argument
405 u32 val = ioread32(ci->hw_bank.regmap[reg]) & mask; in hw_test_and_clear()
407 __hw_write(ci, val, ci->hw_bank.regmap[reg]); in hw_test_and_clear()
420 static inline u32 hw_test_and_write(struct ci_hdrc *ci, enum ci_hw_regs reg, in hw_test_and_write() argument
423 u32 val = hw_read(ci, reg, ~0); in hw_test_and_write()
425 hw_write(ci, reg, mask, data); in hw_test_and_write()
435 static inline bool ci_otg_is_fsm_mode(struct ci_hdrc *ci) in ci_otg_is_fsm_mode() argument
438 struct usb_otg_caps *otg_caps = &ci->platdata->ci_otg_caps; in ci_otg_is_fsm_mode()
440 return ci->is_otg && ci->roles[CI_ROLE_HOST] && in ci_otg_is_fsm_mode()
441 ci->roles[CI_ROLE_GADGET] && (otg_caps->srp_support || in ci_otg_is_fsm_mode()
448 int ci_ulpi_init(struct ci_hdrc *ci);
449 void ci_ulpi_exit(struct ci_hdrc *ci);
450 int ci_ulpi_resume(struct ci_hdrc *ci);
452 u32 hw_read_intr_enable(struct ci_hdrc *ci);
454 u32 hw_read_intr_status(struct ci_hdrc *ci);
456 int hw_device_reset(struct ci_hdrc *ci);
458 int hw_port_test_set(struct ci_hdrc *ci, u8 mode);
460 u8 hw_port_test_get(struct ci_hdrc *ci);
462 void hw_phymode_configure(struct ci_hdrc *ci);
464 void ci_platform_configure(struct ci_hdrc *ci);
466 void dbg_create_files(struct ci_hdrc *ci);
468 void dbg_remove_files(struct ci_hdrc *ci);