Lines Matching refs:REG_FIELD
184 [HCS_PPC] = REG_FIELD(ISP176x_HC_HCSPARAMS, 4, 4),
185 [HCS_N_PORTS] = REG_FIELD(ISP176x_HC_HCSPARAMS, 0, 3),
186 [HCC_ISOC_CACHE] = REG_FIELD(ISP176x_HC_HCCPARAMS, 7, 7),
187 [HCC_ISOC_THRES] = REG_FIELD(ISP176x_HC_HCCPARAMS, 4, 6),
188 [CMD_LRESET] = REG_FIELD(ISP176x_HC_USBCMD, 7, 7),
189 [CMD_RESET] = REG_FIELD(ISP176x_HC_USBCMD, 1, 1),
190 [CMD_RUN] = REG_FIELD(ISP176x_HC_USBCMD, 0, 0),
191 [STS_PCD] = REG_FIELD(ISP176x_HC_USBSTS, 2, 2),
192 [HC_FRINDEX] = REG_FIELD(ISP176x_HC_FRINDEX, 0, 13),
193 [FLAG_CF] = REG_FIELD(ISP176x_HC_CONFIGFLAG, 0, 0),
194 [HC_ISO_PTD_DONEMAP] = REG_FIELD(ISP176x_HC_ISO_PTD_DONEMAP, 0, 31),
195 [HC_ISO_PTD_SKIPMAP] = REG_FIELD(ISP176x_HC_ISO_PTD_SKIPMAP, 0, 31),
196 [HC_ISO_PTD_LASTPTD] = REG_FIELD(ISP176x_HC_ISO_PTD_LASTPTD, 0, 31),
197 [HC_INT_PTD_DONEMAP] = REG_FIELD(ISP176x_HC_INT_PTD_DONEMAP, 0, 31),
198 [HC_INT_PTD_SKIPMAP] = REG_FIELD(ISP176x_HC_INT_PTD_SKIPMAP, 0, 31),
199 [HC_INT_PTD_LASTPTD] = REG_FIELD(ISP176x_HC_INT_PTD_LASTPTD, 0, 31),
200 [HC_ATL_PTD_DONEMAP] = REG_FIELD(ISP176x_HC_ATL_PTD_DONEMAP, 0, 31),
201 [HC_ATL_PTD_SKIPMAP] = REG_FIELD(ISP176x_HC_ATL_PTD_SKIPMAP, 0, 31),
202 [HC_ATL_PTD_LASTPTD] = REG_FIELD(ISP176x_HC_ATL_PTD_LASTPTD, 0, 31),
203 [PORT_OWNER] = REG_FIELD(ISP176x_HC_PORTSC1, 13, 13),
204 [PORT_POWER] = REG_FIELD(ISP176x_HC_PORTSC1, 12, 12),
205 [PORT_LSTATUS] = REG_FIELD(ISP176x_HC_PORTSC1, 10, 11),
206 [PORT_RESET] = REG_FIELD(ISP176x_HC_PORTSC1, 8, 8),
207 [PORT_SUSPEND] = REG_FIELD(ISP176x_HC_PORTSC1, 7, 7),
208 [PORT_RESUME] = REG_FIELD(ISP176x_HC_PORTSC1, 6, 6),
209 [PORT_PE] = REG_FIELD(ISP176x_HC_PORTSC1, 2, 2),
210 [PORT_CSC] = REG_FIELD(ISP176x_HC_PORTSC1, 1, 1),
211 [PORT_CONNECT] = REG_FIELD(ISP176x_HC_PORTSC1, 0, 0),
212 [ALL_ATX_RESET] = REG_FIELD(ISP176x_HC_HW_MODE_CTRL, 31, 31),
213 [HW_ANA_DIGI_OC] = REG_FIELD(ISP176x_HC_HW_MODE_CTRL, 15, 15),
214 [HW_COMN_IRQ] = REG_FIELD(ISP176x_HC_HW_MODE_CTRL, 10, 10),
215 [HW_DATA_BUS_WIDTH] = REG_FIELD(ISP176x_HC_HW_MODE_CTRL, 8, 8),
216 [HW_DACK_POL_HIGH] = REG_FIELD(ISP176x_HC_HW_MODE_CTRL, 6, 6),
217 [HW_DREQ_POL_HIGH] = REG_FIELD(ISP176x_HC_HW_MODE_CTRL, 5, 5),
218 [HW_INTR_HIGH_ACT] = REG_FIELD(ISP176x_HC_HW_MODE_CTRL, 2, 2),
219 [HW_INTR_EDGE_TRIG] = REG_FIELD(ISP176x_HC_HW_MODE_CTRL, 1, 1),
220 [HW_GLOBAL_INTR_EN] = REG_FIELD(ISP176x_HC_HW_MODE_CTRL, 0, 0),
221 [HC_CHIP_REV] = REG_FIELD(ISP176x_HC_CHIP_ID, 16, 31),
222 [HC_CHIP_ID_HIGH] = REG_FIELD(ISP176x_HC_CHIP_ID, 8, 15),
223 [HC_CHIP_ID_LOW] = REG_FIELD(ISP176x_HC_CHIP_ID, 0, 7),
224 [HC_SCRATCH] = REG_FIELD(ISP176x_HC_SCRATCH, 0, 31),
225 [SW_RESET_RESET_ALL] = REG_FIELD(ISP176x_HC_RESET, 0, 0),
226 [ISO_BUF_FILL] = REG_FIELD(ISP176x_HC_BUFFER_STATUS, 2, 2),
227 [INT_BUF_FILL] = REG_FIELD(ISP176x_HC_BUFFER_STATUS, 1, 1),
228 [ATL_BUF_FILL] = REG_FIELD(ISP176x_HC_BUFFER_STATUS, 0, 0),
229 [MEM_BANK_SEL] = REG_FIELD(ISP176x_HC_MEMORY, 16, 17),
230 [MEM_START_ADDR] = REG_FIELD(ISP176x_HC_MEMORY, 0, 15),
231 [HC_INTERRUPT] = REG_FIELD(ISP176x_HC_INTERRUPT, 0, 9),
232 [HC_ATL_IRQ_ENABLE] = REG_FIELD(ISP176x_HC_INTERRUPT_ENABLE, 8, 8),
233 [HC_INT_IRQ_ENABLE] = REG_FIELD(ISP176x_HC_INTERRUPT_ENABLE, 7, 7),
234 [HC_ISO_IRQ_MASK_OR] = REG_FIELD(ISP176x_HC_ISO_IRQ_MASK_OR, 0, 31),
235 [HC_INT_IRQ_MASK_OR] = REG_FIELD(ISP176x_HC_INT_IRQ_MASK_OR, 0, 31),
236 [HC_ATL_IRQ_MASK_OR] = REG_FIELD(ISP176x_HC_ATL_IRQ_MASK_OR, 0, 31),
237 [HC_ISO_IRQ_MASK_AND] = REG_FIELD(ISP176x_HC_ISO_IRQ_MASK_AND, 0, 31),
238 [HC_INT_IRQ_MASK_AND] = REG_FIELD(ISP176x_HC_INT_IRQ_MASK_AND, 0, 31),
239 [HC_ATL_IRQ_MASK_AND] = REG_FIELD(ISP176x_HC_ATL_IRQ_MASK_AND, 0, 31),
240 [HW_OTG_DISABLE_CLEAR] = REG_FIELD(ISP176x_HC_OTG_CTRL, 26, 26),
241 [HW_SW_SEL_HC_DC_CLEAR] = REG_FIELD(ISP176x_HC_OTG_CTRL, 23, 23),
242 [HW_VBUS_DRV_CLEAR] = REG_FIELD(ISP176x_HC_OTG_CTRL, 20, 20),
243 [HW_SEL_CP_EXT_CLEAR] = REG_FIELD(ISP176x_HC_OTG_CTRL, 19, 19),
244 [HW_DM_PULLDOWN_CLEAR] = REG_FIELD(ISP176x_HC_OTG_CTRL, 18, 18),
245 [HW_DP_PULLDOWN_CLEAR] = REG_FIELD(ISP176x_HC_OTG_CTRL, 17, 17),
246 [HW_DP_PULLUP_CLEAR] = REG_FIELD(ISP176x_HC_OTG_CTRL, 16, 16),
247 [HW_OTG_DISABLE] = REG_FIELD(ISP176x_HC_OTG_CTRL, 10, 10),
248 [HW_SW_SEL_HC_DC] = REG_FIELD(ISP176x_HC_OTG_CTRL, 7, 7),
249 [HW_VBUS_DRV] = REG_FIELD(ISP176x_HC_OTG_CTRL, 4, 4),
250 [HW_SEL_CP_EXT] = REG_FIELD(ISP176x_HC_OTG_CTRL, 3, 3),
251 [HW_DM_PULLDOWN] = REG_FIELD(ISP176x_HC_OTG_CTRL, 2, 2),
252 [HW_DP_PULLDOWN] = REG_FIELD(ISP176x_HC_OTG_CTRL, 1, 1),
253 [HW_DP_PULLUP] = REG_FIELD(ISP176x_HC_OTG_CTRL, 0, 0),
257 [CMD_LRESET] = REG_FIELD(ISP1763_HC_USBCMD, 7, 7),
258 [CMD_RESET] = REG_FIELD(ISP1763_HC_USBCMD, 1, 1),
259 [CMD_RUN] = REG_FIELD(ISP1763_HC_USBCMD, 0, 0),
260 [STS_PCD] = REG_FIELD(ISP1763_HC_USBSTS, 2, 2),
261 [HC_FRINDEX] = REG_FIELD(ISP1763_HC_FRINDEX, 0, 13),
262 [FLAG_CF] = REG_FIELD(ISP1763_HC_CONFIGFLAG, 0, 0),
263 [HC_ISO_PTD_DONEMAP] = REG_FIELD(ISP1763_HC_ISO_PTD_DONEMAP, 0, 15),
264 [HC_ISO_PTD_SKIPMAP] = REG_FIELD(ISP1763_HC_ISO_PTD_SKIPMAP, 0, 15),
265 [HC_ISO_PTD_LASTPTD] = REG_FIELD(ISP1763_HC_ISO_PTD_LASTPTD, 0, 15),
266 [HC_INT_PTD_DONEMAP] = REG_FIELD(ISP1763_HC_INT_PTD_DONEMAP, 0, 15),
267 [HC_INT_PTD_SKIPMAP] = REG_FIELD(ISP1763_HC_INT_PTD_SKIPMAP, 0, 15),
268 [HC_INT_PTD_LASTPTD] = REG_FIELD(ISP1763_HC_INT_PTD_LASTPTD, 0, 15),
269 [HC_ATL_PTD_DONEMAP] = REG_FIELD(ISP1763_HC_ATL_PTD_DONEMAP, 0, 15),
270 [HC_ATL_PTD_SKIPMAP] = REG_FIELD(ISP1763_HC_ATL_PTD_SKIPMAP, 0, 15),
271 [HC_ATL_PTD_LASTPTD] = REG_FIELD(ISP1763_HC_ATL_PTD_LASTPTD, 0, 15),
272 [PORT_OWNER] = REG_FIELD(ISP1763_HC_PORTSC1, 13, 13),
273 [PORT_POWER] = REG_FIELD(ISP1763_HC_PORTSC1, 12, 12),
274 [PORT_LSTATUS] = REG_FIELD(ISP1763_HC_PORTSC1, 10, 11),
275 [PORT_RESET] = REG_FIELD(ISP1763_HC_PORTSC1, 8, 8),
276 [PORT_SUSPEND] = REG_FIELD(ISP1763_HC_PORTSC1, 7, 7),
277 [PORT_RESUME] = REG_FIELD(ISP1763_HC_PORTSC1, 6, 6),
278 [PORT_PE] = REG_FIELD(ISP1763_HC_PORTSC1, 2, 2),
279 [PORT_CSC] = REG_FIELD(ISP1763_HC_PORTSC1, 1, 1),
280 [PORT_CONNECT] = REG_FIELD(ISP1763_HC_PORTSC1, 0, 0),
281 [HW_DATA_BUS_WIDTH] = REG_FIELD(ISP1763_HC_HW_MODE_CTRL, 4, 4),
282 [HW_DACK_POL_HIGH] = REG_FIELD(ISP1763_HC_HW_MODE_CTRL, 6, 6),
283 [HW_DREQ_POL_HIGH] = REG_FIELD(ISP1763_HC_HW_MODE_CTRL, 5, 5),
284 [HW_INTF_LOCK] = REG_FIELD(ISP1763_HC_HW_MODE_CTRL, 3, 3),
285 [HW_INTR_HIGH_ACT] = REG_FIELD(ISP1763_HC_HW_MODE_CTRL, 2, 2),
286 [HW_INTR_EDGE_TRIG] = REG_FIELD(ISP1763_HC_HW_MODE_CTRL, 1, 1),
287 [HW_GLOBAL_INTR_EN] = REG_FIELD(ISP1763_HC_HW_MODE_CTRL, 0, 0),
288 [SW_RESET_RESET_ATX] = REG_FIELD(ISP1763_HC_RESET, 3, 3),
289 [SW_RESET_RESET_ALL] = REG_FIELD(ISP1763_HC_RESET, 0, 0),
290 [HC_CHIP_ID_HIGH] = REG_FIELD(ISP1763_HC_CHIP_ID, 0, 15),
291 [HC_CHIP_ID_LOW] = REG_FIELD(ISP1763_HC_CHIP_REV, 8, 15),
292 [HC_CHIP_REV] = REG_FIELD(ISP1763_HC_CHIP_REV, 0, 7),
293 [HC_SCRATCH] = REG_FIELD(ISP1763_HC_SCRATCH, 0, 15),
294 [ISO_BUF_FILL] = REG_FIELD(ISP1763_HC_BUFFER_STATUS, 2, 2),
295 [INT_BUF_FILL] = REG_FIELD(ISP1763_HC_BUFFER_STATUS, 1, 1),
296 [ATL_BUF_FILL] = REG_FIELD(ISP1763_HC_BUFFER_STATUS, 0, 0),
297 [MEM_START_ADDR] = REG_FIELD(ISP1763_HC_MEMORY, 0, 15),
298 [HC_DATA] = REG_FIELD(ISP1763_HC_DATA, 0, 15),
299 [HC_INTERRUPT] = REG_FIELD(ISP1763_HC_INTERRUPT, 0, 10),
300 [HC_ATL_IRQ_ENABLE] = REG_FIELD(ISP1763_HC_INTERRUPT_ENABLE, 8, 8),
301 [HC_INT_IRQ_ENABLE] = REG_FIELD(ISP1763_HC_INTERRUPT_ENABLE, 7, 7),
302 [HC_ISO_IRQ_MASK_OR] = REG_FIELD(ISP1763_HC_ISO_IRQ_MASK_OR, 0, 15),
303 [HC_INT_IRQ_MASK_OR] = REG_FIELD(ISP1763_HC_INT_IRQ_MASK_OR, 0, 15),
304 [HC_ATL_IRQ_MASK_OR] = REG_FIELD(ISP1763_HC_ATL_IRQ_MASK_OR, 0, 15),
305 [HC_ISO_IRQ_MASK_AND] = REG_FIELD(ISP1763_HC_ISO_IRQ_MASK_AND, 0, 15),
306 [HC_INT_IRQ_MASK_AND] = REG_FIELD(ISP1763_HC_INT_IRQ_MASK_AND, 0, 15),
307 [HC_ATL_IRQ_MASK_AND] = REG_FIELD(ISP1763_HC_ATL_IRQ_MASK_AND, 0, 15),
308 [HW_HC_2_DIS] = REG_FIELD(ISP1763_HC_OTG_CTRL_SET, 15, 15),
309 [HW_OTG_DISABLE] = REG_FIELD(ISP1763_HC_OTG_CTRL_SET, 10, 10),
310 [HW_SW_SEL_HC_DC] = REG_FIELD(ISP1763_HC_OTG_CTRL_SET, 7, 7),
311 [HW_VBUS_DRV] = REG_FIELD(ISP1763_HC_OTG_CTRL_SET, 4, 4),
312 [HW_SEL_CP_EXT] = REG_FIELD(ISP1763_HC_OTG_CTRL_SET, 3, 3),
313 [HW_DM_PULLDOWN] = REG_FIELD(ISP1763_HC_OTG_CTRL_SET, 2, 2),
314 [HW_DP_PULLDOWN] = REG_FIELD(ISP1763_HC_OTG_CTRL_SET, 1, 1),
315 [HW_DP_PULLUP] = REG_FIELD(ISP1763_HC_OTG_CTRL_SET, 0, 0),
316 [HW_HC_2_DIS_CLEAR] = REG_FIELD(ISP1763_HC_OTG_CTRL_CLEAR, 15, 15),
317 [HW_OTG_DISABLE_CLEAR] = REG_FIELD(ISP1763_HC_OTG_CTRL_CLEAR, 10, 10),
318 [HW_SW_SEL_HC_DC_CLEAR] = REG_FIELD(ISP1763_HC_OTG_CTRL_CLEAR, 7, 7),
319 [HW_VBUS_DRV_CLEAR] = REG_FIELD(ISP1763_HC_OTG_CTRL_CLEAR, 4, 4),
320 [HW_SEL_CP_EXT_CLEAR] = REG_FIELD(ISP1763_HC_OTG_CTRL_CLEAR, 3, 3),
321 [HW_DM_PULLDOWN_CLEAR] = REG_FIELD(ISP1763_HC_OTG_CTRL_CLEAR, 2, 2),
322 [HW_DP_PULLDOWN_CLEAR] = REG_FIELD(ISP1763_HC_OTG_CTRL_CLEAR, 1, 1),
323 [HW_DP_PULLUP_CLEAR] = REG_FIELD(ISP1763_HC_OTG_CTRL_CLEAR, 0, 0),
368 [DC_DEVEN] = REG_FIELD(ISP176x_DC_ADDRESS, 7, 7),
369 [DC_DEVADDR] = REG_FIELD(ISP176x_DC_ADDRESS, 0, 6),
370 [DC_VBUSSTAT] = REG_FIELD(ISP176x_DC_MODE, 8, 8),
371 [DC_SFRESET] = REG_FIELD(ISP176x_DC_MODE, 4, 4),
372 [DC_GLINTENA] = REG_FIELD(ISP176x_DC_MODE, 3, 3),
373 [DC_CDBGMOD_ACK] = REG_FIELD(ISP176x_DC_INTCONF, 6, 6),
374 [DC_DDBGMODIN_ACK] = REG_FIELD(ISP176x_DC_INTCONF, 4, 4),
375 [DC_DDBGMODOUT_ACK] = REG_FIELD(ISP176x_DC_INTCONF, 2, 2),
376 [DC_INTPOL] = REG_FIELD(ISP176x_DC_INTCONF, 0, 0),
377 [DC_IEPRXTX_7] = REG_FIELD(ISP176x_DC_INTENABLE, 25, 25),
378 [DC_IEPRXTX_6] = REG_FIELD(ISP176x_DC_INTENABLE, 23, 23),
379 [DC_IEPRXTX_5] = REG_FIELD(ISP176x_DC_INTENABLE, 21, 21),
380 [DC_IEPRXTX_4] = REG_FIELD(ISP176x_DC_INTENABLE, 19, 19),
381 [DC_IEPRXTX_3] = REG_FIELD(ISP176x_DC_INTENABLE, 17, 17),
382 [DC_IEPRXTX_2] = REG_FIELD(ISP176x_DC_INTENABLE, 15, 15),
383 [DC_IEPRXTX_1] = REG_FIELD(ISP176x_DC_INTENABLE, 13, 13),
384 [DC_IEPRXTX_0] = REG_FIELD(ISP176x_DC_INTENABLE, 11, 11),
385 [DC_IEP0SETUP] = REG_FIELD(ISP176x_DC_INTENABLE, 8, 8),
386 [DC_IEVBUS] = REG_FIELD(ISP176x_DC_INTENABLE, 7, 7),
387 [DC_IEHS_STA] = REG_FIELD(ISP176x_DC_INTENABLE, 5, 5),
388 [DC_IERESM] = REG_FIELD(ISP176x_DC_INTENABLE, 4, 4),
389 [DC_IESUSP] = REG_FIELD(ISP176x_DC_INTENABLE, 3, 3),
390 [DC_IEBRST] = REG_FIELD(ISP176x_DC_INTENABLE, 0, 0),
391 [DC_EP0SETUP] = REG_FIELD(ISP176x_DC_EPINDEX, 5, 5),
392 [DC_ENDPIDX] = REG_FIELD(ISP176x_DC_EPINDEX, 1, 4),
393 [DC_EPDIR] = REG_FIELD(ISP176x_DC_EPINDEX, 0, 0),
394 [DC_CLBUF] = REG_FIELD(ISP176x_DC_CTRLFUNC, 4, 4),
395 [DC_VENDP] = REG_FIELD(ISP176x_DC_CTRLFUNC, 3, 3),
396 [DC_DSEN] = REG_FIELD(ISP176x_DC_CTRLFUNC, 2, 2),
397 [DC_STATUS] = REG_FIELD(ISP176x_DC_CTRLFUNC, 1, 1),
398 [DC_STALL] = REG_FIELD(ISP176x_DC_CTRLFUNC, 0, 0),
399 [DC_BUFLEN] = REG_FIELD(ISP176x_DC_BUFLEN, 0, 15),
400 [DC_FFOSZ] = REG_FIELD(ISP176x_DC_EPMAXPKTSZ, 0, 10),
401 [DC_EPENABLE] = REG_FIELD(ISP176x_DC_EPTYPE, 3, 3),
402 [DC_ENDPTYP] = REG_FIELD(ISP176x_DC_EPTYPE, 0, 1),
403 [DC_UFRAMENUM] = REG_FIELD(ISP176x_DC_FRAMENUM, 11, 13),
404 [DC_FRAMENUM] = REG_FIELD(ISP176x_DC_FRAMENUM, 0, 10),
405 [DC_CHIP_ID_HIGH] = REG_FIELD(ISP176x_DC_CHIPID, 16, 31),
406 [DC_CHIP_ID_LOW] = REG_FIELD(ISP176x_DC_CHIPID, 0, 15),
407 [DC_SCRATCH] = REG_FIELD(ISP176x_DC_SCRATCH, 0, 15),
421 [DC_DEVEN] = REG_FIELD(ISP1763_DC_ADDRESS, 7, 7),
422 [DC_DEVADDR] = REG_FIELD(ISP1763_DC_ADDRESS, 0, 6),
423 [DC_VBUSSTAT] = REG_FIELD(ISP1763_DC_MODE, 8, 8),
424 [DC_SFRESET] = REG_FIELD(ISP1763_DC_MODE, 4, 4),
425 [DC_GLINTENA] = REG_FIELD(ISP1763_DC_MODE, 3, 3),
426 [DC_CDBGMOD_ACK] = REG_FIELD(ISP1763_DC_INTCONF, 6, 6),
427 [DC_DDBGMODIN_ACK] = REG_FIELD(ISP1763_DC_INTCONF, 4, 4),
428 [DC_DDBGMODOUT_ACK] = REG_FIELD(ISP1763_DC_INTCONF, 2, 2),
429 [DC_INTPOL] = REG_FIELD(ISP1763_DC_INTCONF, 0, 0),
430 [DC_IEPRXTX_7] = REG_FIELD(ISP1763_DC_INTENABLE, 25, 25),
431 [DC_IEPRXTX_6] = REG_FIELD(ISP1763_DC_INTENABLE, 23, 23),
432 [DC_IEPRXTX_5] = REG_FIELD(ISP1763_DC_INTENABLE, 21, 21),
433 [DC_IEPRXTX_4] = REG_FIELD(ISP1763_DC_INTENABLE, 19, 19),
434 [DC_IEPRXTX_3] = REG_FIELD(ISP1763_DC_INTENABLE, 17, 17),
435 [DC_IEPRXTX_2] = REG_FIELD(ISP1763_DC_INTENABLE, 15, 15),
436 [DC_IEPRXTX_1] = REG_FIELD(ISP1763_DC_INTENABLE, 13, 13),
437 [DC_IEPRXTX_0] = REG_FIELD(ISP1763_DC_INTENABLE, 11, 11),
438 [DC_IEP0SETUP] = REG_FIELD(ISP1763_DC_INTENABLE, 8, 8),
439 [DC_IEVBUS] = REG_FIELD(ISP1763_DC_INTENABLE, 7, 7),
440 [DC_IEHS_STA] = REG_FIELD(ISP1763_DC_INTENABLE, 5, 5),
441 [DC_IERESM] = REG_FIELD(ISP1763_DC_INTENABLE, 4, 4),
442 [DC_IESUSP] = REG_FIELD(ISP1763_DC_INTENABLE, 3, 3),
443 [DC_IEBRST] = REG_FIELD(ISP1763_DC_INTENABLE, 0, 0),
444 [DC_EP0SETUP] = REG_FIELD(ISP1763_DC_EPINDEX, 5, 5),
445 [DC_ENDPIDX] = REG_FIELD(ISP1763_DC_EPINDEX, 1, 4),
446 [DC_EPDIR] = REG_FIELD(ISP1763_DC_EPINDEX, 0, 0),
447 [DC_CLBUF] = REG_FIELD(ISP1763_DC_CTRLFUNC, 4, 4),
448 [DC_VENDP] = REG_FIELD(ISP1763_DC_CTRLFUNC, 3, 3),
449 [DC_DSEN] = REG_FIELD(ISP1763_DC_CTRLFUNC, 2, 2),
450 [DC_STATUS] = REG_FIELD(ISP1763_DC_CTRLFUNC, 1, 1),
451 [DC_STALL] = REG_FIELD(ISP1763_DC_CTRLFUNC, 0, 0),
452 [DC_BUFLEN] = REG_FIELD(ISP1763_DC_BUFLEN, 0, 15),
453 [DC_FFOSZ] = REG_FIELD(ISP1763_DC_EPMAXPKTSZ, 0, 10),
454 [DC_EPENABLE] = REG_FIELD(ISP1763_DC_EPTYPE, 3, 3),
455 [DC_ENDPTYP] = REG_FIELD(ISP1763_DC_EPTYPE, 0, 1),
456 [DC_UFRAMENUM] = REG_FIELD(ISP1763_DC_FRAMENUM, 11, 13),
457 [DC_FRAMENUM] = REG_FIELD(ISP1763_DC_FRAMENUM, 0, 10),
458 [DC_CHIP_ID_HIGH] = REG_FIELD(ISP1763_DC_CHIPID_HIGH, 0, 15),
459 [DC_CHIP_ID_LOW] = REG_FIELD(ISP1763_DC_CHIPID_LOW, 0, 15),
460 [DC_SCRATCH] = REG_FIELD(ISP1763_DC_SCRATCH, 0, 15),