Lines Matching refs:style
1279 { .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, },
1280 { .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, },
1281 { .hw_ep_num = 2, .style = FIFO_RXTX, .maxpacket = 512, },
1282 { .hw_ep_num = 3, .style = FIFO_RXTX, .maxpacket = 256, },
1283 { .hw_ep_num = 4, .style = FIFO_RXTX, .maxpacket = 256, },
1288 { .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, .mode = BUF_DOUBLE, },
1289 { .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, .mode = BUF_DOUBLE, },
1290 { .hw_ep_num = 2, .style = FIFO_RXTX, .maxpacket = 512, .mode = BUF_DOUBLE, },
1291 { .hw_ep_num = 3, .style = FIFO_RXTX, .maxpacket = 256, },
1292 { .hw_ep_num = 4, .style = FIFO_RXTX, .maxpacket = 256, },
1297 { .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, },
1298 { .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, },
1299 { .hw_ep_num = 2, .style = FIFO_TX, .maxpacket = 512, },
1300 { .hw_ep_num = 2, .style = FIFO_RX, .maxpacket = 512, },
1301 { .hw_ep_num = 3, .style = FIFO_RXTX, .maxpacket = 960, },
1302 { .hw_ep_num = 4, .style = FIFO_RXTX, .maxpacket = 1024, },
1307 { .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, .mode = BUF_DOUBLE, },
1308 { .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, .mode = BUF_DOUBLE, },
1309 { .hw_ep_num = 2, .style = FIFO_TX, .maxpacket = 512, },
1310 { .hw_ep_num = 2, .style = FIFO_RX, .maxpacket = 512, },
1311 { .hw_ep_num = 3, .style = FIFO_RXTX, .maxpacket = 256, },
1312 { .hw_ep_num = 4, .style = FIFO_RXTX, .maxpacket = 256, },
1317 { .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, },
1318 { .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, },
1319 { .hw_ep_num = 2, .style = FIFO_TX, .maxpacket = 512, },
1320 { .hw_ep_num = 2, .style = FIFO_RX, .maxpacket = 512, },
1321 { .hw_ep_num = 3, .style = FIFO_TX, .maxpacket = 512, },
1322 { .hw_ep_num = 3, .style = FIFO_RX, .maxpacket = 512, },
1323 { .hw_ep_num = 4, .style = FIFO_TX, .maxpacket = 512, },
1324 { .hw_ep_num = 4, .style = FIFO_RX, .maxpacket = 512, },
1325 { .hw_ep_num = 5, .style = FIFO_TX, .maxpacket = 512, },
1326 { .hw_ep_num = 5, .style = FIFO_RX, .maxpacket = 512, },
1327 { .hw_ep_num = 6, .style = FIFO_TX, .maxpacket = 512, },
1328 { .hw_ep_num = 6, .style = FIFO_RX, .maxpacket = 512, },
1329 { .hw_ep_num = 7, .style = FIFO_TX, .maxpacket = 512, },
1330 { .hw_ep_num = 7, .style = FIFO_RX, .maxpacket = 512, },
1331 { .hw_ep_num = 8, .style = FIFO_TX, .maxpacket = 512, },
1332 { .hw_ep_num = 8, .style = FIFO_RX, .maxpacket = 512, },
1333 { .hw_ep_num = 9, .style = FIFO_TX, .maxpacket = 512, },
1334 { .hw_ep_num = 9, .style = FIFO_RX, .maxpacket = 512, },
1335 { .hw_ep_num = 10, .style = FIFO_TX, .maxpacket = 256, },
1336 { .hw_ep_num = 10, .style = FIFO_RX, .maxpacket = 64, },
1337 { .hw_ep_num = 11, .style = FIFO_TX, .maxpacket = 256, },
1338 { .hw_ep_num = 11, .style = FIFO_RX, .maxpacket = 64, },
1339 { .hw_ep_num = 12, .style = FIFO_TX, .maxpacket = 256, },
1340 { .hw_ep_num = 12, .style = FIFO_RX, .maxpacket = 64, },
1341 { .hw_ep_num = 13, .style = FIFO_RXTX, .maxpacket = 4096, },
1342 { .hw_ep_num = 14, .style = FIFO_RXTX, .maxpacket = 1024, },
1343 { .hw_ep_num = 15, .style = FIFO_RXTX, .maxpacket = 1024, },
1348 { .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, },
1349 { .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, },
1350 { .hw_ep_num = 2, .style = FIFO_TX, .maxpacket = 512, },
1351 { .hw_ep_num = 2, .style = FIFO_RX, .maxpacket = 512, },
1352 { .hw_ep_num = 3, .style = FIFO_TX, .maxpacket = 512, },
1353 { .hw_ep_num = 3, .style = FIFO_RX, .maxpacket = 512, },
1354 { .hw_ep_num = 4, .style = FIFO_TX, .maxpacket = 512, },
1355 { .hw_ep_num = 4, .style = FIFO_RX, .maxpacket = 512, },
1356 { .hw_ep_num = 5, .style = FIFO_TX, .maxpacket = 512, },
1357 { .hw_ep_num = 5, .style = FIFO_RX, .maxpacket = 512, },
1358 { .hw_ep_num = 6, .style = FIFO_TX, .maxpacket = 32, },
1359 { .hw_ep_num = 6, .style = FIFO_RX, .maxpacket = 32, },
1360 { .hw_ep_num = 7, .style = FIFO_TX, .maxpacket = 32, },
1361 { .hw_ep_num = 7, .style = FIFO_RX, .maxpacket = 32, },
1362 { .hw_ep_num = 8, .style = FIFO_TX, .maxpacket = 32, },
1363 { .hw_ep_num = 8, .style = FIFO_RX, .maxpacket = 32, },
1364 { .hw_ep_num = 9, .style = FIFO_TX, .maxpacket = 32, },
1365 { .hw_ep_num = 9, .style = FIFO_RX, .maxpacket = 32, },
1366 { .hw_ep_num = 10, .style = FIFO_TX, .maxpacket = 32, },
1367 { .hw_ep_num = 10, .style = FIFO_RX, .maxpacket = 32, },
1368 { .hw_ep_num = 11, .style = FIFO_TX, .maxpacket = 32, },
1369 { .hw_ep_num = 11, .style = FIFO_RX, .maxpacket = 32, },
1370 { .hw_ep_num = 12, .style = FIFO_TX, .maxpacket = 32, },
1371 { .hw_ep_num = 12, .style = FIFO_RX, .maxpacket = 32, },
1372 { .hw_ep_num = 13, .style = FIFO_RXTX, .maxpacket = 512, },
1373 { .hw_ep_num = 14, .style = FIFO_RXTX, .maxpacket = 1024, },
1374 { .hw_ep_num = 15, .style = FIFO_RXTX, .maxpacket = 1024, },
1418 switch (cfg->style) { in fifo_setup()
1455 .style = FIFO_RXTX, .maxpacket = 64,