Lines Matching refs:LVDS_GEN_CNTL
576 rinfo->save_regs[11] = INREG(LVDS_GEN_CNTL); in radeon_pm_save_regs()
616 rinfo->save_regs[81] = INREG(LVDS_GEN_CNTL); in radeon_pm_save_regs()
712 OUTREG(LVDS_GEN_CNTL, rinfo->save_regs[11]); in radeon_pm_restore_regs()
911 OUTREG(LVDS_GEN_CNTL, INREG(LVDS_GEN_CNTL) & in radeon_pm_setup_for_suspend()
1613 tmp = INREG(LVDS_GEN_CNTL); in radeon_pm_m10_enable_lvds_spread_spectrum()
1614 OUTREG(LVDS_GEN_CNTL, tmp | LVDS_EN); in radeon_pm_m10_enable_lvds_spread_spectrum()
1914 OUTREG(LVDS_GEN_CNTL, rinfo->save_regs[11] & in radeon_reinitialize_M10()
1930 OUTREG(LVDS_GEN_CNTL, INREG(LVDS_GEN_CNTL) | LVDS_DIGON | LVDS_ON); in radeon_reinitialize_M10()
2118 OUTREG(LVDS_GEN_CNTL, 0x08000008); in radeon_reinitialize_M9P()
2167 OUTREG(LVDS_GEN_CNTL, rinfo->save_regs[11] & in radeon_reinitialize_M9P()
2169 OUTREG(LVDS_GEN_CNTL, INREG(LVDS_GEN_CNTL) | LVDS_BLON); in radeon_reinitialize_M9P()
2199 OUTREG(LVDS_GEN_CNTL, INREG(LVDS_GEN_CNTL) | LVDS_DIGON | LVDS_ON); in radeon_reinitialize_M9P()
2681 OUTREG(LVDS_GEN_CNTL, INREG(LVDS_GEN_CNTL) & ~(LVDS_BL_MOD_EN)); in radeonfb_pci_suspend_late()
2683 OUTREG(LVDS_GEN_CNTL, INREG(LVDS_GEN_CNTL) & ~(LVDS_EN | LVDS_ON)); in radeonfb_pci_suspend_late()
2686 OUTREG(LVDS_GEN_CNTL, INREG(LVDS_GEN_CNTL) & ~(LVDS_DIGON)); in radeonfb_pci_suspend_late()