Lines Matching refs:vga_wcrt
748 vga_wcrt(regbase, VGA_CRTC_V_SYNC_END, 0x20); /* previously: 0x00) */ in cirrusfb_set_par_foo()
752 vga_wcrt(regbase, VGA_CRTC_H_TOTAL, htotal); in cirrusfb_set_par_foo()
755 vga_wcrt(regbase, VGA_CRTC_H_DISP, hdispend); in cirrusfb_set_par_foo()
758 vga_wcrt(regbase, VGA_CRTC_H_BLANK_START, var->xres / 8); in cirrusfb_set_par_foo()
762 vga_wcrt(regbase, VGA_CRTC_H_BLANK_END, in cirrusfb_set_par_foo()
766 vga_wcrt(regbase, VGA_CRTC_H_SYNC_START, hsyncstart); in cirrusfb_set_par_foo()
772 vga_wcrt(regbase, VGA_CRTC_H_SYNC_END, tmp); in cirrusfb_set_par_foo()
775 vga_wcrt(regbase, VGA_CRTC_V_TOTAL, vtotal & 0xff); in cirrusfb_set_par_foo()
793 vga_wcrt(regbase, VGA_CRTC_OVERFLOW, tmp); in cirrusfb_set_par_foo()
801 vga_wcrt(regbase, VGA_CRTC_MAX_SCAN, tmp); in cirrusfb_set_par_foo()
804 vga_wcrt(regbase, VGA_CRTC_V_SYNC_START, vsyncstart & 0xff); in cirrusfb_set_par_foo()
807 vga_wcrt(regbase, VGA_CRTC_V_SYNC_END, vsyncend % 16 + 64 + 32); in cirrusfb_set_par_foo()
810 vga_wcrt(regbase, VGA_CRTC_V_DISP_END, vdispend & 0xff); in cirrusfb_set_par_foo()
813 vga_wcrt(regbase, VGA_CRTC_V_BLANK_START, (vdispend + 1) & 0xff); in cirrusfb_set_par_foo()
816 vga_wcrt(regbase, VGA_CRTC_V_BLANK_END, vtotal & 0xff); in cirrusfb_set_par_foo()
819 vga_wcrt(regbase, VGA_CRTC_LINE_COMPARE, 0xff); in cirrusfb_set_par_foo()
834 vga_wcrt(regbase, CL_CRT1A, tmp); in cirrusfb_set_par_foo()
906 vga_wcrt(regbase, VGA_CRTC_MODE, 0xc7); in cirrusfb_set_par_foo()
910 vga_wcrt(regbase, VGA_CRTC_MODE, 0xc3); in cirrusfb_set_par_foo()
915 vga_wcrt(regbase, VGA_CRTC_REGS, htotal / 2); in cirrusfb_set_par_foo()
917 vga_wcrt(regbase, VGA_CRTC_REGS, 0x00); /* interlace control */ in cirrusfb_set_par_foo()
929 vga_wcrt(regbase, VGA_CRTC_CURSOR_START, 0); in cirrusfb_set_par_foo()
931 vga_wcrt(regbase, VGA_CRTC_CURSOR_END, 31); in cirrusfb_set_par_foo()
1205 vga_wcrt(regbase, VGA_CRTC_OFFSET, pitch & 0xff); in cirrusfb_set_par_foo()
1211 vga_wcrt(regbase, CL_CRT1B, tmp); in cirrusfb_set_par_foo()
1215 vga_wcrt(regbase, CL_CRT1D, (pitch >> 9) & 1); in cirrusfb_set_par_foo()
1232 vga_wcrt(regbase, CL_CRT1E, tmp); in cirrusfb_set_par_foo()
1342 vga_wcrt(cinfo->regbase, VGA_CRTC_START_LO, base & 0xff); in cirrusfb_pan_display()
1343 vga_wcrt(cinfo->regbase, VGA_CRTC_START_HI, (base >> 8) & 0xff); in cirrusfb_pan_display()
1355 vga_wcrt(cinfo->regbase, CL_CRT1B, tmp); in cirrusfb_pan_display()
1364 vga_wcrt(cinfo->regbase, CL_CRT1D, tmp); in cirrusfb_pan_display()
1476 vga_wcrt(cinfo->regbase, CL_CRT51, 0x00); in init_vgachip()
1577 vga_wcrt(cinfo->regbase, VGA_CRTC_PRESET_ROW, 0x00); in init_vgachip()
1579 vga_wcrt(cinfo->regbase, VGA_CRTC_CURSOR_START, 0x20); in init_vgachip()
1581 vga_wcrt(cinfo->regbase, VGA_CRTC_CURSOR_END, 0x00); in init_vgachip()
1583 vga_wcrt(cinfo->regbase, VGA_CRTC_CURSOR_HI, 0x00); in init_vgachip()
1585 vga_wcrt(cinfo->regbase, VGA_CRTC_CURSOR_LO, 0x00); in init_vgachip()
1588 vga_wcrt(cinfo->regbase, VGA_CRTC_UNDERLINE, 0x00); in init_vgachip()
1591 vga_wcrt(cinfo->regbase, CL_CRT1B, 0x02); in init_vgachip()