Lines Matching refs:write_dc
65 write_dc(par, DC_UNLOCK, DC_UNLOCK_UNLOCK); in gx_set_mode()
72 write_dc(par, DC_DISPLAY_CFG, dcfg); in gx_set_mode()
80 write_dc(par, DC_GENERAL_CFG, gcfg); in gx_set_mode()
99 write_dc(par, DC_FB_ST_OFFSET, 0); in gx_set_mode()
102 write_dc(par, DC_GFX_PITCH, info->fix.line_length >> 3); in gx_set_mode()
103 write_dc(par, DC_LINE_SIZE, in gx_set_mode()
143 write_dc(par, DC_H_ACTIVE_TIMING, (hactive - 1) | in gx_set_mode()
145 write_dc(par, DC_H_BLANK_TIMING, (hblankstart - 1) | in gx_set_mode()
147 write_dc(par, DC_H_SYNC_TIMING, (hsyncstart - 1) | in gx_set_mode()
150 write_dc(par, DC_V_ACTIVE_TIMING, (vactive - 1) | in gx_set_mode()
152 write_dc(par, DC_V_BLANK_TIMING, (vblankstart - 1) | in gx_set_mode()
154 write_dc(par, DC_V_SYNC_TIMING, (vsyncstart - 1) | in gx_set_mode()
158 write_dc(par, DC_DISPLAY_CFG, dcfg); in gx_set_mode()
159 write_dc(par, DC_GENERAL_CFG, gcfg); in gx_set_mode()
164 write_dc(par, DC_UNLOCK, DC_UNLOCK_LOCK); in gx_set_mode()
178 write_dc(par, DC_PAL_ADDRESS, regno); in gx_set_hw_palette_reg()
179 write_dc(par, DC_PAL_DATA, val); in gx_set_hw_palette_reg()