Lines Matching refs:writel
86 writel(DC_UNLOCK_CODE, par->dc_regs + DC_UNLOCK); in gx1_set_mode()
93 writel(tcfg, par->dc_regs + DC_TIMING_CFG); in gx1_set_mode()
100 writel(gcfg, par->dc_regs + DC_GENERAL_CFG); in gx1_set_mode()
104 writel(gcfg, par->dc_regs + DC_GENERAL_CFG); in gx1_set_mode()
110 writel(gcfg, par->dc_regs + DC_GENERAL_CFG); in gx1_set_mode()
131 writel(0, par->dc_regs + DC_FB_ST_OFFSET); in gx1_set_mode()
134 writel(info->fix.line_length >> 2, par->dc_regs + DC_LINE_DELTA); in gx1_set_mode()
135 writel(((info->var.xres * info->var.bits_per_pixel/8) >> 3) + 2, in gx1_set_mode()
162 writel(val, par->dc_regs + DC_H_TIMING_1); in gx1_set_mode()
164 writel(val, par->dc_regs + DC_H_TIMING_2); in gx1_set_mode()
166 writel(val, par->dc_regs + DC_H_TIMING_3); in gx1_set_mode()
167 writel(val, par->dc_regs + DC_FP_H_TIMING); in gx1_set_mode()
169 writel(val, par->dc_regs + DC_V_TIMING_1); in gx1_set_mode()
171 writel(val, par->dc_regs + DC_V_TIMING_2); in gx1_set_mode()
173 writel(val, par->dc_regs + DC_V_TIMING_3); in gx1_set_mode()
175 writel(val, par->dc_regs + DC_FP_V_TIMING); in gx1_set_mode()
178 writel(ocfg, par->dc_regs + DC_OUTPUT_CFG); in gx1_set_mode()
179 writel(tcfg, par->dc_regs + DC_TIMING_CFG); in gx1_set_mode()
181 writel(gcfg, par->dc_regs + DC_GENERAL_CFG); in gx1_set_mode()
186 writel(0, par->dc_regs + DC_UNLOCK); in gx1_set_mode()
203 writel(regno, par->dc_regs + DC_PAL_ADDRESS); in gx1_set_hw_palette_reg()
204 writel(val, par->dc_regs + DC_PAL_DATA); in gx1_set_hw_palette_reg()