Lines Matching refs:n

34 #define DISPC_OVL_BA0(n)		(DISPC_OVL_BASE(n) + \  argument
35 DISPC_BA0_OFFSET(n))
36 #define DISPC_OVL_BA1(n) (DISPC_OVL_BASE(n) + \ argument
37 DISPC_BA1_OFFSET(n))
38 #define DISPC_OVL_BA0_UV(n) (DISPC_OVL_BASE(n) + \ argument
39 DISPC_BA0_UV_OFFSET(n))
40 #define DISPC_OVL_BA1_UV(n) (DISPC_OVL_BASE(n) + \ argument
41 DISPC_BA1_UV_OFFSET(n))
42 #define DISPC_OVL_POSITION(n) (DISPC_OVL_BASE(n) + \ argument
43 DISPC_POS_OFFSET(n))
44 #define DISPC_OVL_SIZE(n) (DISPC_OVL_BASE(n) + \ argument
45 DISPC_SIZE_OFFSET(n))
46 #define DISPC_OVL_ATTRIBUTES(n) (DISPC_OVL_BASE(n) + \ argument
47 DISPC_ATTR_OFFSET(n))
48 #define DISPC_OVL_ATTRIBUTES2(n) (DISPC_OVL_BASE(n) + \ argument
49 DISPC_ATTR2_OFFSET(n))
50 #define DISPC_OVL_FIFO_THRESHOLD(n) (DISPC_OVL_BASE(n) + \ argument
51 DISPC_FIFO_THRESH_OFFSET(n))
52 #define DISPC_OVL_FIFO_SIZE_STATUS(n) (DISPC_OVL_BASE(n) + \ argument
53 DISPC_FIFO_SIZE_STATUS_OFFSET(n))
54 #define DISPC_OVL_ROW_INC(n) (DISPC_OVL_BASE(n) + \ argument
55 DISPC_ROW_INC_OFFSET(n))
56 #define DISPC_OVL_PIXEL_INC(n) (DISPC_OVL_BASE(n) + \ argument
57 DISPC_PIX_INC_OFFSET(n))
58 #define DISPC_OVL_WINDOW_SKIP(n) (DISPC_OVL_BASE(n) + \ argument
59 DISPC_WINDOW_SKIP_OFFSET(n))
60 #define DISPC_OVL_TABLE_BA(n) (DISPC_OVL_BASE(n) + \ argument
61 DISPC_TABLE_BA_OFFSET(n))
62 #define DISPC_OVL_FIR(n) (DISPC_OVL_BASE(n) + \ argument
63 DISPC_FIR_OFFSET(n))
64 #define DISPC_OVL_FIR2(n) (DISPC_OVL_BASE(n) + \ argument
65 DISPC_FIR2_OFFSET(n))
66 #define DISPC_OVL_PICTURE_SIZE(n) (DISPC_OVL_BASE(n) + \ argument
67 DISPC_PIC_SIZE_OFFSET(n))
68 #define DISPC_OVL_ACCU0(n) (DISPC_OVL_BASE(n) + \ argument
69 DISPC_ACCU0_OFFSET(n))
70 #define DISPC_OVL_ACCU1(n) (DISPC_OVL_BASE(n) + \ argument
71 DISPC_ACCU1_OFFSET(n))
72 #define DISPC_OVL_ACCU2_0(n) (DISPC_OVL_BASE(n) + \ argument
73 DISPC_ACCU2_0_OFFSET(n))
74 #define DISPC_OVL_ACCU2_1(n) (DISPC_OVL_BASE(n) + \ argument
75 DISPC_ACCU2_1_OFFSET(n))
76 #define DISPC_OVL_FIR_COEF_H(n, i) (DISPC_OVL_BASE(n) + \ argument
77 DISPC_FIR_COEF_H_OFFSET(n, i))
78 #define DISPC_OVL_FIR_COEF_HV(n, i) (DISPC_OVL_BASE(n) + \ argument
79 DISPC_FIR_COEF_HV_OFFSET(n, i))
80 #define DISPC_OVL_FIR_COEF_H2(n, i) (DISPC_OVL_BASE(n) + \ argument
81 DISPC_FIR_COEF_H2_OFFSET(n, i))
82 #define DISPC_OVL_FIR_COEF_HV2(n, i) (DISPC_OVL_BASE(n) + \ argument
83 DISPC_FIR_COEF_HV2_OFFSET(n, i))
84 #define DISPC_OVL_CONV_COEF(n, i) (DISPC_OVL_BASE(n) + \ argument
85 DISPC_CONV_COEF_OFFSET(n, i))
86 #define DISPC_OVL_FIR_COEF_V(n, i) (DISPC_OVL_BASE(n) + \ argument
87 DISPC_FIR_COEF_V_OFFSET(n, i))
88 #define DISPC_OVL_FIR_COEF_V2(n, i) (DISPC_OVL_BASE(n) + \ argument
89 DISPC_FIR_COEF_V2_OFFSET(n, i))
90 #define DISPC_OVL_PRELOAD(n) (DISPC_OVL_BASE(n) + \ argument
91 DISPC_PRELOAD_OFFSET(n))
92 #define DISPC_OVL_MFLAG_THRESHOLD(n) DISPC_MFLAG_THRESHOLD_OFFSET(n) argument