Lines Matching refs:VIACR
193 RegCR6B = viafb_read_reg(VIACR, CR6B); in viafb_dvi_sense()
194 viafb_write_reg(CR6B, VIACR, RegCR6B | 0x08); in viafb_dvi_sense()
198 RegCR91 = viafb_read_reg(VIACR, CR91); in viafb_dvi_sense()
199 viafb_write_reg(CR91, VIACR, 0x1D); in viafb_dvi_sense()
205 RegCR93 = viafb_read_reg(VIACR, CR93); in viafb_dvi_sense()
206 viafb_write_reg(CR93, VIACR, 0x01); in viafb_dvi_sense()
219 RegCR91 = viafb_read_reg(VIACR, CR91); in viafb_dvi_sense()
220 viafb_write_reg(CR91, VIACR, 0x1D); in viafb_dvi_sense()
224 RegCR9B = viafb_read_reg(VIACR, CR9B); in viafb_dvi_sense()
225 viafb_write_reg(CR9B, VIACR, 0x01); in viafb_dvi_sense()
239 viafb_write_reg(CR91, VIACR, RegCR91); in viafb_dvi_sense()
241 viafb_write_reg(CR6B, VIACR, RegCR6B); in viafb_dvi_sense()
242 viafb_write_reg(CR93, VIACR, RegCR93); in viafb_dvi_sense()
245 viafb_write_reg(CR9B, VIACR, RegCR9B); in viafb_dvi_sense()
318 viafb_write_reg(CRD2, VIACR, in viafb_dvi_disable()
319 viafb_read_reg(VIACR, CRD2) | 0x08); in viafb_dvi_disable()
334 viafb_write_reg_mask(CR96, VIACR, 0x03, in dvi_patch_skew_dvp0()
337 viafb_write_reg_mask(CR96, VIACR, 0x07, in dvi_patch_skew_dvp0()
344 viafb_write_reg_mask(CR96, VIACR, 0x07, in dvi_patch_skew_dvp0()
363 viafb_write_reg_mask(CR99, VIACR, 0x03, BIT0 + BIT1); in dvi_patch_skew_dvp_low()
369 viafb_write_reg_mask(CR99, VIACR, 0x08, in dvi_patch_skew_dvp_low()
376 viafb_write_reg_mask(CR99, VIACR, 0x0F, in dvi_patch_skew_dvp_low()
395 viafb_write_reg_mask(CR6B, VIACR, 0x01, BIT0); in viafb_dvi_enable()
396 viafb_write_reg_mask(CR6C, VIACR, 0x21, BIT0 + BIT5); in viafb_dvi_enable()
403 via_write_reg_mask(VIACR, 0x91, 0x00, 0x20); in viafb_dvi_enable()
408 viafb_write_reg_mask(CR93, VIACR, 0x21, BIT0 + BIT5); in viafb_dvi_enable()
416 via_write_reg_mask(VIACR, 0x91, 0x00, 0x20); in viafb_dvi_enable()
420 viafb_write_reg_mask(CR91, VIACR, 0x1f, 0x1f); in viafb_dvi_enable()
421 viafb_write_reg_mask(CR88, VIACR, 0x00, BIT6 + BIT0); in viafb_dvi_enable()
438 via_write_reg_mask(VIACR, CR97, 0x03, 0x03); in viafb_dvi_enable()
440 via_write_reg_mask(VIACR, 0x91, 0x00, 0x20); in viafb_dvi_enable()
448 via_write_reg_mask(VIACR, 0x91, 0x00, 0x20); in viafb_dvi_enable()
453 viafb_write_reg_mask(CR91, VIACR, 0, BIT7); in viafb_dvi_enable()
456 viafb_write_reg_mask(CRD2, VIACR, 0, BIT3); in viafb_dvi_enable()
462 viafb_write_reg_mask(CR79, VIACR, 0x00, BIT0); in viafb_dvi_enable()