Lines Matching refs:MTK_M4U_ID
18 #define M4U_PORT_DISP_OVL0 MTK_M4U_ID(M4U_LARB0_ID, 0)
19 #define M4U_PORT_DISP_RDMA0 MTK_M4U_ID(M4U_LARB0_ID, 1)
20 #define M4U_PORT_DISP_WDMA0 MTK_M4U_ID(M4U_LARB0_ID, 2)
21 #define M4U_PORT_DISP_RDMA1 MTK_M4U_ID(M4U_LARB0_ID, 3)
22 #define M4U_PORT_MDP_RDMA MTK_M4U_ID(M4U_LARB0_ID, 4)
23 #define M4U_PORT_MDP_WDMA MTK_M4U_ID(M4U_LARB0_ID, 5)
24 #define M4U_PORT_MDP_WROT MTK_M4U_ID(M4U_LARB0_ID, 6)
25 #define M4U_PORT_DISP_FAKE MTK_M4U_ID(M4U_LARB0_ID, 7)
28 #define M4U_PORT_CAM_IMGO MTK_M4U_ID(M4U_LARB1_ID, 0)
29 #define M4U_PORT_CAM_IMG2O MTK_M4U_ID(M4U_LARB1_ID, 1)
30 #define M4U_PORT_CAM_LSCI MTK_M4U_ID(M4U_LARB1_ID, 2)
31 #define M4U_PORT_CAM_ESFKO MTK_M4U_ID(M4U_LARB1_ID, 3)
32 #define M4U_PORT_CAM_AAO MTK_M4U_ID(M4U_LARB1_ID, 4)
33 #define M4U_PORT_VENC_REC MTK_M4U_ID(M4U_LARB1_ID, 5)
34 #define M4U_PORT_VENC_BSDMA MTK_M4U_ID(M4U_LARB1_ID, 6)
35 #define M4U_PORT_VENC_RD_COMV MTK_M4U_ID(M4U_LARB1_ID, 7)
36 #define M4U_PORT_CAM_IMGI MTK_M4U_ID(M4U_LARB1_ID, 8)
37 #define M4U_PORT_VENC_CUR_LUMA MTK_M4U_ID(M4U_LARB1_ID, 9)
38 #define M4U_PORT_VENC_CUR_CHROMA MTK_M4U_ID(M4U_LARB1_ID, 10)
39 #define M4U_PORT_VENC_REF_LUMA MTK_M4U_ID(M4U_LARB1_ID, 11)
40 #define M4U_PORT_VENC_REF_CHROMA MTK_M4U_ID(M4U_LARB1_ID, 12)
43 #define M4U_PORT_HW_VDEC_MC_EXT MTK_M4U_ID(M4U_LARB2_ID, 0)
44 #define M4U_PORT_HW_VDEC_PP_EXT MTK_M4U_ID(M4U_LARB2_ID, 1)
45 #define M4U_PORT_HW_VDEC_VLD_EXT MTK_M4U_ID(M4U_LARB2_ID, 2)
46 #define M4U_PORT_HW_VDEC_AVC_MV_EXT MTK_M4U_ID(M4U_LARB2_ID, 3)
47 #define M4U_PORT_HW_VDEC_PRED_RD_EXT MTK_M4U_ID(M4U_LARB2_ID, 4)
48 #define M4U_PORT_HW_VDEC_PRED_WR_EXT MTK_M4U_ID(M4U_LARB2_ID, 5)
49 #define M4U_PORT_HW_VDEC_PPWRAP_EXT MTK_M4U_ID(M4U_LARB2_ID, 6)